Sarah Patten Experiment 1 2/1/2012

Digital Systems Laboratory Experiment 1

Laboratory Report

Sarah Patten Lab Time: Wednesday 12:00-2:50 Lab Date: 01/18/12 and 01/25/12

Sarah Patten Experiment 1 2/1/2012

Objective: The objective of laboratory experiment one is to introduce and familiarize the students with Xilinx design tools and how different digital circuits can be used through simulation and implementation. For this experiment, Xilinx software was used to develop digital systems using schematic and VERILOG design. 1. When beginning each new part of the experiment, start off by creating a new project. The specific settings on the device properties should be chosen next, depending on the type of developing board being used. To start off choose a new source file, and make it of the type schematic. This new source should be added to the project. The first thing that needs to be added to the image is an and2 symbol, under the logic category, which simply means there will be 2 inputs into an and gate. After there has been one added to the page, a wire can be connected to each input and output position, after, an I/O marker can be added to the end of the wire, double clicking on each name spot will allow you to rename them. After naming every input/output position, the source should be saved. 2. Saving the source file allows you to them synthesize your design by clicking the Synthesize-XST process under the process window on the left hand side of the screen. After it has been synthesized, the design then has to be implemented by double clicking Implement Design in that same window. After completing each of these steps, a green check should appear next to the side of them to show they worked. Next, under the project menu, a new source should be added, with source type, test bench waveform. This test should have the settings changed just for the type of clock which will be use, in this case, combinational is what we need. 3. When the test bench opens up, the first input should be changed so that it is set to 1 from 300-500 and 700-1000, while the second input should be set to 1 from 500-1000. After these settings are applied a Behavioral simulations needs to be performed, this can be done by double clicking on Simulate Behavioral Model. If there were no errors, an image resembling that in Figure 1 should appear.

Figure 1

Sarah Patten Experiment 1 2/1/2012

4. If the simulation gave the correct results, then the inputs and outputs then have to be assigned a position, this can be performed by clicking on Create Area Constraints. SWO (for your first input) should be located on pin 38, SW1 (for your second input) should be located on pin 36, finally, LED0 (your output) should be located on pin 15. After, this should be saved, and the design will need to be implemented again. If a green check comes back again, then Generate Programming File should be clicked. 5. The program EXPORT should then be opened. Click initialize chain, then click browse to search for the file you generated in the previous step, it is a .bit file. Select this file for both the options on the screen. Then Program Chain needs to be clicked, this programs the BASYS board with the design that was created. By flipping SW0 and SW1 with every combination, you can read the outputs, if the light turns on it should be recorded as a 1 in a truth table. For the AND2 program, a table should be created so that it is the same as from table 1. Table 1: With AND2 SW0 SW1 LED0 0 0 1 1 0 1 0 1 0 0 0 1

For the next part of the first part of the lab, the five above steps need to be completed for a two-input NAND gate, which is also under the logic drop menu, labeled NAND2. This function is the inverse of the AND gate.So after step 3 is completed the behavior model Figure 2 should appear.

Figure 2

Sarah Patten Experiment 1 2/1/2012

If you examine figures one and two, you will notice that for the output, the two are completey opposite, while the inputes are the same. After creating the .bit file, the genereated program can then be run through the BASYS board, by testing it, you will be able to creat the truth table, table 2. Table 2: With NAND2 SW0 SW1 LED0 0 0 1 0 1 1 1 0 1 1 1 0

After the two input NAND program has been successfully run, steps one through five should be again completed, this time for a two input OR gate. This can also be found under the logic category. This function is one which determines if there is any switch set on. So after step three has been completed, a new behavioral model should appear, which should look like that of Figure 3.

Figure 3 After finishing the behavioral test, steps four and five can be completed. Figure 3 is much different from figures one and two, as you may notice. After you complete steps four and five, you should create a truth table from testing the BASYS board. If the program has been written correctly, the table should look like Table 3.

Sarah Patten Experiment 1 2/1/2012

Table 3: With OR2 SW0 0 0 1 1 SW1 0 1 0 1 LED0 0 1 1 1

Steps one through five should again be repeated. This time through, under the logic menu choos XOR2, which is for an exclusive OR gate with 2 inputs. Exclusive Or, is when you are given two options but only one of them can be chosen for it to be true, this is because you can only choose one. If you try to choose two, it is not allowed because one is not exclusively being chosen. At the end of step three you should have the behavioral model like that of Figure 4.

Figure 4 This is close to Figure 3, except the value 0 is shown for when both inputs are 1. This is because, as stated before, not exclusively one is being chosen. After examining the image, you can then complete steps four and five and generate a program which should reflect the date from Figure 4. Again, create a truth table from the readings you receive from the BASYS board. Table 4 is how it should look. Table 4: With XOR2 SW0 0 0 1 1 SW1 0 1 0 1 LED0 0 1 1 0

Sarah Patten Experiment 1 2/1/2012

Finally to complete part one of the experiment, steps one through five should be repeated, with a few minor changes. It should be done for and inverter (INV). Since there is only one input, you can just pretend like all information about a second input isnt there. The first pin should still be located in the same spot, as should the output, it has to just be treated like the second input doesnt exist in the instructions at all. After the completion of step three Figure 5 should be showing on the screen.

Figure 5 The figure shows that whenever the input is 1, the output will be 0, and vice versa. By completing steps four and five, and testing the program generated in step five, you should create the truth table. Table 5: INV SW0 0 1 LED0 1 0

By completing the INV program and test, part one of the lab has been completed. 1. When beginning each new part of the experiment, start off by creating a new project. The specific settings on the device properties should be chosen next, depending on the type of developing board being used. To start off choose a new source file, and make it of the type VERILOG. This new source should be added to the project. Set O as output, then A and B as inputs. After the project opens, a program will need to be written. Start off with writing a function for AND.

Sarah Patten Experiment 1 2/1/2012 module lab1pp1(o, a, b); output o; input a; input b; wire a, b, o; assign o = a & b; endmodule

2. Saving the source file allows you to them synthesize your design by clicking the Synthesize-XST process under the process window on the left hand side of the screen. After it has been synthesized, the design then has to be implemented by double clicking Implement Design in that same window. After completing each of these steps, a green check should appear next to the side of them to show they worked. Next, under the project menu, a new source should be added, with source type, test bench waveform. This test should have the settings changed just for the type of clock which will be used in this case combinational is what we need. 3. When the test bench opens up, the first input should be changed so that it is set to 1 from 300-500 and 700-1000, while the second input should be set to 1 from 500-1000. After these settings are applied a Behavioral simulations needs to be performed, this can be done by double clicking on Simulate Behavioral Model. If there were no errors, an image resembling that in Figure 6 should appear.

Figure 6 4. If the simulation gave the correct results, then the inputs and outputs then have to be assigned a position, this can be performed by clicking on Create Area Constraints. SWO (for your first input) should be located on pin 38, SW1 (for your second input) should be located on pin 36, finally, LED0 (your output) should be located on pin 15. After, this should be saved, and the design will need to be implemented again. If a green check comes back again, then Generate Programming File should be clicked.

Sarah Patten Experiment 1 2/1/2012

5. The program EXPORT should then be opened. Click initialize chain, then click browse to search for the file you generated in the previous step, it is a .bit file. Select this file for both the options on the screen. Then Program Chain needs to be clicked, this programs the BASYS board with the design that was created. By flipping SW0 and SW1 with every combination, you can read the outputs, if the light turns on it should be recorded as a 1 in a truth table. For the and program, a table should be created so that it is the same as from table 6 Table 6 SW0 0 0 1 1 SW1 0 1 0 1 LED0 0 0 0 1

After completing the first program, a second should be written for, what would be similar to the NAND schematic program created in part 1. After completing step 1, a program should be written, using ~ as a not symbol. The completed program should be

module lab1pp2(O, A, B); output O; input A; input B; wire A, B, O; assign O = ( ~ (A & B)); endmodule

After completing the firs step, follow the above instructions for steps two and three. After completing the behavioral model, you should notice that the screen should be identical to when the schematic for NAND2 was performed.

Figure 7

Sarah Patten Experiment 1 2/1/2012

After completing step three, continue on to finishing steps four and five so you can verify the your program actually works by testing the input and output switches on the BASYS board to create another truth table, that should be like Table 7. Table 7 SW0 0 0 1 1 SW1 0 1 0 1 LED0 1 1 1 0

The third program that needs to be written in VERILOG will be for an OR function. This program follows the same format as the two previous programs, but for the OR symbol | will need to be used. So after step 1, the program should be:
module lab1pp3(O, A, B); output O; input A; input B; wire A, B, O; assign O = A | B; endmodule

Next the program should be checked to make sure it works by completing steps two and three. If all the green check marks appear for you, and you get the behavioral model to run you should get the image that resembles Figure 8.

Figure 8 By interpretting the image you should be able to figure out what you should get for your truth table. After completing steps four and five you can verify that you interpretted the

Sarah Patten Experiment 1 2/1/2012

image right to get the truth Table 8. Table 8 SW0 0 0 1 1 SW1 0 1 0 1 LED0 0 1 1 1

This table looks identical to Table 3. This just shows that you can create the same output for a program buy writing the code for it, or using the schematic diagrams.

Next the exclusive or function has to be writin in VERILOG. This can be done by following the same steps as before, but using ^ as the function between A and B. This will result in the following code.
module lab1pp3(O, A, B); output O; input A; input B; wire A, B, O; assign O = A ^ B; endmodule

Assuming the code is written correctly, by completing steps three and four, the behavioral model should come out as Figure 9. In the figure, you can see that when both A and B are 1, O is 0.

Figure 9 Again, this if quite similar to that of Figure 4. So by completing the last two steps we can find the truth table to show that it really is the same function.

Sarah Patten Experiment 1 2/1/2012

Table 9 SW0 0 0 1 1 SW1 0 1 0 1 LED0 0 1 1 0

For the last part of Part two of the lab, there will be only one input. So in the written code there should only be two variables used, which are an input and an output. Since the inverse function is what is needed to be performed, the ~ is again used, as it was in the first piece of part two. The code should then be as follows.
module lab1pp3(O, A); output O; input A; wire A, O; assign O = ~ A; endmodule

Since this is the inverse function, the behavioral model image, that is found after completing steps two and three, should look as if the two are alternating, so when one is up, the other is down, and vice versa, as shown in Figure 10.

Figure 10 After looking over the image to make sure it is as it was expected to be, steps four and five should be completed. A prediction of the truth table for this function can be made, based on when the input and output change. By completely the program, you can test it on the BASYS board to make sure it is as expected. Which should be Table 10.

Sarah Patten Experiment 1 2/1/2012

Table 10 SW0 0 1 LED0 1 0

For the final part of the procedure, a schematic diagram using two inputs, but all five output logic circuits needs to be created. The inputs should be labeled A and B, and the outputs, S, W, X, Y, and Z. 1. To start, a new a new project should be created. The specific settings on the device properties should be chosen next, depending on the type of developing board being used. Next off, choose a new source file, and make it of the type schematic. This new source should be added to the project. The first thing that needs to be added to the image is an AND2 symbol, under the logic category, then a NAND2, an OR2, XOR2, and INV as well. After these has been added to the page, wires should be connected to each input and output position and extended from A and B to S, W, X, Y, and Z (which can be named on the right side of the logic circuits). After, an I/O marker can be added to the end of the wire, double clicking on each name spot will allow you to rename them. After naming every input/output position, the source should be saved. Your schematic should look like Figure 11.

Figure 11 2. Saving the source file allows you to them synthesize your design by clicking the Synthesize-XST process under the process window on the left hand side of the screen. After it has been synthesized, the design then has to be implemented by double clicking Implement Design in that same window. After completing each of these steps, a green check should appear next to the side of them to show they worked. Next, under the project menu, a new source should be added, with source type, test bench waveform. This test should have the settings changed just for the type of clock which will be used in this case combinational is what we need.

Sarah Patten Experiment 1 2/1/2012

3. When the test bench opens up, the first input should be changed so that it is set to 1 from 300-500 and 700-1000, while the second input should be set to 1 from 500-1000. After these settings are applied a Behavioral simulations needs to be performed, this can be done by double clicking on Simulate Behavioral Model. If there were no errors, an image resembling that in Figure 12 should appear.

Figure 12 4. If the simulation gave the correct results, then the inputs and outputs then have to be assigned a position, this can be performed by clicking on Create Area Constraints. SWO (for your first input) should be located on pin 38, SW1 (for your second input) should be located on pin 36, output one (S) should be located on pin 15, output 2 (W) should be on pin 14, the third output (X) on pin 8, the fourth output (Y) on pin 7, and the final output (Z) should be on pin 5. After, this should be saved, and the design will need to be implemented again. If a green check comes back again, then Generate Programming File should be clicked. 5. The program EXPORT should then be opened. Click initialize chain, then click browse to search for the file you generated in the previous step, it is a .bit file. Select this file for both the options on the screen. Then Program Chain needs to be clicked, this programs the BASYS board with the design that was created. By flipping SW0 and SW1 with every combination, you can read the outputs, if the light turns on it should be recorded as a 1 in a truth table. For this program, a table should be created so that it is the same as from table 11.

Sarah Patten Experiment 1 2/1/2012

Table 11 A 0 1 0 1 B 0 0 1 1 LED0 (S) 1 0 1 0 LED1(W) 0 0 0 1 LED2(X) 0 1 1 1 LED3(Y) 1 1 1 0 LED4(Z) 0 1 1 0

1. When beginning each new part of the experiment, start off by creating a new project. The specific settings on the device properties should be chosen next, depending on the type of developing board being used. To start off choose a new source file, and make it of the type VERILOG. This new source should be added to the project. Set S, W, X, Y, and Z as outputs, then A and B as inputs. After the project opens, a program will need to be written. Using the same symbols as from part 2, assign S to be the inverse function of A, W as the AND function, X as the OR function, Y as NAND, and Z as XOR. So the program should be as follows.
module lab1pp7(A, B, S, W, X, Y, Z); input A; input B; output S; output W; output X; output Y; output Z; wire A, B, S, W, X, Y, Z; S = ~ A; W = A & B; X = A | B; Y = ~ (A & B); Z = A ^ B; Endmodule

2. Saving the source file allows you to them synthesize your design by clicking the Synthesize-XST process under the process window on the left hand side of the screen. After it has been synthesized, the design then has to be implemented by double clicking Implement Design in that same window. After completing each of these steps, a green check should appear next to the side of them to show they worked. Next, under the project menu, a new source should be added, with source type, test bench waveform. This test should have the settings changed just for the type of clock which will be used in this case combinational is what we need. 3. When the test bench opens up, the first input should be changed so that it is set to 1 from 300-500 and 700-1000, while the second input should be set to 1 from 500-1000. After these settings are applied a Behavioral simulations needs to be performed, this can be done by double clicking on Simulate Behavioral Model. If there were no errors, an image resembling that in Figure 13should appear.

Sarah Patten Experiment 1 2/1/2012

Figure 13 4. If the simulation gave the correct results, then the inputs and outputs then have to be assigned a position, this can be performed by clicking on Create Area Constraints. SWO (for your first input) should be located on pin 38, SW1 (for your second input) should be located on pin 36, output one (S) should be located on pin 15, output 2 (W) should be on pin 14, the third output (X) on pin 8, the fourth output (Y) on pin 7, and the final output (Z) should be on pin 5. After, this should be saved, and the design will need to be implemented again. If a green check comes back again, then Generate Programming File should be clicked. 5. The program EXPORT should then be opened. Click initialize chain, then click browse to search for the file you generated in the previous step, it is a .bit file. Select this file for both the options on the screen. Then Program Chain needs to be clicked, this programs the BASYS board with the design that was created. By flipping SW0 and SW1 with every combination, you can read the outputs, if the light turns on it should be recorded as a 1 in a truth table. For this program, a table should be created so that it is the same as from table 12.

Table 12 A 0 1 0 1 B 0 0 1 1 LED0 (S) 1 0 1 0 LED1(W) 0 0 0 1 LED2(X) 0 1 1 1 LED3(Y) 1 1 1 0 LED4(Z) 0 1 1 0

This table, which you may notice is exactly the same as Figure 11, is a combination of all previous parts. It shows that different logic gates can be combined and still obtain the same results. An AND gate, or & function is only true when all the inputs are set equal to 1. An inverter outputs the opposite of the input. An NAND gate inverts the AND gates results. An OR gate comes back true if either input, or both inputs, equals one. An exclusive OR gate comes back true when only one of the inputs is true.

Sarah Patten Experiment 1 2/1/2012

In this experiment, one of the most important things learned is how to use the software, and reading the BASYS boards. This was done through the use of simple functions that were already known so that the results could verify what the person knew, and display how the software and other equipment work. Another important thing that was learned was how to write programs to figure out whether writing the program, or creating a schematic diagram is easier, and how they can both be used. Through this experiment I learned how to navigate my way around Xilinx software, how to read a BASYS board, and how to program in Xilinx.