Introduction to System Software, the Simplified Instructional Computer (SIC), and the SIC Two-Pass Assembler

COMP 229 (Section PP, Winter 2006) Week 1 Prof. Richard Zanibbi Concordia University January 9, 2006

Introduction to System Software

Application Software and System Software

Application Software
Designed to solve a specific problem (e.g. read email, browse the internet)

System Software
A set of tools designed to simplify programming for a specific machine (or hardware system) Concerned with using hardware efficiently Used to construct and run Application Software

Source, Object, and Executable Programs

Source Program
Human-readable program specification (e.g. C++, Assembly program) Usually created using a text editor (ASCII file) More Abstract Compile/ Assemble

Object Program
Produced from a source program by compiling/assembling to intermediate machine code Intermediate machine code augmented by:
References (possibly undefined) Additional instructions related to combining the object program with other object programs, and/or executing the object program

Link / Load

Executable Program
Instruction sequence that a computer can directly execute (machine code)
May be produced directly by a compiler/assembler Often produced by combining object programs

System Software: Program Development Environment

Compiler
Translates programming language (usually high-level, such as C/C++, Java, Pascal) to object code or machine code

Assembler
Translates assembly language programs to object programs or machine code

Linker
Combines and resolves references between object programs

Loader
Loads an executable program and starts its execution

(Low-level) Debugger
Used to debug executable programs and their associated object and source programs (trace variables, set breakpoints, etc.)

Example: System Software for Program Development

Simplify developing, combining programs in different languages Place programs in memory for execution Translators Building, Loading Executable Program

System Software: Program Run-Time Environment

Operating System
Abstracts machine-level details (e.g. processes, storage, network, input/output devices, window/display management)

Program Loader (as on previous slide) Program Libraries

Sets of functions for use by other programs (e.g. math library) Static: is included with calling object program when linking Dynamic or Shared: a separate copy of the library in memory is called by programs at run-time

Example: Program Runtime Environment

Simplifies (abstracts) hardware Improves efficiency of hardware use (through sharing)

Math L.

Operating System Components

Machine Architecture for the Simplified Instructional Computer (SIC) and the Extended SIC/XE

The Simplified Instructional Computer (SIC)

SIC: designed to illustrate commonly encountered hardware features and concepts SIC comes in two versions:
standard (SIC) SIC/XE: has additional features

SIC and SIC/XE are upward compatiable

SIC object program will run on an SIC/XE machine

SIC Architecture
CPU

I/O Devices Device (Bin) 0000 0000

Data 0000 0000

Ready ? ?

1111 1111

Registers (#) Name Value (Binary) 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

Memory Address(Hex)
. . .

Value (Binary)
. . .

(0) A 0000 0000 0000 (1) X (2) L

0000 0000 0000

SIC MAX: 0000 0000 3FFF

(8)PC (9)SW

0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

SIC, SIC/XE Architecture

CPU / CPU-X

I/O Devices Device (Bin) 0000 0000

Data 0000 0000

Ready ? ?

1111 1111

Registers (#) Name Value (Binary) 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

Memory Address(Hex)
. . .

Value (Binary)
. . .

(0) A 0000 0000 0000 (1) X (2) L (3) B (4) S (5) T (6) F (8)PC (9)SW

0000 0000 0000

SIC MAX: 0000 0000 3FFF

. . . . . .

SIC/XE MAX: 0000 0000 7FFFF

Memory
Memory contains 8-bit bytes; all addresses are byte addresses 3 consecutive bytes form a word (24 bits: this is also the SIC instruction size) Words accessed by location of first byte in the word (by lowest numbered byte) SIC: 215 bytes in memory (32,768) (32 k), addressed as 0 through 32,767 SIC/XE: 1 megabyte of memory (220 bytes)

SIC, SIC/XE Data Formats

Integers
24-bit binary numbers (2s complement repr.)

Characters
8-bit ASCII codes

Floating Point (SIC/XE only: 48 bits)

1 11 s exponent (e) 36 fraction (f)

s: sign (0: +ve or 0, 1: -ve) exponent: unsigned binary number fraction: decimal point before first bit (1 for normalized values) |floating point number| = f * 2(e-1024)

Registers
Register Purpose of Register (*each is 24 bits, except F)

(0) A Accumulator: arithmetic, I/O (1) X Index: addressing (2) L Linkage: storing return addresses for subroutines
(e.g. for JSUB)
SIC/XE only

(3) B Base: addressing (4) S General working register (5) T General working register (6) F Floating Point Accumulator (48 bits) (8)PC Program Counter: address of the next instruction
to be fetched for execution

(9)SW State Word: information, including condition code

(CC) used for tests (e.g. for I/O)

Input/Output in SIC, SIC/XE

Data is transferred to/from the rightmost 8 bits of the accumulator register (A) Devices assigned unique 8-bit code Three I/O instructions:
Test Device (TD): determines whether device is ready to send/receive data. Sets condition code in Status Word (SW) register. Code < means ready, = means not ready Read Data (RD): transfer device data to A (after device is ready) Write Data (WD): write righmost 8 bits of A to device (after device is ready) Must test (TD) before reading or writing each byte (using RD, WD)

Input Example
CPU

I/O Devices Device (Bin) 0000 0000

Data 0010 1111

Ready ? ?

1111 1111

Registers (#) Name Value (Binary) 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

(0) A 0000 0000 0000 (1) X (2) L (3) B (4) S (5) T (6) F (8)PC (9)SW

Input Example
Device 0 Ready? CPU (TD 0)

I/O Devices Device (Bin) 0000 0000

Data 0010 1111

Ready ? ?

1111 1111

Registers (#) Name Value (Binary) 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

(0) A 0000 0000 0000 (1) X (2) L (3) B (4) S (5) T (6) F (8)PC (9)SW

Input Example
Yes CPU

I/O Devices Device (Bin) 0000 0000

Data 0010 1111

Ready

Y
?

1111 1111

Registers (#) Name Value (Binary) 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

(0) A 0000 0000 0000 (1) X (2) L (3) B (4) S (5) T (6) F (8)PC (9)SW

<

Input Example
Read Device 0 CPU (RD 0)

I/O Devices Device (Bin) 0000 0000

Data 0010 1111

Ready

Y
?

1111 1111

Registers (#) Name Value (Binary) 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

(0) A 0000 0000 0000 (1) X (2) L (3) B (4) S (5) T (6) F (8)PC (9)SW

<

Input Example
0010 1111 CPU

I/O Devices Device (Bin) 0000 0000

Data 0010 1111

Ready

?
?

1111 1111

Registers (#) Name Value (Binary) 0000 0010 1111

0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

(0) A 0000 0000 0000 (1) X (2) L (3) B (4) S (5) T (6) F (8)PC (9)SW

<

SIC Instruction Set

Load, store registers (LDA, LDX, STA, STX, etc.) Arithmetic (ADD, SUB, MUL, DIV): use register A, word in memory; result left in A Compare register A to word in memory (COMP) sets condition code in the State Word register (<, =, or >) Conditional jump instructions (JLT, JEQ, JGT) test setting of the condition code and jump accordingly Subroutines
JSUB: jump to subroutine, putting return address in register L RSUB: jump to the address in register L

...and other instructions. SIC instructions have one format

SIC/XE Instruction Set Additions

All SIC instructions may be used on SIC/XE machine Load and store (new) registers (LDB,STB,etc.) Floating-point arithmetic (ADDF, SUBF, MULF, DIVF) Register-to-register arithmetic (ADDR, SUBR, MULR, DIVR) Move data between registers (RMO) ...and others. A complete listing of instructions for SIC and SIC/XE are provided in Appendix A (for Section 1) of the textbook

SIC/XE Instruction Formats

New addressing modes added for SIC/XE, represented by bit flags Larger memory on SIC/XE prevents addresses from fitting into a 15-bit field. Fixes:
Relative addressing: address relative to the base or program counter registers (Format 3) Extend address field to 20 bits for direct addressing (Format 4: use explicit address)

Additional instructions that do not use memory (Formats 1 and 2)

e.g. Format 2 instructions used for register operations (ADDR S X) e.g. Format 1 instruction NORM normalizes a floating point number

SIC Instruction Format

(24 bits) 8 bits opcode x address 15 bits

All SIC opcodes are of the form XXXX XX00

SIC/XE Instruction Formats

3 (24 bits) opc. 1 (8 bits) 2 (16 bits) (displacement) n i x b p e disp 12 bits

Upward compatability: SIC instructions may be represented using SIC/XE Format 3 (n,i bit flags set to zero)

opcode opcode r1 r2 address 20 bits

4 (32 bits) opc.

n i xbpe

Addressing Modes in SIC, SIC/XE

Target Address (TA)
Address in memory containing the operand for an instruction

Addressing Types: Computing the Target Address Value Relative: TA computed using register B (base-relative) or register PC (program-counter relative)
Base-relative: displacement field interpreted as unsigned int PC-relative: displacement interpreted as 2s complement signed integer

Direct: target address computed without the use of B or PC Indexed: TA computed using the index register (X) (can be used with relative or direct addressing)

Addressing Types: Use of Data at Target Address Simple: target address contains operand Indirect: target address contains address of the operand Immediate: target address is the operand (no lookup)

SIC, SIC/XE Flag Bits

Flag Bit n Effect on Addressing If i=0, indirect addressing (treat data at target address as address of the operand) If n=0, immediate addressing (target address is the operand) Indexed (+X) Base register-relative (+B) Program counter register-relative (+PC) None: indicates Format 4 SIC/XE instruction

i
SIC

x b p e

SIC Addressing
Only direct and simple addressing, with an optional indexed mode (the x bit) is available on a plain SIC machine
8 bits opcode x address 15 bits

Note A: Assembler determines whether access is PC or B-relative

n,i = 0,0 n,i = 1,1

Indexed: x =1

SIC

Note A: Assembler determines whether access is PC or B-relative

n,i = 1,0

n,i = 0,1

Note: Cannot use indexing with Indirect, Immediate Modes Note2: Cannot use b or p relative addressing with Format 4 (e bit): direct addressing only

Addressing Examples
Study the different addressing mode examples in Figure 1.1 (page 11)

SIC, SIC/XE Summary

The Simplified Instructional Computer has two upward compatible versions (SIC and SIC/XE) SIC/XE adds the following to SIC:
Memory (1 Meg instead of 32 K) Registers (B, S, T, F) Floating point data and register (F-48 bits) Instructions and instruction formats (e.g. register and floating point arithmetic) (more sophisicated CPU) Addressing modes (indirect, immediate, etc.)

Look at the example SIC and SIC/XE programs on pages 12-20 in the textbook

SIC Assembly Language

SIC Architecture
CPU

I/O Devices Device (Bin) 0000 0000

Data 0000 0000

Ready ? ?

1111 1111

Registers (#) Name Value (Binary) 0000 0000 0000

0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

Memory Address(Hex)
. . .

Value (Binary)
. . .

(0) A 0000 0000 0000 (1) X (2) L

0000 0000 0000

SIC MAX: 0000 0000 3FFF

(8)PC (9)SW

0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000 0000

Assembly Language and Assembler Directives

Assembly Language
Used to abstract (simplify) writing machine code Mnemonics (commands) used to represent machine operations (e.g. LDA vs. 0000 0000) Symbols (or labels) used to represent memory addresses (e.g. FIRST vs. 1004)

Assembler Directives
Assembly commands that are not machine instructions (pseudo-instructions) Used to generate numeric and character constants, reserve data space (e.g. for variables) Directives also used to indicate the start and ending address of a program

SIC Assembler Directives

Directive Action START Define program name, starting address END Indicates end of program. Optionally indicates first executable instruction BYTE Generate character/hex constant using the required number of bytes WORD Generate one-word integer constant RESB Reserve bytes for a data area RESW Reserve words for a data area

SIC Assembly Program Example: Figure 2.1 (page 45)

Read a record from an input device (Hex F1), write to an output device (Hex 05)

Main Loop

Two-Pass SIC Assembler

Required Tasks when Translating Assembly Programs to Object Code

Convert opcode mnemonics to machine instructions Convert symbolic operands to machine addresses Assemble (build) machine instructions in the correct format Convert data constants (specified in assembler directives) to machine representations Write object program and assembly listing (making use of other assembler directives, such as START)

Two-Pass SIC Assembler

Translates SIC assembly language code to object code, in 2 passes (common for assemblers) Pass 1
Reads assembly program sequentially, assigns addresses to labels

Pass 2
Performs most of the translation to object code, making use of label addresses assigned in Pass 1

Two passes allow forward references to be handled (use before definition)

Example: Assembler Directives and Forward References in Fig 2.1

Two-Pass SIC Assembler: Main Data Structures

OPTAB: Operation Code Table
Normally defined before execution (static) as a hash table Defines machine language equivalents for assembler menmonics: possibly instruction format and length information (e.g. for SIC/XE assembly programs) ADD (mem. address) 18(Hex)

SYMTAB: Symbol Table

Defined during execution (dynamic) as another hash table Stores addresses assigned to labels (address labels) along with related errors FIRST SECOND CAT 1000 4000 ? OK ERROR-DUPLICATE-SYMBOL ERROR-UNDEFINED-SYMBOL

LOCCTR: Location Counter

Used to determine location of labels, instructions, and data areas while reading the source program (sequentially)

Two-Pass SIC Assembler: Passes

Pass 1 (define symbols using Symbol Table) 2. Assign addresses to all statements 3. Save addresses assigned to all labels 4. Processing for assembler directives (e.g. those affecting addresses such as constant definitions with BYTE) 5. Write intermediate file (source w/addresses, errors, etc.) Pass 2 (assemble instructions, generate object program) 8. Assemble instructions (translate opcodes, lookup addresses) 9. Generate data values for constants (e.g. for BYTE, WORD) 10. Additional assembler directive processing 11. Write object program, assembly listing

Two-Pass SIC Assembler: Errors Detected

Pass 1 Duplicate definition of a symbol Invalid opcode (assembler instruction) Pass 2 Undefined symbol reference

Comments

Example: Source File Excerpt (Fig. 2.1)

Comment (omitted) . . .

Error

CAT

DOG CLOOP

INVALID-OPCODE DUPLICATE-SYMBOL

. . .

Example: Intermediate File with Errors After Pass 1 (Altered Fig. 2.2)

Comment (omitted) . . .

Obj. Code/Error

CAT

DOG CLOOP

UNDEFINED-SYMBOL INVALID-OPCODE DUPLICATE-SYMBOL

281030

. . .

Example: Error in Assembly Listing File After Pass 2 (Altered Fig. 2.2)

Two-Pass SIC Assembler: SIC Object Program (Output) Format

SIC Object Code Format

Comprised of three record types:
1. A Header record (name, starting address, length of program) 2. One or more Text records (contain machine code instructions, or object code) 3. An End record (indicates end of program, address of first executable instruction)

Each record is organized into a sequence of columns (not bytes)

Object Code Format for SIC Assembler Output Cols Contents 1 H 2-7 Program name 8-13 (Hex) Starting address of object program 14-19 (Hex) Length of object program in bytes 1 T (Hex) Starting address for object code in the record 8-9 (Hex) Length of object code in bytes 10-69 (Hex) Object Code: 2 cols per byte 1 E 2-7 (Hex) Address of first executable instruction 2-7

Header Text End

Header Text

End

Program Name Addresses (Program start, Object code segment start) Lengths (Program length, Text Record Length) Object Code

Two-Pass SIC Assembler: Pass 1 (Figure 2.4a)

Initialize Location Counter Update Symbol Table

Opcode Handling

Assembler Directives

A Simple Two-Pass SIC Assembler: Pass 2 (Figure 2.4b)

Lookup Symbol Operands

Assembler Directives

For Next Week...

This lecture: covered pp. 1-12 (also read pp. 12-20), and pp. 46-52 Read for next week: pp. 57-108
The SIC/XE assembler (machine-dependent, independent features) Assembler design options