PD - 9.

1230

IRFP360LC
HEXFET Power MOSFET
Ultra Low Gate Charge Reduced Gate Drive Requirement Enhanced 30V V gs Rating Reduced C iss, Coss, Crss Isolated Central Mounting Hole Dynamic dv/dt Rated Repetitive Avalanche Rated Description
This new series of Low Charge HEXFET Power MOSFETs achieve significantly lower gate charge over conventional MOSFETs. Utilizing advanced Hexfet technology the device improvements allow for reduced gate drive requirements, faster switching speeds and increased total system savings. These device improvements combined with the proven ruggedness and reliability of HEXFETs offer the designer a new standard in power transistors for switching applications. The TO-247 package is preferred for commercial-industrial applications where higher power levels preclude the use of TO-220 devices. The TO-247 is similar but superior to the earlier TO-218 package because of its isolated mounting hole.

VDSS = 400V RDS(on) = 0.20 ID = 23A

Absolute Maximum Ratings

Parameter
ID @ T C = 25C ID @ T C = 100C IDM PD @T C = 25C VGS EAS IAR EAR dv/dt TJ TSTG Continuous Drain Current, V GS @ 10V Continuous Drain Current, V GS @ 10V Pulsed Drain Current Power Dissipation Linear Derating Factor Gate-to-Source Voltage Single Pulse Avalanche Energy Avalanche Current Repetitive Avalanche Energy Peak Diode Recovery dv/dt Operating Junction and Storage Temperature Range Soldering Temperature, for 10 seconds Mounting torque, 6-32 or M3 screw.

Max.
23 14 92 280 2.2 30 1200 23 28 4.0 -55 to + 150 300 (1.6mm from case) 10 lbfin (1.1Nm)

Units
A W W/C V mJ A mJ V/ns C

Thermal Resistance
Parameter
RJC RCS RJA Junction-to-Case Case-to-Sink, Flat, Greased Surface Junction-to-Ambient

Min.

Typ.
0.24

Max.
0.45

Units
C/W 40

Revision 0

IRFP360LC
Electrical Characteristics @ TJ = 25C (unless otherwise specified)
V(BR)DSS
V(BR)DSS/TJ

RDS(ON) VGS(th) gfs IDSS IGSS Qg Qgs Qgd td(on) tr td(off) tf LD LS Ciss Coss Crss

Parameter Drain-to-Source Breakdown Voltage Breakdown Voltage Temp. Coefficient Static Drain-to-Source On-Resistance Gate Threshold Voltage Forward Transconductance Drain-to-Source Leakage Current Gate-to-Source Forward Leakage Gate-to-Source Reverse Leakage Total Gate Charge Gate-to-Source Charge Gate-to-Drain ("Miller") Charge Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Internal Drain Inductance Internal Source Inductance Input Capacitance Output Capacitance Reverse Transfer Capacitance

Min. 400 2.0 13

Max. Units Conditions V VGS = 0V, ID = 250A V/C Reference to 25C, I D = 1mA 0.20 VGS = 10V, I D = 14A 4.0 V VDS = VGS, ID = 250A S VDS = 50V, ID = 14A 25 VDS = 400V, VGS = 0V A 250 VDS = 320V, VGS = 0V, T J = 125C 100 VGS = 20V nA -100 VGS = -20V 110 ID = 23A 28 nC VDS = 320V 45 VGS = 10V, See Fig. 6 and 13 VDD = 200V ID = 23A ns RG = 4.3 RD = 7.9, See Fig. 10 Between lead, 5.0 6mm (0.25in.) nH from package 13 and center of die contact 3400 VGS = 0V 540 pF VDS = 25V 42 = 1.0MHz, See Fig. 5

Typ. 0.49 16 75 42 50

Source-Drain Ratings and Characteristics

IS
ISM

VSD trr Qrr ton

Parameter Continuous Source Current (Body Diode) Pulsed Source Current (Body Diode) Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge Forward Turn-On Time

Min. Typ. Max. Units 400 5.7 23 A 92 1.8 600 8.6 V ns C

Conditions MOSFET symbol showing the integral reverse p-n junction diode. TJ = 25C, I S = 23A, V GS = 0V TJ = 25C, I F = 23A di/dt = 100A/s
S+LD)

Intrinsic turn-on time is negligible (turn-on is dominated by L

Notes: Repetitive rating; pulse width limited by max. junction temperature. ( See fig. 11 ) ISD 23A, di/dt 170A/s, V DD V(BR)DSS, T J 150C Pulse width 300s; duty cycle 2%.

VDD = 25V, starting T J = 25C, L = 4.0mH R G = 25, IAS = 23A. (See Figure 12)

IRFP360LC
1000
VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP

1000

I , Drain-to-Source Current (A) D

I , Drain-to-Source Current (A) D

100

100

VGS 15V 10V 8.0V 7.0V 6.0V 5.5V 5.0V BOTTOM 4.5V TOP

10

10

4.5V

4.5V

0.1 0.1 1

20s PULSE WIDTH TC = 25C

10 10 0

0.1 0.1 1

20s PULSE WIDTH TC = 150C

10 100

DS

, Drain-to-Source Voltage (V)

DS

, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics, TC = 25oC

Fig 2. Typical Output Characteristics, TC = 150oC

R DS(on) , Drain-to-Source On Resistance (Normalized)

1000

3.0

I D = 23A

I D , Drain -to -S ource C urrent (A)

2.5

100

2.0

T J = 15 0 C
10

TJ = 25C

1.5

1.0

0.5

0.1 4 5 6 7

V DS = 50V 2 0 s P U LS E W ID TH
8 9 10

0.0 -60 -40 -20 0 20 40 60 80

VGS = 10V
100 120 140 160

V G S , G a te-to-S o urce V olta ge (V )

TJ , Junction Temperature (C)

Fig 3. Typical Transfer Characteristics

Fig 4. Normalized On-Resistance Vs. Temperature

IRFP360LC
60 0 0 20

, Gate-to-Source Voltage (V)

50 0 0

V GS = 0V, f = 1MHz C iss = Cgs + C gd , Cds SHORTED C rss = C gd C oss = C ds + C gd

I D = 23A VDS = 320V VDS = 200V VDS = 80V

16

C, Capacitance (pF)

40 0 0

Ciss

12

30 0 0

20 0 0

Coss

GS

10 0 0

Crss
0 1 10 10 0 0 0 30 60

FOR TEST CIRCUIT SEE FIGURE 13

90 12 0

V DS, Drain-to-Source Voltage (V)

QG , Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs. Drain-to-Source Voltage

Fig 6. Typical Gate Charge Vs. Gate-to-Source Voltage

100

1000

ISD , Reverse Drain Current (A)

OPERATION IN THIS AREA LIMITED BY R DS(on)

I D , Drain Current (A)

100

10s

10

TJ = 150C

T = 25C
J

100s
10

1ms

1 0 0.4 0.8 1.2

VGS = 0V
1.6 2

1 1

TC = 25C TJ = 150C Single Pulse

10 100

10ms

1000

VSD , Source-to-Drain Voltage (V)

VDS , Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode Forward Voltage

Fig 8. Maximum Safe Operating Area

IRFP360LC
VDS
25

RD

VGS RG

D.U.T. VDD

ID, Drain Current (Amps)

20

10 V
15
Pulse Width 1 s Duty Factor 0.1 %

Fig 10a. Switching Time Test Circuit

10

0 25 50 75 100 125 150

TC , Case Temperature (C)

Fig 9. Maximum Drain Current Vs. Case Temperature

Fig 10b. Switching Time Waveforms

T herm al R esponse (Z thJC )

D = 0 .5 0

0.1

0 .2 0 0 .1 0 0 .0 5 0 .0 2
PD M

0.01

0 .0 1 S ING L E P UL S E (T H E R M A L R E S P O N S E )
N o te s : 1 . D u ty fa c to r D = t / t 1 2

1
t2

0.001 0.00001

2 . P e a k TJ = P D M x Z th J C + T C

0.0001

0 .001

0.01

0.1

10

t 1 , R ectang ular Pulse D ura tion (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

IRFP360LC
EAS , Single Pulse Avalanche Energy (mJ)
30 00

TOP
25 00

ID 10A 15A BOTTOM 23A

10 V

20 00

Fig 12a. Unclamped Inductive Test Circuit

15 00

10 00

5 00

VDD = 50V
25 50 75 100 125 150

Starting TJ , Juntion Temperature (C)

Fig 12b. Unclamped Inductive Waveforms

Fig 12c. Maximum Avalanche Energy Vs. Drain Current

10 V

Fig 13a. Basic Gate Charge Waveform

Fig 13b. Gate Charge Test Circuit

IRFP360LC
Peak Diode Recovery dv/dt Test Circuit
D.U.T Circuit Layout Considerations Low Stray Inductance Ground Plane Low Leakage Inductance Current Transformer

RG

dv/dt controlled by R G Driver same type as D.U.T. ISD controlled by Duty Factor "D" D.U.T. - Device Under Test

VDD

* VGS = 5V for Logic Level Devices Fig 14. For N-Channel HEXFETS

IRF360LC
Package Outline
TO-247AC

Part Marking Information

TO-247AC

EXAMPLE : THIS IS AN IRFPE30 WITH ASSEMBLY LOT CODE 3A1Q

INTERNATIONAL RECTIFIER LOGO ASSEMBLY LOT CODE

PART NUMBER IRFPE30 3A1Q 9302 DATE CODE (YYWW) YY = YEAR WW WEEK

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331 EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: (44) 0883 713215 IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 3L1, Tel: (905) 475 1897 IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: 6172 37066 IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: (39) 1145 10111 IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo 171 Tel: (03)3983 0641 IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, 0316 Tel: 65 221 8371 Data and specifications subject to change without notice.