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Tutorial-5
Low Noise Amplifiers (LNA) and
Mixers

Problem-5.1 (Tutorial):
Historically the LNAs were designed in compound IV technologies like GaAs, InP and recently
in Si bipolar technologies. The CMOS transceiver design trend is very new and one of the active
area in research today due to the extremely low per transistor cost of MOSFETs.
This problem compares the transconductances of the npn BJT and an n-channel MOSFET. The
MOSFET has
n
C
ox
= 100 A/V
2
, V
TN
= 0.5V, and (W/L) = (30 m/3m). The MOSFET is
biased in saturation (note that this is equivalent to the BJT being forward active, please do not get
confused, BJT can have up to four operating modes while FET has only two) with I
D
= 500 A.
a) What is the collector current I
C
such that the bipolar transistor has the same
transconductances as the MOSFET?
b) If the bipolar transistor is biased with I
C
= 500 A, what must the width of the
MOSFET to match the transconductance of the BJT? The channel length is
maintained at L = 3 m. What is the drawback of using large W?
This shows that the BJT is much attractive compared to FET for low power and high speed
design. But Low cost per transistor and capability to integrate million of transistors on chip
make MOSFET a popular design brick.

Solution:
2
100
ox
xC A V =
0.5 V N V =
0.5 W L V =
500
D
I A =

a).
The MOSFET transconductance at a given bias point
0
30
2. . . . 2.100 . .500 1
3
m x D
W
g n C I mA V
L
= = =
BJT transconductance
1
c
m c th m
k
I
g I V g
V
= =

26 .1 26
c
I mV mA V A = =
26
1
500
c
m
D
I A for BJT
for g mA V
I A for MOSFET

=
=
`
e =
)

This difference directly translate into power dissipation
3 ? 500
c
L m W for MOSFET I A = = e =
0.5
19
26
c
m
th
I mA
g mA V
V mA
= = ~

R
S

R
L
V
out
R
L

-
R
S

+
out n V ,
2

2
0
0
2. . . .
1
2. . . .
m x D
x D
W gm
g n C I W
L
n C I
L

e = =
( )
2
19
11, 000
1
2.100 . .500
3
m
W m

=
So 11, 000 W m =
This is really big transistor! This will reduce the speed of transistor due to very large capacitance
associated with it. The device will be 100 time slower than100 3 m m device roughly.
2
nd
problem will be significant biase variation due to variation in
t
V

Problem-5.2(Tutorial):
The Gain, NF, Impedance match and Power are four important parameters in LNA design.
Unfortunately there is no optimum point in design space where all of above four quantities are
optimum. In principle we can get optimum noise figure using optimum source impedance.
Usually the source is an antenna and we have very little control over the impedance on antenna
without sacrificing antenna efficiency. The parameter we can control is the input impedance of
the LNA, which can be optimized for minimum NF.
The maximum power transfer theorem also dictates optimum input impedance.
a) Calculate the expression for NF of the circuit shown below?

b) Calculate the expression for maximum power transfer for the circuit shown above.
c) Is the optimum input impedance value same for minimum noise figure and maximum
power transfer?

Solution:

b).
For max power transfer
S L
R R =

c).
From Razavi (2.84)
2
2
, 1
.
4
r OUT
S
V
NF
A KTR
= (1)
So,
Here ) || ( 4 ,
2
L S
out n R R kT V =
L
S L
R
A
R R
e =
+

(1)
2
2
, 1
.
4
n OUT
S
V
NF
A KTR
=
2
4 ( ) 1
.
4
S L
S
L
S L
KT R R
NF
KTR
R
R R
=
| |
|
+
\ .

2
.
4
1
.
4
S L
S L
S
L
S L
R R
KT
R R
NF
KTR
R
R R
| |
|
+
\ .
=
| |
|
+
\ .

1 1
L S S S
L L L
R R R R
NF NF
R R R
+
= = + = +
So ) ) b C e That for optimum NFe max power transfer. The value of
L
R is not same. For
Low NF .
L
R ||

Problem-5.3(Tutorial):
The NF=2dB means that LNA generates noise equivalent to the thermal noise of 29 resistor
which is 0.73nV Hz for 50 match. The common 741 opamp has equivalent input referred
noise of 20nV Hz . The ultra low noise op-amps like OP-27 and AD797 used as preamplifiers
in infrared sensors have noise of 1nV Hz and are usually designed in bipolar technologies. It
is much harder to design an ultra low noise opamp using MOSFET at low frequencies due to the
dominant 1/f noise. It is good news that we have to design LNA using CMOS at much higher
frequency compared 1/f knee of MOS transistors.

R
D

n I
2

AC
out n V ,
2

D
R n I ,
2

a) Derive the expression for gain and input referred noise of the amplifier shown in figure
below. The thermal noise and flicker noise of NMOS is modeled as
2
2 2
, ,1
2
4 ( )
3
f m
n Thermal n f
m
ox
K g
I KT g and I
C WLf
= =

b) Calculate input referred thermal noise at room temperature if W/L =100/0.35um , Id =
100uA, Rd= 16.5K, C
ox
= 1.9X10
-3
PF/(m)
2
and K
f
= 1.2X10
-25
V
2
F,
n
= 0.006 m
2
/v-s

Solution:
a).
We model the Thermal and flicker noise of MI by two current sources which are summed up in
2
1 n I
' ' ker
2 2 2
1
thermal fli
n n n I I I = +
2
2
1
0
2
4
3
n
x
Kfg m
I KT gm
C WLf
= +
The Thermal noise of Resistor
D
R is
'
2
4
RD
D
n
KT
I
R
=
,
2
2 2
0
2 4
4
3
n OUT
x D
Kfgm KT
V KT gm R D
C WLf R
| |
| |
= + +
| |
\ .
\ .

We assume here that all noise sources are uncorrelated. The
,
2
n OUT V is power in 1Hz at frequency
f.
The Gain of Common Source Amplifier
m D
A g R =
So
, ,
2 2 2
n in n out V V A =
2 2
2 2
0
2 4
4
3
x D
Kfgm KT R D
KT gm
C WLf R gm R D
(
| |
= + +
( |
\ .

,
2
2 2
2 1 4
4 .
3
n in
ox
Kf KT
V KT
gm C WL f gm R D
= + +
Please note that @ lower frequencies the noise will be higher.

b).
Simply plug in the given values and compare result with 741 OP-amp.
,
2
2 2
2 1 4
4 .
3
n in
ox
Kf KT
V KT
gm C WL f gm R D
= + +
100 0.35 W L =
23
1.38 10 K J K

=
100
d
I A =
16.5
d
R Kr =
( )
2
15 2
1.9 10 , 0.06 sec
ox
C F m n m v

= =
25 2
1 10 Kf V F

=
( ) 2 1.07
m ox D
g nC W L I mA V = =

Plug in values @ frequency of 1 GHz
,
2
,
42.4 n in
in in
V V V Hz = =

For @ f=1 KHz
,
2
,
42.4 n in
in in
V V mV Hz = =

Note:
This noise is much higher than the noise of opamp 741, Also these values may not be very
accurate due to lack of availability of exact values for Kf and Cox for a given technology.

Problem-5.4(Tutorial):
Low noise amplifier using the Common Gate topology. The Common gate circuits have
inherently low input impedances that make them ideal when trying to match to 50 systems with
associated NF of ~5dB. LNAs with source degeneration offer lower noise figures ~2-3dB but
need some matching network to match the 50 source resistance.
Estimate the L1, L2 and width of MOS transistor of LNA shown in figure below.
Replacing the load resistor with inductor makes the circuit a narrow band LNA. C
o
is
parasitic capacitance estimated to be 0.6pF. Transistor Length = 0.6m,
n
C
ox
=
4.54X10
-5
and C
gs
=0.48pF

.

(Biasing details omitted)

Solution:
Gain Av g R = =
.
g R
Av
R jwCo
=
2 1 2
0.5
L
Co Cgd Cbd Cbd C PF = + + +

Narrow Band:
1
.2 . 2
O V
O O O L
g Q
f and A
C f C L t t
= =

g
m
:
1
gs
IN
IN D
IN m gs
V
V
R I
I g V gm
= = = =
1
50 20
IN
R mS
gm
= O = =
2
OX D
W
gm nC I
L
=
Choose 10 0.6
D
I mA L m = =
2
min
.
4390
2
n OX D
gm L
W m
C I

= =
For more elastic value
100 I mA =
4390 W m = e 100
D
I mA =

L1:
gs
o
C L
f
1
2
1
t
=
2.4
0.48
O
f GHz
Cgs Pf
=
=

2
1
1
2
8.9
O
f
L nH
Cgs
t
| |
|
\ .
= =
1
8.9 L nH =

L2:
Placing Inductor in place or
R makes amplifier to be tuned to the centre frequency
0.6
O
C PF =
So
2
1
2 .
O
O
f
L C t
=
( )
2
2
2
1
1 2 2.4 0.6 7.3
2
O
O
L C G PF nH
f
t
t
| |
= = =
|
\ .

2
7.3 L nH =

Voltage Gain:
2
m L
V
O O
g Q
A
C f t
=
3
for on chip Inductor
Q

~

So,
1 50.3
6.6
0.6 .2 2.4
V
A
PF G t
= =

( ) 20log 6.6 16.4
V
A dB dB = =
16.4 Gain dB =

Note:
We havent considered NF during design calculation. Simulators are used for this purpose to
estimate for desired NF and power consumption.
The Hand calculations are just for start of simulation from some working values. In noise
calculation model accuracy is also very important.

Problem-5.5(Tutorial):
Usually mixers are categorized as active and passive mixers. Passive mixers have better IM3
performance but no conversion gain and hence higher noise figures compared to active mixers.
We can view the categorization from another angle, single balanced and double balanced mixers.
Single balanced mixers are much less complex but have inferior isolation between LO and RF-IF
ports.

A double balanced passive mixer is shown with local oscillator wave form V
LO
(t). Assume that
V
RF
(t)= A
RF
cos(e
RF
t) and V
LO
(t) as shown below.
a) Find the conversion gain of mixer in dB if the switches are ideal.
b) Find the conversion gain of mixer in dB if the switches have the on resistance of Rs/2.

Solution:
Assume the switches has ON resistance of RON
( )
( )
( ) .
2 2
S
IF RF LO t
S ON
R
V t V t V
R R
| |
(
=
|

+
\ .

( ) ( ) ( )
4 4
( ) . 3
2 2 3
S
IF RF RF O O
S ON
R
V jW A Cos W t Cos WL t Cos WL t t
R R t t
| |
(
= +
|
(
+

\ .

( ) ( )
4
( ) .
2 2
S
IF RF O
S ON
R ARF
V jW Cos W t Cos WL t
R R t
| |
~
|
+
\ .

( )
2
( )
1
2 2
2
S
IF RF O
S ON
Cosx Cos y
R ARF
V jW Cos W WL t
Cos x y R R t
(
| |
( = (
|

= +
( \ .

The Conversion gain
1
2
2 2
F S
S ON
C
RF
V R
G
R R V t
| |
= =
|
+
\ .

a).
0
ON
R =
2 1
2 2
S
S ON
C
R
G
R R t t
| |
= =
|
+
\ .

1 1
20log 9.94
C C
G G dB
t t
| |
= = =
|
\ .

9.94
C
G dB =

b).
0.5
ON
R Rs =
13.46
C
G dB =

Problem-5.6(Tutorial):
The nature of RF and LO signals are different. The two single balanced active mixers shown
below are not exact replica of each other.
a) Considering the mismatches and parasitic capacitances of M1 and M2, which circuit has
greater feed through from LO to IF?