Internal Circuit Diagram

T H E
W O R L D
L E A D E R
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L O G I C
P R O D U C T S
Logic Selection Guide

Second Half 2000
Our Minds Are Always On Logic Products, So Yours Doesnt Have To Be.
LOGIC OVERVIEW
FOCUS ON CBT AND CBTLV PRODUCTS
FUNCTIONAL INDEX
FUNCTIONAL CROSS REFERENCE
DEVICE SELECTION GUIDE
PACKAGING AND SYMBOLIZATION INFORMATION
LOGIC PURCHASING TOOL/ALTERNATE SOURCES
LOGIC SELECTION GUIDE

SECOND HALF 2000
IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TIs standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customers applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TIs publication of information regarding any third partys products or services does not constitute TIs approval, warranty or endorsement thereof.
Copyright 2000, Texas Instruments Incorporated
INTRODUCTION
CONTACTS/INFORMATION
Texas Instruments (TI) offers a full spectrum of logic functions and technologies from the mature to the advanced, including bipolar, BiCMOS, and CMOS. TIs process technologies offer the logic performance and features required for modern logic designs, while maintaining support for more traditional logic products. TIs offerings include products in the following process technologies or device families:

TI HOME PAGE
AC, ACT, AHC, AHCT, ALVC, AVC, FCT, HC, HCT, LV, LVC, TVC ABT, ABTE, ALB, ALVT, BCT, HSTL, LVT, SSTL, SSTV BTA, CBT, CBTLV, FB, FIFO, GTL, GTLP, JTAG, PCA ALS, AS, F, LS, S, TTL
http://www.ti.com
TI LOGIC HOME PAGE
http://www.ti.com/sc/logic
TI offers specialized, advanced logic products that improve overall system performance and address design issues, including testability, low skew requirements, bus termination, memory drivers, and low-impedance drivers. TI offers a wide variety of packaging options, including advanced surface-mount packaging in fine-pitch small-outline and ball-grid-array (BGA) packages. The newest package for logic is the MicroStar Junior ultra-thin, fine-pitch BGA. MicroStar Junior complements the MicroStar BGA package to deliver high performance and allows the designer to double input/output density in the same circuit-board area or reduce board area by one-half, compared to standard packaging technology. For further information on TI logic families, refer to the list of current TI logic technical documentation provided in this preface. For an overview of TI logic, see Section 1. Section 2, new to this issue, is Focus on CBT and CBTLV Products, a brief overview of TI CBT and CBTLV technology and products. Sections 3, 4, and 5 contain a functional index, functional cross-reference, and device selection guide, respectively. These sections list the functions offered, package availability, and applicable literature numbers of data sheets. Appendix A includes additional information about packaging and symbolization. Appendix B provides a cross-reference to match other manufacturers products to those of TI. Data sheets can be downloaded from the internet at http://www.ti.com or ordered through your local sales office or TI authorized distributor. Please see the back cover of this selection guide for additional information.
TI MILITARY SEMICONDUCTOR HOME PAGE
http://www.ti.com/sc/docs/military
PRODUCT INFORMATION CENTER
http://www.ti.com/ cgi-bin/sc/support.cgi
DATA SHEETS
http://www.ti.com/sc/logic
DOC, MicroStar BGA, MicroStar Junior, OEC, SCOPE, Shrink Widebus, TI, TI-OPC, UBT, Widebus, and Widebus+ are trademarks of Texas Instruments. v
CURRENT TI LOGIC TECHNICAL DOCUMENTATION

Listed below is the current collection of TI logic technical documentation. These documents can be ordered through a TI representative or authorized distributor by referencing the appropriate literature number.
Document
Literature Number
ABT Logic Advanced BiCMOS Technology Data Book (1997) . . . . . . . . . . . . . . . . . . . . . . . SCBD002C AC/ACT CMOS Logic Data Book (1997) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCAD001D AHC/AHCT Logic Advanced High-Speed CMOS Data Book (April 2000) . . . . . . . . . . . . . . SCLD003B AHC/AHCT Designers Guide (February 2000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCLA013D ALS/AS Logic Data Book (1995) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SDAD001C ALVC Advanced Low-Voltage CMOS Data Book (June 1999) . . . . . . . . . . . . . . . . . . . . . . . SCED006A AVC Advanced Very-Low-Voltage CMOS Data Book (March 2000) . . . . . . . . . . . . . . . . . . . SCED008B BCT BiCMOS Bus-Interface Logic Data Book (1994) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCBD001B Boundary-Scan Logic IEEE Std 1149.1 (JTAG) Data Book (1997) . . . . . . . . . . . . . . . . . . . . SCTD002A IEEE Std 1149.1 (JTAG) Testability Primer (1997) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SSYA002C CBT (5-V) and CBTLV (3.3-V) Bus Switches Including LV Analog Switches Data Book (September 2000) . . . . . . . . . . . . . . . . . . . . . . . . SCDD001C Design Considerations for Logic Products Application Book (1997) . . . . . . . . . . . . . . . . . . . SDYA002 Design Considerations for Logic Products Application Book, Volume 2 (September 1999) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SDYA018 F Logic Data Book (1994) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SDFD001B GTL, BTL, and ETL Logic Data Book (1997) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCED004 GTL/GTLP Product Information (January 2000) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCED009 HC/HCT Logic High-Speed CMOS Data Book (1997) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCLD001D LVC and LV Low-Voltage CMOS Logic Data Book (1998) . . . . . . . . . . . . . . . . . . . . . . . . . . . SCBD152A LVT Logic Low-Voltage Technology Data Book (1998) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCBD154 Mobile Computing Logic Solutions Data Book (July 1999) . . . . . . . . . . . . . . . . . . . . . . . . . . . SCPD002 PC, Workstation, Server, and High-Speed Memory Interface Logic Solutions Data Book (July 1999) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SCPD003 Semiconductor Group Package Outlines Reference Guide (1999) . . . . . . . . . . . . . . . . . . . SSYU001E See www.ti.com/sc/logic for the most current data sheets.
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TABLE OF CONTENTS
SECTION 1 - LOGIC OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

Welcome to the World of TI Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Selecting a Logic Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Product Life Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Family Performance Positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Logic Vendor Partnerships . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Complete Low-Voltage Market Coverage and Standardization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 3- and 5-V TTL and CMOS Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Interfacing Mixed Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 Special Dual-Supply Level Shifters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Bus-Hold Input Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Partial-Power-Down Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Power-Up 3-State/Hot Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Live Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Precharge Function Avoids Data Corruption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Damping Resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 DOC Circuitry Provides the Best-Possible Signal Integrity Without Compromising Speed . . . . . . . . . . . . . 120 Dynamic Output Control (DOC) Available With AVC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Advanced-Logic Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 Little Logic (Single Gate and Dual Gates) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Little-Logic Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 TIs New GTLP Family Consolidates the Best Features of Existing Backplane Logic . . . . . . . . . . . . . . . . . . . 125 GTLP Specially Designed for High-Performance Backplanes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 AVC Advanced Very-Low-Voltage CMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 CBT vs CBTLV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 CBT/CBTLV Product Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 Packaging Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 Device Names and Package Designators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 TI DSPS-Related FIFO Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 TI FIFO Product-and-Technology Roadmap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 TI FIFOs Optimize System Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
SECTION 2 - FOCUS ON CBT AND CBTLV PRODUCTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

What Are We Talking About? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 What Are CBT and CBTLV Switches? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 When Are CBT and CBTLV Switches Used? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Lets Get Technical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Other Types and Specialized Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Want More Information? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
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SECTION 3 - FUNCTIONAL INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

Backplane Logic (GTL, GTLP, FB+/BTL, and ABTE/ETL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Drivers and Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Boundary-Scan IEEE Std 1149.1 (JTAG) Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Boundary-Scan (JTAG) Bus Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Boundary-Scan (JTAG) Support Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Inverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Noninverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311 Bus Exchange/Multiplexing Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311 Standard Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311 Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313 Binary Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313 Decade Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314 Decoders, Encoders, and Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Decoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Priority Encoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315 315 316 317
FIFOs (First-In, First-Out Memories) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318 Asynchronous FIFO Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318 Synchronous FIFO Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319 Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-Type Flip-Flops (3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-Type Flip-Flops (non 3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Other Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gates and Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NAND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AND-OR-Invert Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Exclusive-OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Exclusive-NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gate and Delay Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320 320 321 321 322 322 323 324 324 325 325 325 326 326
Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327 D-Type Latches (3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327 Other Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 328
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TABLE OF CONTENTS (continued)
SECTION 3 (continued)
Little Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NAND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Exclusive-OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-Type Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Noninverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standard Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
328 328 328 329 329 329 329 329 329 330 330
Memory Drivers and Transceivers (HSTL, SSTL, and SSTV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330 Buffers, Drivers, and Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331 Specialty Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Adders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Arithmetic Logic Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bus-Termination Arrays and Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Comparators (identity) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Comparators (magnitude) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Phase-Locked Loops (PLLs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Drivers/Multipliers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ECL/TTL Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Frequency Dividers/Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Monostable Multivibrators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parity Generators and Checkers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Translation Voltage Clamps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage-Level Shifters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parity Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Registered Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standard Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Bus Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Bus Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Bus Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Bus Exchangers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332 332 332 332 333 333 333 333 334 334 334 335 335 335 335 336 336 336 337 340 340 341 341
SECTION 4 - FUNCTIONAL CROSS REFERENCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1
ix
SECTION 5 - DEVICE SELECTION GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

ABT Advanced BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 ABTE/ETL Advanced BiCMOS Technology/Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . 511 AC/ACT Advanced CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513 AHC/AHCT Advanced High-Speed CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521 ALB Advanced Low-Voltage BiCMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 527 ALS Advanced Low-Power Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 529 ALVC Advanced Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 535 ALVT Advanced Low-Voltage BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 539 AS Advanced Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 541 AVC Advanced Very-Low-Voltage CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545 BCT BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 547 64BCT 64-Series BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 547 BTA Bus-Termination Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 551 CBT Crossbar Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 553 CBTLV Low-Voltage Crossbar Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 557 CD4000 CMOS B-Series Integrated Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 559 74F Fast Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 563 FB+/BTL FutureBus+/Backplane Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 567 FCT Fast CMOS TTL Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 569 FIFO First-In, First-Out Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577 GTL Gunning Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 581 GTLP Gunning Transceiver Logic Plus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 583 HC/HCT High-Speed CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 587 IEEE Std 1149.1 (JTAG) Boundary-Scan Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 597 Little Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5101 LS Low-Power Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5105 LV Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5111 LVC Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5115 LVT Low-Voltage BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5119 PCA I2C Inter-Integrated Circuit Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5123 S Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5125 SSTL/SSTV Stub Series-Terminated Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5129 HSTL High-Speed Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5129 TTL Transistor-Transistor Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5131 TVC Translation Voltage Clamp Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5135
APPENDIX A - PACKAGING AND SYMBOLIZATION INFORMATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1

Device Names and Package Designators for TI Logic Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5 Device Names and Package Designators for Logic Products Formerly Offered by Cypress Semiconductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A6 Device Names and Package Designators for Logic Products Formerly Offered by Harris Semiconductor . . A7 Logic Symbolization Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9 Moisture Sensitivity by Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A15 Packaging Cross-Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A17
APPENDIX B - LOGIC PURCHASING TOOL/ALTERNATE SOURCES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1
LOGIC OVERVIEW
FUNCTIONAL INDEX
11
LOGIC OVERVIEW
12
SECTION 1 LOGIC OVERVIEW
CONTENTS
Welcome to the World of TI Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Selecting a Logic Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Product Life Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Family Performance Positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Logic Vendor Partnerships . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Complete Low-Voltage Market Coverage and Standardization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 3- and 5-V TTL and CMOS Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111 Interfacing Mixed Voltages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 112 Special Dual-Supply Level Shifters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Bus-Hold Input Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114 Partial-Power-Down Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Power-Up 3-State/Hot Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116 Live Insertion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 117 Precharge Function Avoids Data Corruption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118 Damping Resistors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 DOC Circuitry Provides the Best-Possible Signal Integrity Without Compromising Speed . . . . . . . . . . . . . 120 Dynamic Output Control (DOC) Available With AVC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Advanced-Logic Feature List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 Little Logic (Single Gate and Dual Gates) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123 Little-Logic Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 TIs New GTLP Family Consolidates the Best Features of Existing Backplane Logic . . . . . . . . . . . . . . . . . . . 125 GTLP Specially Designed for High-Performance Backplanes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126 AVC Advanced Very-Low-Voltage CMOS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127 CBT vs CBTLV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 CBT/CBTLV Product Family . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 129 Packaging Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130 Device Names and Package Designators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131 TI DSPS-Related FIFO Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 132 TI FIFO Product-and-Technology Roadmap . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 133 TI FIFOs Optimize System Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 134
13
14
Welcome to the World of TI Logic

Specialty
GTLP GTL SSTL BTL ETL From Harris
5-V Logic
CD4000 LS AC/ACT F TTL
From Cypress
FCT CBT LV
3.3-V Logic
AHC AC LV ALVT ALVC LVC ALB LVT CBTLV
HSTL
TVC
HC/HCT AS ABT
AVC
S AHC/ AHCT BCT
ALS
2.5-V Logic
LV AVC ALVT CBTLV LVC ALVC
1.8-V Logic
LVC ALVC
15 15
AVC
16
Selecting a Logic Family...

Designer Careabouts... TI Offers...
Best fit first High Speed CBT, CBTLV, AVC, ALB, ALVT, ALVC, ABT, LVT, AHC - Critical Requirements: Slew Rate and Propagation Delay High Drive - Incident Wave Switching ALVT, LVT, ABT, ALB, ALVC, LVC, AVC
highest interest first
Low Power - Migrate to Lower-Voltage Families
CBT, CBTLV, LVC, AHC, ALVC, LV, AVC, ALVT, LVT
Ease of Use LVC, ALVT, LVT, AHC, AVC, LV, ABT, CBT, CBTLV - Bus Hold, 5-V Tolerance, IOFF, Hot Insertion
AVC DOC is a trademark of Texas Instruments.
products with DOC increase dynamic drive during switching
Product Life Cycle

HC BCT ACL ABT LVT LV ALVC CBTLV AVC GTLP ALVT Little Logic LVC LS CBT S AHC TTL FCT ALS F AS CD4000 Bipolar CMOS BiCMOS
Introduction
Growth
Maturity
Decline
Obsolescence
Investment levels for new products are at an all-time high. End-equipment requirements are accelerating new product introduction. TI remains committed to be the last supplier in the older families.
17 17
IOL Drive (mA)
18
Family Performance Positioning

GTLP 64 ALVT LVT ABT BCT 74F GTLP 5V 3.3 V 2.5 V 1.8 V
BCT ABT 74F AC/T HC/T AHC/T CBT CBTLV LV LVC ALVC LVT ALVT ALB GTLP AVC
BiCMOS Technology Advanced BiCMOS Technology 74F Bipolar Technology Advanced CMOS High-Speed CMOS Advanced High-Speed CMOS Crossbar Technology Low-Voltage CBT Low-Voltage HCMOS Low-Voltage CMOS Advanced Low-Voltage CMOS Low-Voltage BiCMOS Technology Advanced Low-Voltage BiCMOS Technology Advanced Low-Voltage BiCMOS Gunning-Transceiver Logic Plus Advanced Very-Low-Voltage CMOS
24
ALB ALVC ALVT
AVC has a much higher dynamic drive during the switching stage and is specified at 2.5 V and 1.8 V
LVC
AC/ACT
ALVC LV AVC AC LVC AHC/ AVC AHCT LV AVC AHC ALVC LVC CBT CBTLV 5 10 CBTLV Performance - max tpd (ns) 12 8
HC/HCT LV 15 20
Logic Vendor Partnerships

Performance Range
5-V high performance 5-V low performance 3-V high performance 3-V medium performance 3-V low performance 2.5-V high performance
19
TI
ABT AHC ALVT LVT ALVC LVC LV AVC
Philips Hitachi
ABT AHC ALVT LVT ALVC LVC LV AVC ABT
IDT
Toshiba FSC
ABT VHC ABT-C VHC
On
VHC
LVT ALVC LVC LV LV
ALVC LVC
VCX LCX LVQ
LVT VCX LCX LVQ LVX
VCX LCX LVQ LVX
Complete Low-Voltage Market Coverage and Standardization

Performance
1.8 V 2.5 V 3.3 V 5 V HC, LS, S, TTL AHC, LV ACT, AHC, ALS, AS, 74F LVC LVC LVC
TI Philips
110
ABT LVT ALVC ALVC ALVC

Hitachi IDT
ALVT ALVT
AVC AVC AVC
LVC AHC LVT ALVC ALVT AVC 6.5-ns speed 8.5-ns speed (5 V) 4-ns speed 3-ns speed 2.4-ns speed <2-ns speed 13.5-ns speed (3.3 V) 24/24-mA drive 32/64-mA drive 24/24-mA drive 32/64-mA drive 12/12-mA drive 8/8-mA drive (5 V) Ultra-low (20 A) Low (90 A) Ultra-low (40 A) Low (90 A) Ultra-low (40 A) standby power standby power standby power standby power 4/4-mA drive (3.3 V) standby power 3 WW sources 3 WW sources 3 WW sources 2 WW sources 2 WW sources 5-V or 3.3-V VCC Bus hold Bus hold Bus hold Bus hold Bus hold 5-V input tolerant 5-V tolerant 5-V tolerant 5-V tolerant 3.3-V tolerant 4 WW sources Gate functions Hot insertion Hot insertion Partial power down Partial power down Auto3-state
3- and 5-V TTL and CMOS Specifications

TTL Levels
VCC = 5 V
CMOS Levels Low-Voltage Levels

VCC = 4.5 5.5 V VOH = VCC 0.1 V
3.3 V
VCC= 2.73.6 V VOH = 2.4 V VOH = 2.4 V
2.5 V
VCC = 2.3 2.7 V
VIH = 3.85 V
VIH = 2.0 V VTH = 1.5 V VIL = 0.8 V
VIH = 2.0 V VTH = 1.5 V VIL = 0.8 V VOL = 0.5 V VIH = 1.7 V VTH = 1.2 V VIL = 0.7 V VOL = 0.2 V
VOH = 2.0 V
VTH = 2.5 V
VIL = 1.35 V
VOL = 0.2 V
VOL = 0.1 V
111 111
112
Interfacing Mixed Voltages

Open-Drain Outputs 05/06/07 Functions
Functions Available 05 (AHC, LV) 06 or 07 (LVC) Also Possible
Wired-Function Technique
VCC1
VCC2 RPULLUP
07
RPULLUP
T1
Required input level depends on VCC1 Output level depends on VCC2
07
Vcc
Phantom links on output side can reduce component count.
For the LVC07 function

Supply voltage VCC1 1.8 V 2.5 V 3.3 V 5V LVC07 understands 1.8-V Levels 2.5-V Levels 3.3-V Levels 5-V Levels Pullup resistor may be connected to 1.8 V, 2.5 V, 3.3 V, and 5 V 1.8 V, 2.5 V, 3.3 V, and 5 V 1.8 V, 2.5 V, 3.3 V, and 5 V 1.8 V, 2.5 V, 3.3 V, and 5 V Level conversion range 1.8 V -> 1.8 V 5.5 V 2.5 V -> 1.8 V 5.5 V 3.3 V -> 1.8 V 5.5 V 5 V -> 1.8 V 5.5 V
Special Dual-Supply Level Shifters

LVC4245, LVCC3245, LVCC4245, and ALVC164245
1DI R1B 0B 1 1 GN D1B 2 1B V3CC 1 1B 4B 1 5 GN D1B 6B 1 7B 2 0 2B1 GND 2B2 2B3 VCC1 2B4 2B5 GND 2B6 2B7 2DIR
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
4245 pinning VCCA DIR A1 . . . . . A8 GND GND
245 pinning VCCB VCCB OE
The ALVC164245 and LVC4245 have 5-V VCC pins and 3.3-V VCC pins. The LVCC3245 and LVCC4245 have adjustable output voltages. The LVCC3245 can have one side from 3 to 5.5 V, while the other side is between 2.3 and 3.6 V. The LVCC4245 is fixed at 5 V, while the other side can be connected between 3.3 and 5 V. In this way, a full mixed-mode system can be designed.
4245
B1 . . . . . . B8 GND
LVCC3245 LVCC4245 devices This pin is NC
164245
This solution is compatible with 3.3-V-only systems. Devices can be replaced later with 3.3-V parts without PCB redesign
113 113
1OE 1A0 1A1 GND 1A2 1A3 VCC2 1A4 1A5 GND 1A6 1A7 2A0 2A1 GND 2A2 2A3 VCC2 2A4 2A5 GND 2A6 2A7 OE
114
Bus-Hold Input Characteristics

V
4.7 K
Device Bus-Hold Cell
3.3 V
Local Bus
0.7 mA
I V
3.3 V
TTL backplane
Typically 100...200 A
Bus Hold current

flow when 3-state
No
Holds the last known state of the inputs Provides 74 A of holding current at 0.8 V and 2.0 V Bus hold current does not load the driving output at a valid logic level Negligible input/output capacitance impact (0.5 pF) Eliminates the need for external resistor on unused or floating I/O pins Reduces the number of passive components per board Bus-hold nomenclature : SN74xxxHxxx; e.g., SN74LVCH245
Partial-Power-Down Applications
Active System Part
VCC = 3.3 V Clamping Diodes High ( ~3.3 V )
Parasitic or Clamping Diode
Inactive System Part

VCC ~3.0 V
Circuit Implementation/ Modification for IOFF Circuit

VCC
IOFF Feature
Blocking Diode
Logic Family IOFF Specification GTL, ABT, LVT, ALVT : 100 A GTLP : 30 A LVC, AVC : 10 A LV : 5 A
When VCC = 0, IPIN = 0 for VPIN = min to max.
Unexpected device behavior during partial powering may cause system failure. Input signals may source current via input clamping diodes of powered-down circuits.
115
116
Power-Up 3-State/Hot Insertion

ABT: VCC = 5 V LVT: VCC = 3.3 V ALVT: VCC = 3.3 V
VCC
ABT: 2.1 V LVT: 1.5 V ALVT: 1.2 V
OE
t Output Off (Z) On Off (Z) Tie external resistor from OE line to VCC
OE follows VCC, ensuring device remains in 3-state (Z) during power up/power down
-
See IOFF and IOZ(PU/PD) on data sheet
Devices tested at ramp rates of 200 s/V20 s/V
Live Insertion
System Function/Capability Circuit Implementation/ Circuit Implementation/ Modification Modification Precharge Circuit Precharge Circuit
VCC VCC VCC BIAS VCC
Precharge Circuit
VCC VCC
Output Stage
I/O
GND
Supporting Device Specifications

IOFF IOZPU IOZPD VO, VCC = 0, BIAS VCC = Min to Max
vcc
Card Pin Socket GND I/O BIAS VCC
117
118
Precharge Function Avoids Data Corruption

(BIAS Vcc)
Live-Insertion Situation
Bus Line in Operation
Volts
Possible Scenarios
High Data on Bus Low Data on Bus
Max Peak With Precharge Max Peak With Precharge
V High
Possible Peak Without Precharge
Card Insertion During Operation ...
V Threshold
Precharge Level = VTH
time
Possible Peak Without Precharge
Point of Live Insertion During High on Bus
Point of Live Insertion During Low on Bus
Equals an Insertion of an Additional Capacitance
VBIAS charges I/O capacitance up to threshold voltage
Damping Resistors
VO- Output Voltage - V
VCC
3.0 2.5 2.0 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5
1 2
1) ALVCH16827 (Advanced Low-Voltage CMOS Logic without series resistors) 2) ALVCH162827 (Advanced Low-Voltage CMOS Logic with series resistors)
22
26
30
34
38
42
46
50
54
58
Switching Time - ns
Examples:
Limits the current to reduce noise from undershoot or overshoot Aids in line termination (reducing ringing / line reflection to improve signal quality) Series resistor at output stage Short propagation delays and low power consumption Supports highest system performance and/or use of slower memories Reduces component count, board space, and mounting costs
ALVCH2245 ALVCH162245 ALVCHR16245
Extra 2 in device name indicates damping resistor on outputs only; R indicates both A and B ports
119
VO Output Voltage V
120
DOC Circuitry Provides the Best-Possible Signal Integrity Without Compromising Speed
DOC uses high drive only when needed (during transition)
2.32 2.01 1.81 1.55 1.29 1.03 0.77 0.52 0.25 0 20.7 21.4 22.1 22.8 23.5 24.2 24.9 25.6 26.3
Region 1 Low drive during steady state signal

Region 2 Region 3
Region 2 Output impedance is dynamically lowered during signal transition to drive the line Region 3: Output impedance is dynamically raised to reduce noisy signal overshoots and undershoots
Region 1
Switching Time ns
Dynamic Output Control (DOCTM) Available With AVC

DOC uses high drive only when needed (during transition)
1
3.0
VO- Output Voltage - V
2.5 2.0 1.5 1.0 0.5 0.0 -0.5 -1.0 -1.5 22
1- ALVCH16827 (Advanced Low-Voltage CMOS Logic without series resistors) 2 - ALVCH162827 (Advanced Low-Voltage CMOS Logic with series resistors) 3 - AVC16827 (Advanced Very-Low-Voltage CMOS Logic with DOC circuitry)
26
30
Switching Time - ns
34
38
42
46
50
54
58
The DOC Circuit Delivers high drive current to achieve maximum speed Reduces overshoot and undershoot normally associated with fast edges Eliminates the need for damping resistors
Output waveforms are taken driving a PC100 Network Load VCC = 2.5 V TJ = 400 C Single Bit Switching
121 121
122
Advanced-Logic Feature List

Mixed-voltage tolerant I/Os and level shifting LV, LVC, ALVC, LVT, ALVT, AVC, GTL, GTLP Systems use mixed supply voltages and TLL or CMOS levels in many designs. Most advanced-logic families allow mixed-signal interfacing and provide level-shifting functions for certain mixed-voltage applications. Bus Hold CBT, ABT, LVC, ALVC, LVT, ALVT, AVC, GTL, GTLP Bus-hold circuitry in selected logic families helps solve the problem of floating inputs and eliminates the need for pullup or pulldown resistors by holding the last known state of the input. See II(HOLD) on data sheet. Partial power down IOFF ABT, LV, LVC, LVT, ALVT, AVC, GTL, GTLP IOFF circuitry prevents the device from being damaged during hot insertion. See IOZPU, IOZPD, IOFF specifications on data sheet. Power-up 3-state ABT, LVT, ALVT, LVC, GTLP Power-up 3-state ensures valid output levels during power up and valid Z on the outputs during power down. Bias VCC GTLP, ABTE, FB, CBT, CBTLV, GTL (1655 only) VBIAS precharges I/O capacitance up to threshold voltage, preventing glitching of active data. Series damping resistors ABT, LVC, ALVC, LVT, ALVT Series damping resistors limit signal overshoot and undershoot by providing better impedance matching and line termination without the need for external resistors. TM circuit AVC DOC The revolutionary Dynamic Output Control (DOC) circuitry automatically lowers circuit output impedance during signal transition and later raises it after signal transition to reduce noise. JTAG ACT, BCT, ABT, LVT (selected functions)
(Single Gate and Dual Gates)

Principle Example
SN74AHC1G00DBVR SN74AHCT1G00DBVR
5 4
Little Logic
Application
Y=A.B
2 Input NAND Gate
SN74AHC2G00DCTR SN74AHCT2G00DCUR
Benefits
Small SOP-5 package . . . . . . Optimized PCB layout: . . . . . Reduced EMI noise . . . . . . . . Enhances ASIC functionality .
Y=A.B
Dual 2 Input NAND Gate
Less board space needed Simplified routing Better routing possibilities Quick fixes
123
124
Little-Logic Features
Family Operating VCC 2.05.5 1.85.5 1.53.6 IOFF Vin Tol. IOH/IOL (mA) 1.8 V 2.5 V 3.3 V 4 4 6 12 18 24 24 5V 8 32

tpd (ns, CI = 50 pF) 1.5 V 1.8 V 2.5 V 3.3 V 11 8.5

5V 7.5 3.3
AHC1G AHCT1G LVC1G LVC2G ALVC1G ALVC2G
No Yes Yes
Yes Yes Yes
5.5 3.5
4 2.5
7.5
Competition
TC7SH (VHC) TC7SZ (LCX) TC7SA (VCX) 1.53.6 1.85.5 1.83.6 No Yes Yes Yes Yes Yes 6 12 18 4 24 24 8 32
11 9.5

4.5 4.3
6.5
symbol or red indicates Ci = 30 pF
TIs New GTLP Family Consolidates the Best Features of Existing Backplane Logic
100
System Clock Frequency (MHz)
Backplane TAM is $200M/year (10% of all logic TAM)

Higher fre quency Low ECL/PECL er pr ice t Tru Lo In han othe we cid e live r hig -in r p en h-dr se tw ive d ow rtio More package options evic av nc er es e ap co sw ab 3.3-V VCC and 5-V ns i ilit um tchi y tolerance ng pt io BTL Hot insertion n
GTLP
66
33
ALVT
GTL LVT FCT
ETL
ABT
3.3-V VCC
Heavily Loaded Backplane
TI Internal Estimate
5-V VCC
125
GTLP Specially Designed for High-Performance Backplanes

N Mass Storage
GTLP Transceiver ASIC
126
N Remote Access N Internet Routers N ATM Switches N SONET/SDH Add-Drop
Termination Backplane Trace Connector GTLP Transceiver
Multiplexers N Wireless Base Stations N Compact PCI
Any multi-slot high-performance parallel backplane

N GTLP allows higher-frequency operation (60-110-MHz clock) N GTLP allows significantly increased data transfer rates
0.96 Gbs to 1.76 Gbs using one 16-bit Widebus device 14 Gbs = 128 bits at 110-MHz clock
N GTLP is backward compatible with existing logic, allowing easy migration to
higher speeds using existing backplane and daughter-card layouts
AVC Advanced Very-Low-Voltage CMOS

Fastest Logic Family Available - Sub 2 ns Max tpd
NEW FAMILY
Features VCC Specified at 3.3 V, 2.5 V, and 1.8 V 3.3-V I/O Tolerance Bus Hold IOFF for Partial Power Down 10 A Dynamic Drive Through DOCTM Circuit
Device SN74AVC16244 SN74AVC16244 SN74AVC16244

127
VCC 3.3 V 2.5 V 1.8 V
Drive 12/12 mA (Static) 8/8 mA (Static) 4/4 mA (Static)
TPD(MAX) 1.7 ns 1.9 ns 3.2 ns
128
CBT vs CBTLV
CBT Circuit Diagram
A
N-Channel
CBT VIN/VOUT Graph

VOUT (V)
B
VCC - 1V
N-Channel
OE
Vin (V) VCC - 1V
CBT Features Level shifting - SN74CBTDxxx Precharged outputs - SN74CBT6800
CBTLV Circuit Diagram
CBTLV VIN/VOUT Graph

VOUT (V)
P-Channel
A
N-Channel
B
VCC - 1V P-Channel 1
N-Channel
CBTLV Features No level shifting Precharged outputs - SN74CBTLV16800

Vin (V)
OE
1 VCC - 1V
CBT/CBTLV Product Family

Extremely low propagation delays make crossbar switches an effective replacement for drivers and receivers in high-speed systems in which signal buffering is not required.
CBT/CBTLV3384 Bus Switch
1 of 2 Channels A0 A4 B0 B4
What are Bus Switches (CBT/CBTLV)? Simple FET switches specified at 5 V (CBT) and 3.3 V, 2.5 V (CBTLV) support easy bus communication between devices, i.e., memory and ASIC Near-zero propagation delay enables highest system speed - tpd(MAX) = 0.25 ns for both CBT and CBTLV Very low power consumption makes them ideal for portable systems - ICC(MAX) = 50 A for CBT and ICC(MAX) = 20 A for CBTLV Where are CBT Switches Used? Wide application: PCs, workstations, hard disk drives, bus boards, 5-V to 3-V translators, hot-card insertion, telecommunication equipment
BEA
CBT/CBTLV3383 Bus Exchanger

A0 1 of 5 Channels C0
CBTxxxx - Functionally equivalent to QSxxxx CBTLVxxxx - Functionally equivalent to PI3Bxxxx Which Package to Choose Industry standard pinouts ('244, '245) Fine-pitch packaging (SOIC, SSOP,TSSOP,TVSOP, Widebus, Shrink Widebus Single bus switch SN74CBT/CBTLV1G125 NOW AVAILABLE!!! CBT6800 and CBTLV16800 bus switch with precharged outputs available Literature New CBT/CBTLV Selection Guide (literature number SCDB002) New CBT/CBTLV Data book (literature number SCDD001C)
B0
D0
BE BX
129 *Widebus and Shrink Widebus are trademarks of Texas Instruments.
(Magnified 2.5X for detail) 5-Pin SOT Area = 8.12 mm2 Ht. = 1.2 mm LP = 0.95 mm 5-Pin SOT Area = 4.2 mm2 Ht. = 1.0 mm LP = 0.65 mm 96-Ball LFBGA Area = 74.25 mm2 Ht. = 1.3 mm LP = 0.8 mm
DBV
DIP
0.4
Widebus
SOIC
TSSOP
0.2 0
QSOP
DCK
114-Ball LFBGA Area = 88 mm2 Ht. = 1.3 mm LP = 0.8 mm
Widebus+
Shrink Widebus
SSOP
TVSOP
(TI package designators)
32-Bit
Widebus and Shrink Widebus are trademarks of Texas Instruments.
LFBGA
130
Packaging Options
8 Bits 8 Bits 8 Bits 16/18 Bits Widebus DL
48-Pin SSOP Area = 171 mm2 Ht. = 2.74 mm LP = 0.635 mm
1 0.8 0.6
16/18 Bits Shrink Widebus DGG

48-Pin TSSOP Area = 108 mm2 Ht. = 1.1 mm LP = 0.5 mm
16/18 Bits Widebus DGV

48-Pin TVSOP Area = 63 mm2 Ht. = 1.2 mm LP = 0.4 mm
DW
20-Pin SOIC Area = 137 mm2 Ht. = 2.65 mm LP = 1.27 mm
DB
20-Pin SSOP Area = 62 mm2 Ht. = 2.0 mm LP = 0.65 mm
PW
20-Pin TSSOP Area = 46 mm2 Ht. = 1.1 mm LP = 0.65 mm
Single Gate
32-Bit Ball Grid Array
LFBGA offers space savings of 65% over TSSOP and 45% over TVSOP
Family ABT/E AC/ACT AHC/AHCT Standard Prefix ALB Military (54) ALS Commercial (74) ALVC ALVT AS AVC Special Feature BCT Blank = No special features BTL C = Configurable VCC CBT/LV D = Level Shifting Diode CD4000 H = Bus Hold ETL R = Damping Resistor on F Inputs/Outputs FB FCT S = Schottky Clamping Diodes GTL Z = Power-Up 3-State GTLP HC/HCT Bit Width HSTL Blank = Gates, MSI, and Octals LS 1G = Single Gate LV 2G = Dual Gate LVC 8 = Octal IEEE 1149 (JTAG) LVT S 16 = Widebus (16,18, and 20 bit) SSTL 18 = Widebus IEEE Std 1149.1 (JTAG) TTL 32 = Widebus+ (32 and 36 bit) TVC
131
Device Names and Package Designators SN74 ABT H 16 2 244 A DGG R

Tape & Reel Package Type D, DW = SOIC DB, DL = SSOP DBB, DGV = TVSOP DCT, DCU = TSSOP DBV = SOT DGG, PW = TSSOP FK = LCCC FN = PLCC GB = CPGA GKE, GKF = LFBGA HFP, HS, HT, HV = CQFP J, JT = CDIP N, NP, NT = PDIP PAG, PAH, PCA, PCB, PM, PN, PZ = TQFP PH, PQ, RC = QFP W, WA, WD = CFP Device Revision Blank = No Revision Letter Designator A-Z
Function 00 174 244
Options Blank = No Options 2 = Series Damping Resistor on Outputs 3 = Level Shifter - B port high 4 = Level Shifter - A port high 25 = 25- Line Driver
132
TI DSPS-Related FIFO Products

New TI FIFOs Offer a Glueless Interface to
Leading- Edge TI DSPs FIFO Performance
TI Technology Leadership Creates World-Class TI Manufacturing Excellence Ensures the Lowest
Total Cost of Ownership
TI FIFO Product-and-Technology Roadmap

Configuration:
Performance (F Clock in MHz)
32Kx36 to 65Kx18 512x18 to 4Kx18 512x36 to 2Kx36 64x18 to 2Kx36
ALVC78xx ACT36xx ABT36xx ACT78xx
0.6 um 0.8 um 1.0 um 1.0 um
ALVC36xx 0.6 um (Now)
SN74V2xx 0.35 um (3Q00)
DSPS FIFOs 0.15 um (1H01)
(Now)
Availability
133
TI FIFOs Optimize System Performance

ANALOG FRONT END DSP BOARD
MEMORY
134
ANALOG BACK END
LPF
TI S/H 100100...
TI FIFO 011001...
LPF
TI S/H
TI MUX
TI A/D Converter
TI FIFO
TMS320 DSP
TI FIFO
TI D/A Converter
Smoothing Filter
LPF
TI S/H Host Interface
LPF = Low-Pass Filter S/H = Sample and Hold
Host Bus
LOGIC OVERVIEW
FUNCTIONAL INDEX
21
22
SECTION 2 FOCUS ON CBT AND CBTLV PRODUCTS
CONTENTS
What Are We Talking About? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 What Are CBT and CBTLV Switches? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 When Are CBT and CBTLV Switches Used? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 Lets Get Technical . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Other Types and Specialized Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Want More Information? . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 210
23
24
What Are We Talking About?
Crossbar technology (CBT) is TIs product-technology name for bus switches. Some companies refer to this device type as switches, others use the generic term bus switches, and Quality Semiconductor (now IDT) calls the devices QuickSwitch technology. In any case, the devices described in this section are used as digital switches. A mechanical switch has two conditions, on and off. CBT and CBTLV products have two conditions, low impedance (on) and high impedance (off). When they are on (low impedance), they are like a piece of wire with low resistance. When they are off (high impedance), they are like an open circuit.
What Are CBT and CBTLV Switches?
The 5-V CBT logic family is composed of an n-channel transistor that operates as a switch. When the transistor is conducting, the voltage on the A port is passed through to the B port and vice versa. With CBTD products, a diode is added to reduce the 5-V power supply level to 4.3 V, then the additional 1-V drop across the gate to source (VGS = 1 V) yields a 3.3-V signal, making the devices useful in voltage-translation applications. Figure 1 shows a transistor-level diagram of a typical CBT device.
A B
OE
Figure 1. Typical 5 V CBT Device (One Channel Shown)
The CBTLV switch has an additional p-channel MOS transistor in parallel with the n-channel MOS transistor, allowing the switch to operate at 3.3-V VCC. Figure 2 shows the additional circuitry needed for low-voltage operation.
OE
Figure 2. Typical 3.3 V CBTLV Device (One Channel Shown)
CBT devices include additional circuitry for enhanced functionality in the CBTD, CBTK, CBTR, and CBTS products. CBT little logic (single gates) also are available.
QuickSwitch is a trademark of IDT.
25

When Are CBT and CBTLV Switches Used?
Bus switches are used in applications in which there is a need to connect or disconnect signals on demand. They are used where the application does not need drive current over and above the applied amount. They are used where propagation delays must be kept to a minimum and where voltage translation or bus isolation is needed. In multiprocessor systems, CBT/CBTLV switches can be used for extremely fast bus connections, bus multiplexing, memory interleaving, bus byte swapping, and a variety of other switching functions. Extremely low propagation delays (250 ps) make CBT/CBTLV switches an effective replacement for drivers and receivers in high-speed systems where signal buffering is not required. In addition, low power consumption helps prolong battery life between charges in portable systems. Small-footprint packages save board space in applications such as PC cards. Key applications include:
D D D D D
Hot-card insertion Notebook docking Memory interface Data multiplexing/demultiplexing Voltage translation
26
Let's Get T echnical
Crossbar switches are high-speed bus-connect devices. Each switch consists of an n-channel MOS transistor driven by a CMOS gate. When enabled, the n-channel transistor gate is pulled to VCC, and the switch is on. These devices have an on-state resistance of approximately 5 and a propagation delay of 250 ps. They are capable of conducting a current of up to 64 mA each. The transistor clamps the output at 1 V less than the gate potential, regardless of the level at the input pin. This is one of the n-channel transistor characteristics (see Figures 3 and 4). Note the 1-V difference between the gate (VCC) and the source (VO) at any point on the graph.
5.0 4.5 4.0 VO Output Voltage V 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 3 3.5 4.0 VCC Supply Voltage V
Figure 3. Output Voltage vs Supply Voltage
4.5
5.0
27
5 VCC = 5 V 4 VO Output Voltage V
0 0 1 2 3 4 5 VI Input Voltage V
Figure 4. Output Voltage vs Input Voltage
The on-state resistance (ron) increases gradually with VI until VI approaches VCC 1 V, where ron rapidly increases, clamping VO at VCC 1 V (see Figure 5). Also, by the nature of the n-channel transistor design, the input and output terminals are fully isolated when the transistor is off. Leakage and capacitance are to ground and not between input and output, which minimizes feedthrough when the transistor is off.
16 r on On-State Resistance 14 12 10 8 6 4 2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VI Input Voltage V
Figure 5. On State Resistance vs Input Voltage
28

Other Types and Specialized Bus Switches
CBTD Switches
Applications requiring inputs and outputs operating in mixed 5-V and 3.3-V systems in which the 3.3-V systems do not have 5-V tolerant I/Os might use the CBTD devices. A series diode and paralleling resistor are incorporated into the VCC line of the CBTD device, reducing the output voltage to an approximate maximum value of less than 3.5 V. This value is low enough to be tolerated by the 3.3-V system and high enough to be seen as a valid high level by the 5-V system.
CBTS Switches
Often, high-speed buses with improper termination have excessive undershoot and overshoot voltages. The undershoot event does not affect performance of the bus switch when it is on. But, if undershoots occur when the bus switch is off, it can be biased into conduction and pass unwanted data causing a data error. To prevent this, TI CBTS devices contain two Schottky diodes connected from the source and drain to ground. When one of the buses has negative voltage exceeding the forward turn-on voltage of the Schottky diode, the diode turns on, clamping the source or drain voltage of the NMOS switch, keeping the buses isolated.
CBTK Switches
TI CBTK devices integrate an active-clamp undershoot-protection circuit on both ports. In the active-clamp circuit, a bias generator sets a voltage slightly above ground, allowing the active-clamp pullup voltage to turn on during an undershoot event. This clamp counteracts the undershoot voltage and limits the possibility of data corruption.
Analog or Bilateral Switches

Although technically not CBT products, these switches often are considered for similar applications. They are designed to handle both analog and digital signals with amplitudes up to 5.5-V peak (higher for CD4000 series) to be transmitted in either direction. Applications include signal gating, chopping, modems, and signal multiplexing for analog-to-digital and digital-to-analog conversion systems. Analog switches are available in the CD4000, HC, HCT, and LV technology families.
29

Want More Information?
For additional information or data sheets on TI CBT and CBTLV products, please see our websites: http://www.ti.com/sc/docs/products/logic/families/cbt.htm or http://www.ti.com/sc/docs/products/logic/families/cbtlv.htm Detailed information about available packages is in Appendix A. A list of the most recent data books for TI logic products is in the preface of this publication. The following TI documents also may be useful:
Title
Texas Instruments Solution for Undershoot Protection for Bus Switches Migration from 3.3-V to 2.5-V Power Supplies for Logic Devices Flexible Voltage-Level Translation With CBT Family Devices Understanding Advanced Bus-Interface Products Implications of Slow or Floating CMOS Inputs 5-V to 3.3-V Translation With the SN74CBTD3384 Texas Instruments Crossbar Switches
Literature Number
SCDA007 SCEA005 SCDA006 SCAA029 SCBA004C SCDA003B SCDA001A
Publication Date
April 2000 December 1997 July 1999 May 1996 February 1998 March 1997 July 1995
210
LOGIC OVERVIEW
FUNCTIONAL INDEX
31
FUNCTIONAL INDEX
32
SECTION 3 FUNCTIONAL INDEX
CONTENTS
Backplane Logic (GTL, GTLP, FB+/BTL, and ABTE/ETL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Drivers and Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 Boundary-Scan IEEE Std 1149.1 (JTAG) Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Boundary-Scan (JTAG) Bus Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Boundary-Scan (JTAG) Support Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Inverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Noninverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311 Bus Exchange/Multiplexing Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311 Standard Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 311 Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313 Binary Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313 Decade Counters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 314 Decoders, Encoders, and Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Decoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Multiplexers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Priority Encoders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 315 315 316 317
FIFOs (First-In, First-Out Memories) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318 Asynchronous FIFO Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 318 Synchronous FIFO Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 319 Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-Type Flip-Flops (3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-Type Flip-Flops (non 3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Other Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gates and Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NAND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AND-OR-Invert Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Exclusive-OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Exclusive-NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Gate and Delay Elements . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 320 320 321 321 322 322 323 324 324 325 325 325 326 326
33
CONTENTS (continued)
Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327 D-Type Latches (3-state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 327 Other Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 328 Little Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . AND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NAND Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . NOR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Exclusive-OR Gates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . D-Type Flip-Flops . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Inverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Noninverting Buffers and Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standard Bus Switches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 328 328 328 329 329 329 329 329 329 330 330
Memory Drivers and Transceivers (HSTL, SSTL, and SSTV) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330 Buffers, Drivers, and Latches . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 330 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331 Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 331 Specialty Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Adders . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Arithmetic Logic Units . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Bus-Termination Arrays and Networks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Comparators (identity) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Comparators (magnitude) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Digital Phase-Locked Loops (PLLs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Drivers/Multipliers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ECL/TTL Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Frequency Dividers/Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Monostable Multivibrators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Oscillators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parity Generators and Checkers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Translation Voltage Clamps . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Voltage-Level Shifters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Parity Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Registered Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Standard Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Bus Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Bus Transceivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Bus Drivers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Universal Bus Exchangers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 332 332 332 332 333 333 333 333 334 334 334 335 335 335 335 336 336 336 337 340 340 341 341
34
Product available in technology indicated Product available in reduced-noise advanced CMOS (11000 series) ' New product planned in technology indicated CP = center pin OC = open collector OD = open drain 3S = 3-state
BACKPLANE LOGIC (GTL, GTLP, FB+/BTL, AND ABTE/ETL)
Drivers and Transceivers
DESCRIPTION 1:6/1:2 GTLP-to-LVTTL Fanout Drivers 2-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceivers with Selectable Parity 7-Bit TTL/BTL Transceivers (IEEE Std 1194.1) 8-Bit LVTTL-to-GTLP Bus Transceivers 8-Bit TTL/BTL Registered Transceivers (IEEE Std 1194.1) 8-Bit TTL/BTL Transceivers (IEEE Std 1194.1) 9-Bit TTL/BTL Address/Data Transceivers (IEEE Std 1194.1) 9-Bit TTL/BTL Competition Transceivers (IEEE Std 1194.1) 11-Bit Incident Wave Switching Bus Transceivers with 3-State and Open-Collector Outputs 16-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceivers 16 Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers with Live Insertion 16 Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Bus Transceivers 16-Bit Incident Wave Switching Bus Transceivers with 3-State Outputs 16-Bit LVTTL-to-GTLP Bus Transceivers 17-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers with Buffered Clock Outputs 17-Bit LVTTL-to-GTLP Universal Bus Transceivers with Buffered Clock 17-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Bus Transceivers with Buffered Clock 17-Bit TTL/BTL Universal Storage Transceivers with Buffered Clock Lines (IEEE Std 1194.1) 17-Bit LVTTL/BTL Universal Storage Transceivers with Buffered Clock Lines (IEEE Std 1194.1) 18-Bit TTL/BTL Universal Storage Transceivers (IEEE Std 1194.1) 18-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Bus Transceivers 18-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers 18-Bit LVTTL-to-GTLP Universal Bus Transceivers 18-Bit LVTTL-to-GTL/GTL+ Bus Transceivers 8 / 18-Bit LVTTL-to-GTLP Universal Bus Transceivers 32-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceivers 32-Bit LVTTL-to-GTLP Bus Transceivers 35
TYPE 817 1394 2041 306 2033 2040 2031 2032 16246 1645 1655 1655 16245 16945 16616 16916 1616 1651 1653 1650 1612 16612 16612 16622 16923 16912 3245 32945
TECHNOLOGY ABTE FB GTL GTLP ' ' '
' ' ' ' '
FUNCTIONAL INDEX
'
' ' '
BOUNDARY SCAN IEEE STD 1149.1 (JTAG) LOGIC
36
Boundary Scan (JTAG) Bus Devices
DESCRIPTION Scan-Test Devices with Octal Transceivers Scan-Test Devices with 18-Bit Bus Transceivers Scan-Test Devices with 18-Bit Inverting Bus Transceivers
OUTPUT 3S
TYPE 8245 18245 18640 18646 182646 18652 182652 18502 182502 18512 182512 18504
TECHNOLOGY ABT ACT BCT LVT
Scan-Test Devices with 18-Bit Transceivers and Registers 8
3S
8 Scan-Test Devices with 18-Bit Universal Bus Transceivers
3S
Scan-Test Devices with 2 20-Bit Universal Bus Transceivers
3S
182504 18514 8240 8244 8646 8652 8373 8374 8543 8952
Scan-Test Devices with Octal Buffers Scan-Test Devices with Octal Bus Transceivers and Registers Scan-Test Devices with Octal D-Type Latches Scan-Test Devices with Octal D-Type Edge-Triggered Flip-Flops Scan-Test Devices with Octal Registered Bus Transceivers
3S 3S 3S 3S
Boundary Scan (JTAG) Support Devices
DESCRIPTION Embedded Test-Bus Controllers with 8-Bit Generic Host Interfaces Test-Bus Controllers IEEE Std 1149.1 (JTAG) TAP Masters with 16-Bit Generic Host Interfaces 10-Bit Addressable Scan Ports Multidrop-Addressable IEEE Std 1149.1 (JTAG) TAP Transceivers Scan-Path Linkers with 4-Bit Identification Buses Scan-Controlled IEEE Std 1149.1 (JTAG) TAP Concatenators
OUTPUT 3S 3S 3S
TYPE 8980 8990 8996 8997
TECHNOLOGY ABT ACT BCT LVT
BUFFERS AND DRIVERS

Inverting Buffers and Drivers
DESCRIPTION Single OUTPUT OD 3S OC OD Hex x OC 3S OC Hex x Buffers/Converters Hex Drivers Hex Schmitt Triggers Strobed Hex Inverters/Buffers 3S TYPE 1G06 1G240 06 06 16 366 368 1005 4009 4049 1004 40106 4502 230 240 Octal 3S 11240 1244 540 OC Octal with Input Pullup Resistors Octal Buffers and Line/MOS Drivers with Series Damping Resistors 10 Bit 11-Bit Line/Memory Drivers 12-Bit Line/Memory Drivers 37 3S 756 746 ' TECHNOLOGY
ABT AC ACT AHC AHCT ALS ALVC ALVT AS BCT 64BCT CD4K F FCT GTLP HC HCT LS LV LVC LVT S TTL
FUNCTIONAL INDEX
3S
2240
3S 3S 3S
828 29828 5401 5403
BUFFERS AND DRIVERS
38
Inverting Buffers and Drivers (continued)
DESCRIPTION 6 16 Bit 16 Bit with Series Damping Resistors GTLP-to-LVTTL 1-to-6 Fanout Drivers
OUTPUT 3S
TYPE 16240 16540 162240
TECHNOLOGY
ABT AC ACT AHC AHCT ALS ALVC ALVT AS BCT 64BCT CD4K F FCT GTLP HC HCT LS LV LVC LVT S TTL
3S
3S
817
'
Noninverting Buffers and Drivers
DESCRIPTION
OUTPUT OD
TYPE 1G07 1G125 1G126 125 126 1035 4503 4010 4050 365 367 07 07 17 35 1034 128
TECHNOLOGY
ABT AC ACT AHC AHCT ALB ALS ALVC ALVT AS AVC BCT 64BCT CD4K F FCT HC HCT LS LV LVC LVT S TTL
Single Bus Buffers
3S 3S OC 3S
' ' '
Quad Bus Buffers Hex Buffers x Hex x Buffers/Converters
3S Hex Buffers/ x / Line Drivers OC OD OC Hex Drivers Hex OR Gate Line Drivers
Noninverting Buffers and Drivers (continued)
DESCRIPTION
OUTPUT
TYPE 241
TECHNOLOGY
3S Octal CP/3S 3S OC Octal with Series Damping Resistors Octal Buffers Octal Buffers and Line/MOS Drivers with Series Damping Resistors Octal Line Drivers/ MOS Drivers 10 Bit 10 Bit with Series Damping Resistors 11-Bit Line/Memory Drivers 12-Bit Line/Memory Drivers
244 1244 11244 541 757 760 2244
3S 25244 3S 465
3S
2241
3S 3S
2541 827 29827 2827
3S
3S 3S
5400 5402 16241
16 Bit 6 16 Bit with Series Damping Resistors 16 Bit with Balanced Drive and Series Damping Resistors 18 Bit 39
3S
16244 16541
FUNCTIONAL INDEX
3S
162244
3S
163244
3S
16825
BUFFERS AND DRIVERS
310
Noninverting Buffers and Drivers (continued)
DESCRIPTION 18 Bit with Series Damping Resistors 20 Bit 20 Bit with Series Damping Resistors 20 Bit with Balanced Drive and Series Damping Resistors 1-Bit to 2-Bit Address Drivers 1-Bit to 4-Bit 4 Address Drivers 1-to-4 Address 4 Registers/Drivers 32 Bit 4-Segment Liquid Crystal Display Drivers
OUTPUT
TYPE
TECHNOLOGY
3S 3S 3S
162825 16827 162827
162827 3S 163837 3S 3S 3S 3S 162830 16344 162344 16831 16832 32244 4054 ' '
BUS SWITCHES
Bus Exchange/Multiplexing Switches
DESCRIPTION 1-of-8 FET Multiplexers/Demultiplexers Dual 1-of-4 FET Multiplexers/Demultiplexers 4-Bit 1-of-2 FET Multiplexers/Demultiplexers 10-Bit FET Bus-Exchange Switches 12-Bit 1-of-2 FET Multiplexers/Demultiplexers with Internal Pulldown Resistors 2 2 x / x 12-Bit 1-of-3 FET Multiplexers/Demultiplexers Synchronous 16-Bit 1-of-2 FET Multiplexers/Demultiplexers 16-Bit 1-of-2 FET Multiplexers/Demultiplexers 16-Bit to 32-Bit FET Multiplexer/Demultiplexer Bus Switches 18-Bit FET Bus-Exchange Switches 24-Bit 24 FET Bus-Exchange Switches x 24-Bit 24 FET Bus-Exchange Switches with Schottky Diode Clamping x
TYPE 3251 3253 3257 3383 16292 162292 16214 16232 16233 16390 16209 16212 16213 16212 16213
TECHNOLOGY CBT CBTLV
Standard Bus Switches
DESCRIPTION
TYPE 1G66
TECHNOLOGY CBT ' CBTLV CD4K HC HCT LV
Single FET Bus Switches Single FET Bus Switches with Level Shifting Dual FET Bus Switches Dual FET Bus Switches with Level Shifting Dual FET Bus Switches with Schottky Diode Clamping Quad Bilateral Switches Quad FET Bus Switches 311
1G125 1G384
FUNCTIONAL INDEX
1G125 3306 3306 3306 4016 4066 3125 3126
BUS SWITCHES
312
Standard Bus Switches (continued)
DESCRIPTION 4-Bit Analog Switches with Level Translation Octal FET Bus Switches
TYPE 4316 3244 3245 3345 3384 3861 3857 3861 6800 6800 3384 16244 16245 16245 16210 16861 16861 16210 16861 16800 19861 16211 16211 16211 16211 32245
TECHNOLOGY CBT CBTLV CD4K HC HCT LV
10-Bit FET Bus Switches 10-Bit FET Bus Switches with Internal Pulldown Resistors 10-Bit FET Bus Switches with Level Shifting 10-Bit FET Bus Switches with Precharged Outputs and Diode Clamping 10-Bit FET Bus Switches with Precharged Outputs for Live Insertion 10-Bit FET Bus Switches with Schottky Diode Clamping 16-Bit FET Bus Switches 6 16-Bit FET Bus Switches with Active Clamp Undershoot Protection 20-Bit FET Bus Switches 2 20-Bit FET Bus Switches with Active Clamp Undershoot Protection 20-Bit FET Bus Switches with Level Shifting 2 20-Bit FET Bus Switches with Precharged Outputs 20-Bit FET Bus Switches with Series Damping Resistors 24-Bit FET Bus Switches 24-Bit FET Bus Switches with Bus Hold 24-Bit FET Bus Switches with Level Shifting 24-Bit FET Bus Switches with Schottky Diode Clamping 32-Bit FET Bus Switches with Active Clamp Undershoot Protection
' '
' ' '
'
COUNTERS
Binary Counters
DESCRIPTION Divide by 12 4 Bit Ripple Dual 4 Bit Dual 4 Bit Up Presettable 4 Bit Up/Down Presettable 4 Bit BCD Up/Down with Dual Clock and Reset / Presettable Synchronous 4 Bit Up/Down Programmable 4 Bit with Asynchronous Clear Synchronous 4 Bit Synchronous 4 Bit Up/Down / Synchronous 4 Bit with Preset and Asynchronous Clear Synchronous 4 Bit with Preset and Synchronous Clear 8-Bit Counters/Dividers with 1-of-8 Decoded Outputs 8 Bit with 3-State Output Registers 8 Bit with Input Registers 8 Bit with Input Registers and Parallel Counter Outputs 8 Bit Synchronous Up/Down / 8 Bit Presettable Synchronous Down 7-Stage Ripple-Carry Counters/Dividers 12-Stage Ripple-Carry Counters/Dividers 14-Stage Ripple-Carry Counters/Dividers with Oscillators 4 / 21 Stage Divide by N Programmable Divide by N Presettable Up/Down or BCD Decade 313 TYPE 92 93 293 393 4520 4516 40193 191 193 40161 569 169 669 697 161 163 4022 590 592 593 867 869 40103 4024 4040 4020 4060 4045 4018 4059 4029 TECHNOLOGY AC ACT ALS AS CD4K F FCT HC HCT LS LV S TTL
FUNCTIONAL INDEX
COUNTERS
Decade Counters
DESCRIPTION Divide by 2, Divide by 5 Dual Divide by 2, Divide by 5 Synchronous Presettable BCD Up/Down / Counters/Dividers with 1-of-10 Decoded Outputs Counters/Drivers with Decoded 7-Segment Display Outputs / 7 BCD-to-Decimal Decoders Presettable BCD Up/Down Dual BCD Up Programmable BCD Divide by N 2 Decade Synchronous Presettable BCD Down Up-Down Counters/Latches/7-Segment Display Drivers Presettable BCD-Type Up/Down with Dual Clock and Reset TYPE 90 390 190 192 4017 4026 4033 4028 4510 4518 4522 40102 40110 40192 TECHNOLOGY ALS CD4K HC HCT LS
314
DECODERS, ENCODERS, AND MULTIPLEXERS
Decoders
DESCRIPTION
OUTPUT
TYPE 139
TECHNOLOGY AC ACT AHC AHCT ALS AS BCT CD4K F FCT HC HCT LS LV LVC S TTL
Dual 2 4 Line Decoders/Demultiplexers 2-to-4 / x
CP OC
11139 155 156 2414 4555 4556 238 138
Dual 2-Line to 4-Line Memory Decoders with On-Chip Supply-Voltage Monitors Dual Binary 1-of-4 Decoders/Demultiplexers 4 / x 3-to-8 Line Decoders/Demultiplexers 3-to-8 Line Inverting Decoders/Demultiplexers 8 / x 3-to-8 Line Decoders/Demultiplexers 8 / x with Address Latches BCD to 10 Line Decimal 4-Bit 4 Latch/4 to 16 Line /4 6 4 6 / x 4-to-16 Line Decoders/Demultiplexers BCD-to-Decimal Decoders/Drivers / / BCD to 7 7-Segment Decoders/Drivers BCD to 7-Segment Latches/Decoders/Drivers BCD to 7-Segment LCD Decoders/Drivers with Display-Frequency Outputs BCD to 7-Segment LCD Decoders/Drivers with Strobed Latch Function BCD to 7-Segment Latches/Decoders/Drivers for LCDs CP
11138 137 237 42 4514 4515 154
OC OC OC
159 45 145 47 247 4511

FUNCTIONAL INDEX
4055 4056 4543
315
DECODERS, ENCODERS, AND MULTIPLEXERS
316
Multiplexers
DESCRIPTION 1-of-8 Analog Multiplexers/Demultiplexers 1-of-8 Analog Multiplexers/Demultiplexers with Logic Level Conversion 1-of-8 Analog Multiplexers/Demultiplexers with Latches 1-of-8 Data Selectors 1-of-8 Data Selectors/Multiplexers 8 / x 1-of-8 Data Selectors/Multiplexers/Registers 8 / x / 1-of-8 Differential Analog Multiplexers/Demultiplexers 1-of-16 Analog Multiplexers/Demultiplexers 1-of-16 Data Selectors/Multiplexers 1-of-16 Data Generators/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers 4 / x Dual 1-of-4 Analog Multiplexers/Demultiplexers Dual 1-of-4 Analog Multiplexers/Demultiplexers with Logic Level Conversion Dual 1-of-4 Analog Multiplexers/Demultiplexers with Latches Triple 1-of-2 Analog Multiplexers/Demultiplexers Triple 1-of-2 Analog Multiplexers/Demultiplexers with Logic Level Conversion
OUTPUT
TYPE 4051 4051 4351
TECHNOLOGY ABT AC ACT AHC AHCT ALS AS CD4K F FCT HC HCT LS LV LVC PCA S TTL
3S 3S 3S
4512 151 251 354 356 4097 4067 150
3S 3S
250 153 253 4052 4052 4352 4053 4053
3S Quad 1-of-2 Data Selectors/Multiplexers 2 / x CP/3S Quad 1-of-2 Data Selectors/Multiplexers with Series Damping Resistors / x Quad 2 2-to-1 Data Selectors/Multiplexers 3S
257 258 11257 2257 157
3S
40257
Multiplexers (continued)
DESCRIPTION Quad 2-to-1 Data Selectors/Multiplexers 2 / x with Storage Quad 2-to-4 Data Selectors/Multiplexers Hex 2-to-1 Universal Multiplexers 4-to-1 Multiplexers/Demultiplexers Nonvolatile 5-Bit Registers with I2C Interface
OUTPUT
TYPE 298 399 158
TECHNOLOGY ABT AC ACT AHC AHCT ALS AS CD4K F FCT HC HCT LS LV LVC PCA S TTL
3S 3S
857 16460 8550
Priority Encoders
DESCRIPTION
OUTPUT
TYPE 148
TECHNOLOGY CD4K HC HCT LS TTL
8 to 3 Line 10 to 4 Line 10 to 4 Line BCD
3S
348 4532 147 40147
FUNCTIONAL INDEX
317
FIFOs (FIRST IN, FIRST OUT MEMORIES)
318
Asynchronous FIFO Memories
DESCRIPTION 6 16 4
OUTPUT 3S
TYPE 232 40105 225 229 233 236 7814 7814 7806 7806 7804 7804 7820 2235 7802 7808
TECHNOLOGY ABT ACT ALS ALVC CD4K HC HCT S
16 5 6 64 4 64 18 64 18 3.3 V 256 18 256 18 3.3 V 512 18 512 18 3.3 V 512 18 2 Bidirectional 1024 9 2 Bidirectional 1024 18 2048 9
3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S
Synchronous FIFO Memories

DESCRIPTION 16 4 64 1 2 Independent 64 18 64 18 3.3 V 64 36 6 64 36 2 Bidirectional 6 256 1 2 Independent 256 18 256 18 3.3 V 256 36 2 Bidirectional 512 18 512 18 3.3 V 512 18 2 Bidirectional 512 36 512 36 3.3 V 5 2 36 2 Bidirectional 512 6 1024 18 24 8 1024 36 1024 36 3.3 V 2048 9 2048 18 2048 36 2048 36 3.3 V OUTPUT 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S 3S TYPE 224 2226 2227 7813 7813 3611 3613 3612 3614 2228 2229 7805 7805 3622 7803 7803 7819 3631 3631 3632 3638 7811 7881 3641 3641 TECHNOLOGY ABT ACT ALVC LS
FUNCTIONAL INDEX
7807 7882 3651 3651
319
FLIP FLOPS
320
D Type Flip Flops (3 state)
DESCRIPTION Dual 4 Bit Edge Triggered Quad Octal Bus Interface
OUTPUT 3S 3S 3S 3S 3S/CP
TYPE 874 876 173 825 29825 374 11374 574 575 576 577
TECHNOLOGY
ABT AC ACT AHC AHCT ALS ALVC ALVT AS AVC BCT F FCT HC HCT LS LV LVC LVT S
Octal Edge Triggered 3S
Octal Edge Triggered Dual Rank Octal Edge Triggered with Series Damping Resistors Octal Inverting
3S
4374 2374
3S 2574 3S 534 564 822 823 824 29823 821 29821 16820 162820 16374 162374 163374 16823 162823 '
9 Bit Bus Interface
3S
10 Bit Bus Interface 10 Bit with Dual Outputs
3S 3S
16 Bit Edge Triggered 6
3S
18 Bit 8
3S
D Type Flip Flops (3 state) (continued)
DESCRIPTION
OUTPUT
TYPE 16721
TECHNOLOGY
'
' ' ' '
20 2 Bit
3S
162721 16722 16821 32374
32 Bit Edge Triggered
3S
D Type Flip Flops (non 3 state)
DESCRIPTION Single Edge Triggered
OUTPUT
TYPE 1G79 1G80 4013 74
TECHNOLOGY
ABT AC ACT AHC AHCT ALS ALVC ALVT AS AVC BCT CD4K F FCT HC HCT LS LV LVC LVT S TTL
' '
Dual CP Quad CP
11074 175 11175 40175 174 40174 378 273 377
Hex x Hex with Enable Octal Octal with Enable
Other Flip Flops
FUNCTIONAL INDEX
DESCRIPTION Dual Edge-Triggered J-K Master-Slave Dual Edge-Triggered J-K with Reset Dual Edge-Triggered J-K with Set and Reset Dual Positive-Edge-Triggered J-K with Set and Reset Quad Edge-Triggered J-K 321
TYPE 4027 73 107 112 109 276
TECHNOLOGY AC ACT ALS AS CD4K F HC HCT LS LVC S TTL
GATES AND INVERTERS

AND Gates
DESCRIPTION Single 2 Input CP OC OUTPUT TYPE 1G08 08 Quad 2 Input 11008 09 4081 Quad 2-Input Buffers/Drivers Quad 2 Input with Schmitt-Trigger Inputs Dual 4 Input 1008 7001 21 4082 11 Triple 3 Input CP 11011 4073 TECHNOLOGY AC ACT AHC AHCT ALS ALVC AS AVC CD4K F HC HCT LS LV LVC ' S
322
NAND Gates
DESCRIPTION Single 2 Input Dual 2-Input Buffers/Drivers CP OC Quad 2 Input OD 3S OC Quad 2-Input Buffers/Drivers Quad 2 Input Unbuffered Quad 2 Input with Schmitt-Trigger Inputs Hex 2-Input Drivers x2 Triple 3 Input Dual 4 Input Dual 4-Input Positive 50- Line Drivers 8 Input 8 Input AND/NAND 13 Input OUTPUT TYPE 1G00 40107 00 11000 03 03 4011 26 37 38 1000 4011 132 4093 804 1804 10 4023 4012 20 140 30 CP 11030 4068 133 TECHNOLOGY AC ACT AHC AHCT ALS ALVC AS AVC CD4K F HC HCT LS LV LVC ' S TTL
FUNCTIONAL INDEX
323
GATES AND INVERTERS

AND OR Invert Gates
DESCRIPTION Dual 2 Wide 2 Input Dual 2 Wide 2 Input, 2 Wide 3 Input Expandable 4 Wide 2 Input Expandable 8 Input TYPE 51 4085 51 4086 4048 TECHNOLOGY CD4K LS S
324
OR Gates
DESCRIPTION Single 2 Input Quad 2 Input Quad 2-Input Buffers/Drivers Quad 2 Input with Schmitt-Trigger Inputs Hex 2-Input Drivers Dual 4 Input Triple 3 Input CP OUTPUT TYPE 1G32 32 11032 4071 1032 7032 832 4072 4075 TECHNOLOGY AC ACT AHC AHCT ALS ALVC AS AVC CD4K F HC HCT LS LV LVC ' S TTL
NOR Gates
DESCRIPTION Single 2 Input Quad 2 Input OC Quad 2 Input with Schmitt-Trigger Inputs Quad 2 Input Unbuffered x2 Hex 2-Input Drivers Triple 3 Input Dual 4 Input Dual 4 Input with Strobe Dual 5 Input 8 Input NOR/OR OUTPUT TYPE 1G02 4001 02 33 7002 4001 805 808 4025 27 4002 25 260 4078 TECHNOLOGY AC ACT AHC AHCT ALS AS CD4K F HC HCT LS LV LVC ' S TTL
Exclusive OR Gates
DESCRIPTION Single 2 Input OUTPUT TYPE 1G86 4030 4070 Quad 2 Input CP OC 86 11086 136 TECHNOLOGY AC ACT AHC AHCT ALS AS CD4K F HC HCT LS LV LVC ' S
FUNCTIONAL INDEX
Exclusive NOR Gates

DESCRIPTION OUTPUT OC Quad 2 Input 325 OD TYPE 266 266 4077 7266 TECHNOLOGY CD4K HC LS
GATES AND INVERTERS

Gate and Delay Elements
DESCRIPTION Dual Unbuffered Complementary Pairs Plus Inverters Quad AND/OR Select Gates Quad True/Complement Buffers Quad Complementary-Output Elements Hex Delay Elements for Generating Delay Lines Hex Gates (4 Inverters, 2-Input NOR, 2-Input NAND) TYPE 4007 4019 4041 265 31 4572 TECHNOLOGY CD4K LS TTL
326
Inverters
DESCRIPTION Single Unbuffered Single Single Schmitt Trigger CP Hex x OC OD Unbuffered Hex Hex Schmitt Trigger x OUTPUT TYPE 1G04 1GU04 1G14 04 11004 05 05 4069 U04 14 19 ' TECHNOLOGY AC ACT AHC AHCT ALS ALVC AS CD4K F HC HCT LS LV LVC ' S TTL
LATCHES
D Type Latches (3 state)
DESCRIPTION Dual 4 Bit Octal Inverting Transparent
TYPE 873 533 563 373 11373
TECHNOLOGY
Octal Transparent
573 580 845 666 667 2373 843
Octal Transparent Read Back Octal Transparent with Series Damping Resistors
9 Bit Transparent 9 Bit Transparent Read Back 10 Bit Transparent 12 Bit to 24 Bit Multiplexed 12 Bit to 24 Bit Multiplexed with Series Damping Resistors 16 Bit Transparent 6 18 Bit Transparent 2 Bit Transparent 20 32 Bit Transparent
29843 844 992 841 29841 842 16260 162260 16373 '
FUNCTIONAL INDEX
162373 16843 16841 162841 32373 ' '
327
LATCHES
Other Latches
DESCRIPTION Dual 2 Bit Bistable Transparent Dual 4 Bit with Strobe 4 Bit Bistable Quad Clocked D Quad NAND R-S Quad NOR R-S Quad S-R 8 Bit Addressable 8 Bit D-Type Transparent Read-Back 8 Bit Edge-Triggered Read-Back 10 Bit D-Type Transparent Read-Back 3S 3S 3S OUTPUT TYPE 75 4508 75 375 4042 4044 4043 279 259 4099 4724 990 996 994 TECHNOLOGY ALS CD4K HC HCT LS
328
LITTLE LOGIC
AND Gates
DESCRIPTION Single 2 Input TYPE 1G08 TECHNOLOGY AHC AHCT LVC '
NAND Gates
OR Gates
NOR Gates
Exclusive OR Gates
D Type Flip Flops

DESCRIPTION Single Edge Triggered TYPE 1G79 1G80 TECHNOLOGY LVC ' '
Inverters
DESCRIPTION Single Single Schmitt Trigger TYPE 1G04 1GU04 1G14 ' TECHNOLOGY AHC AHCT LVC '
FUNCTIONAL INDEX
Inverting Buffers and Drivers

DESCRIPTION Single 329 OUTPUT OD 3S TYPE 1G06 1G240 ' TECHNOLOGY LVC
LITTLE LOGIC
330
Noninverting Buffers and Drivers
DESCRIPTION Single Single Bus Buffers
OUTPUT OD 3S
TYPE 1G07 1G125 1G126
TECHNOLOGY AHC AHCT LVC ' ' '
Standard Bus Switches
DESCRIPTION Single Bilaterial (Analog or Digital) Single FET Single FET with Level Shifting
TYPE 1G66 1G66 1G125 1G384 1G125
TECHNOLOGY CBT ' LVC '
MEMORY DRIVERS AND TRANSCEIVERS (HSTL, SSTL, AND SSTV)
Buffers, Drivers, and Latches
DESCRIPTION 9-Bit to 18-Bit HSTL-to-LVTTL Memory Address Latches 13-Bit to 26-Bit Registered Buffers with SSTL_2 Inputs and Outputs 14-Bit Registered Buffers with SSTL_2 Inputs and Outputs 14-Bit to 28-Bit HSTL-to-LVTTL Memory Address Latches 20-Bit SSTL_3 Interface Buffers 20-Bit SSTL_3 Interface Universal Bus Drivers
OUTPUT 3S 3S 3S 3S 3S
TYPE 16918 16859 16857 162822 16847 16837
TECHNOLOGY HSTL SSTL SSTV ' '
REGISTERS
Registers
DESCRIPTION / 1-Bit to 4 Address Registers/Drivers 4-Bit OUTPUT 3S TYPE 162831 162832 194 4 Bit Bidirectional Universal Shift 4 Bit Cascadable Shift 4 Bit D-Type 4 Stage Parallel-In/Parallel-Out Shift Dual 4 Stage Static Shift 4-by-4 4 4 Register Files Dual 16-by-4 Register Files 5 Bit Shift 8 Bit Serial In, Parallel Out Shift 8 Bit Parallel In, Serial Out Shift with Gated Clock 8 Bit Parallel In, Serial In, Serial Out Shift 8 Bit Shift with Output Registers 8 Bit Shift with 3-State Output Registers 8 Bit Shift with 3-State Output Latches 8 Bit Shift with Input Latches 8 Bit Shift with Input Latches and 3-State Input/Output Ports 8 Bit Universal Shift/Storage / 8 Stage Static Shift 8-Stage Shift-and-Store Bus 8-Stage Static Bidirectional Parallel-/Serial-Input/Output Bus 16 Bit Serial In/Out with 16-Bit Parallel-Out Storage 6 / 6 64 Stage Static Shift 331 3S 3S 3S OC 3S 3S OC 3S 3S 3S 195 40194 395 4076 4035 4015 170 670 870 96 164 165 166 594 599 595 596 597 598 299 323 4014 4021 4094 4034 673 674 4031 TECHNOLOGY AC ACT AHC AHCT ALS ALVC AS CD4K F HC HCT LS LV S
FUNCTIONAL INDEX
REGISTERS
332
Registers (continued)
DESCRIPTION Dual 64 Stage Static Shift
OUTPUT 3S
TYPE 4517
TECHNOLOGY AC ACT AHC AHCT ALS ALVC AS CD4K F HC HCT LS LV S
SPECIALTY LOGIC
Adders
DESCRIPTION 9 Bit Binary Full with Fast Carry
TYPE 283
TECHNOLOGY AC ACT F HC HCT LS S
Arithmetic Logic Units
DESCRIPTION / Arithmetic Logic Units/Function Generators Look-Ahead Carry Generators
TYPE 181 381 182
TECHNOLOGY AS LS S
Bus Termination Arrays and Networks
DESCRIPTION Dual 4-Bit Programmable Terminators 8-Bit Schottky Barrier Diode Bus-Termination Arrays 10-Bit Bus-Termination Networks with Bus Hold 12-Bit Schottky Barrier Diode Bus-Termination Arrays 2 16-Bit Bus-Termination Networks with Bus Hold 16-Bit Schottky Barrier Diode Bus-Termination Arrays 6 16-Bit Schottky Barrier Diode R-C Bus-Termination Arrays
TYPE 40117 1056 1071 1050 1051 1073 1052 1053 1016
TECHNOLOGY ACT CD4K F S
Comparators (identity)
DESCRIPTION 8 Bit Identity (P = Q) 8 Bit Identity (P = Q) with Input Pullup Resistors 8 Bit Identity (P = Q) with Input Pullup Resistors 12 Bit Address
OUTPUT
TYPE 521
TECHNOLOGY ALS F
OC
518 520 679
Comparators (magnitude)
DESCRIPTION
TYPE 85
TECHNOLOGY ALS AS CD4K HC HCT LS S
4 Bit
4063 4585 682 684 688 885
8 Bit
Digital Phase Locked Loops (PLLs)
DESCRIPTION Digital PLLs PLLs with VCO PLLs with VCO and Lock Detectors
TYPE 297 4046 7046
TECHNOLOGY ACT CD4K HC HCT LS
FUNCTIONAL INDEX
Drivers/Multipliers
DESCRIPTION 4-Bit Binary Rate Multipliers BCD Rate Multipliers Synchronous 6-Bit Binary Rate Multipliers
TYPE 4089 4527 97
TECHNOLOGY CD4K TTL
333
334
ECL/TTL Functions
SPECIALTY LOGIC
DESCRIPTION Octal ECL-to-TTL Translators Octal ECL-to-TTL Translators with Edge-Triggered D-Type Flip-Flops Octal TTL-to-ECL Translators with Edge-Triggered D-Type Flip-Flops and Output Enable Octal TTL-to-ECL Translators with Output Enable
OUTPUT 3S 3S
TYPE 10KHT5541 10KHT5574 10KHT5578 10KHT5542 10KHT5543
TECHNOLOGY ECL
Frequency Dividers/Timers
DESCRIPTION 24-Stage Frequency Dividers Programmable Frequency Dividers/Digital Timers / Programmable Timers
TYPE 4521 292 294 4536 4541
TECHNOLOGY CD4K LS
Monostable Multivibrators
DESCRIPTION Low Power Monostable/Astable Monostable Multivibrators with Schmitt-Trigger Inputs Retriggerable Dual Dual with Schmitt-Trigger Inputs Dual Precision Dual Retriggerable with Reset Dual Retriggerable Precision
TYPE 4047 121 122 4098 221 14538 123 423 4538
TECHNOLOGY AHC AHCT CD4K HC HCT LS LV TTL
Oscillators
DESCRIPTION Single Crystal Controlled Single Voltage Controlled Dual Voltage Controlled TYPE 321 624 628 124 629 TECHNOLOGY LS S
Parity Generators and Checkers

DESCRIPTION Dual 8 Bit Odd 9 Bit Odd/Even 9 Bit with Bus-Driver Parity Input/Output Port / CP OUTPUT TYPE 480 280 286 11286 TECHNOLOGY AC ACT ALS AS F FCT HC HCT LS S
Translation Voltage Clamps

DESCRIPTION 10 Bit 22 Bit TYPE 3010 16222 TECHNOLOGY TVC
Voltage Level Shifters

DESCRIPTION Quad Low to High Hex for TTL-to-CMOS or CMOS-to-CMOS Operation TYPE 40109 4504 TECHNOLOGY CD4K
FUNCTIONAL INDEX
335
TRANSCEIVERS
Parity Transceivers
DESCRIPTION Octal with Parity Generators/Checkers OUTPUT 3S TYPE 657 833 8 Bit to 9 Bit 29833 853 29854 Dual 8 Bit to 9 Bit 16 Bit with Parity Generators/Checkers 3S 16833 16853 16657 TECHNOLOGY ABT ACT ALS BCT F
336
Registered Transceivers
DESCRIPTION OUTPUT TYPE 52 543 11543 561 3S Octal 646 648 651 652 11652 OD/3S / OC/3S / 653 654 653 654 2543 Octal with Series Damping Resistors 3S 2646 2652 2952 TECHNOLOGY ABT AC ACT ALS ALVC ALVT AS AVC BCT F FCT HC HCT LS LVC LVT
Registered Transceivers (continued)
DESCRIPTION
OUTPUT
TYPE 16470 16543 162543 163543 16646 162646 163646 16651 16652 162652 163652 16952 162952 163952 16524
ABT
AC
ACT
ALS
ALVC
ALVT '
AS
AVC
BCT
FCT
HC
HCT
LS
LVC
LVT
'
'
16 Bit 6
3S
'
18 Bit 8 32 Bit 4 to 1 Multiplexed/Demultiplexed
3S 3S 3S
16525 162525 32543 162460
Standard Transceivers
DESCRIPTION 2 Bit LVTTL to GTLP Adjustable Edge Rate with Selectable Parity Quad Quad Tridirectional 7 Bit Bus Interface IEEE Std 1284 8 Bit LVTTL to GTLP
OUTPUT
TYPE
TECHNOLOGY
ABT ABTE AC ACT AHC AHCT ALB ALS ALVC ALVT AS AVC BCT 64BCT F FCT GTL GTLP HC HCT LS LV LVC LVT
3S 3S 3S 3S 3S
1394 243 442 1284 306
'
FUNCTIONAL INDEX
'
337
TRANSCEIVERS
338
Standard Transceivers (continued)
DESCRIPTION
OUTPUT
TYPE 245
TECHNOLOGY
3S
1245 11245 620 621 623 638
OC
Octal
3S
639 640 1640 641 642 645 1645 2245
OC 3S Octal with Series Damping Resistors Octal Transceivers and Line/MOS Drivers with B-Port Series Damping Resistors Octal with Adjustable Output Voltage Octal Dual Supply with Configurable Output Voltage Octal with 3.3-V to 5-V Shifters 3S
3S
2245
3S
3245
3S
4245
3S
4245 863
9 Bit 10 Bit 11 Bit Incident Wave Switching
3S 3S 3S/OC
29863 29864 861 16246
Standard Transceivers (continued)
DESCRIPTION
OUTPUT
TYPE 16245
TECHNOLOGY
'
16 Bit 6 16 Bit LVTTL to GTLP Adjustable Edge Rate 16 Bit with Input/Output Series Damping Resistors 16 Bit Incident Wave Switching 16 Bit with 6 Series Damping Resistors 16 Bit 3.3 V to 5 V Level Shifting 16 Bit LVTTL to GTLP 18 Bit Bus Interface 18 Bit 8 LVTTL to GTL/GTL+ 19 Bit Bus Interface IEEE Std 1284 20 Bit 25 Octal 32 Bit 32 Bit LVTTL to GTLP 32 Bit LVTTL to GTLP Adjustable Edge Rate
3S
16623 16640
3S
1645
'
3S
16245
'
3S
16245 16245
3S
162245 163245
'
3S 3S 3S
164245 16945 16863 16622 16923 161284 '
3S 3S OC 3S 3S 3S
16861 25245 25642 32245 32945 3245 ' '
FUNCTIONAL INDEX
'
339
UNIVERSAL BUS FUNCTIONS

Universal Bus Transceivers
DESCRIPTION 16 Bit LVTTL to GTL/GTL+ with Live Insertion 16 Bit LVTTL to GTLP Adjustable Edge Rate 17 Bit LVTTL to GTLP Adjustable Edge Rate 17 Bit LVTTL to GTL/GTL+ 17 Bit LVTTL to GTLP with Buffered Clock 3S 3S 3S OUTPUT TYPE 1655 1655 1616 16616 16916 16500 162500 163500 16501 18 Bit 8 3S 162501 163501 16600 16601 162601 18 Bit with Parity Generators/Checkers 18 Bit LVTTL to GTL/GTL+ 18 Bit LVTTL to GTLP 8 18 Bit LVTTL to GTLP Adjustable Edge Rate 32 Bit 3S 3S 3S 3S 16901 16612 16612 16912 1612 32501 ' ' ' ' ' ' ' ' TECHNOLOGY ABT ALVC ALVT AVC FCT GTL GTLP LVC LVT
340
Universal Bus Drivers

DESCRIPTION 12 Bit with Parity Checker and Dual 3-State Outputs 16 Bit 6 OUTPUT 3S 3S TYPE 16903 16334 162334 16834 18 Bit 8 3S 162834 16835 162835 20 2 Bit 3S 16836 162836 ' TECHNOLOGY ABT ALVC ALVT AVC GTLP LVC LVT
Universal Bus Exchangers

DESCRIPTION 9 Bit 4 Port 12 Bit to 24 Bit Multiplexed 12 Bit to 24 Bit Registered 2 16 Bit to 32 Bit with Byte Masks 16 Bit Tri-Port 18 Bit to 36 Bit Registered 8 6 18 Bit Tri-Port OUTPUT 3S 3S 3S 3S 3S 3S 3S TYPE 16409 162409 16271 16269 16270 162268 162280 32316 16282 162282 32318 TECHNOLOGY ABT ALVC ALVT AVC GTLP LVC LVT
FUNCTIONAL INDEX
341
342
LOGIC OVERVIEW
1 2 3 4 5 A B
FUNCTIONAL INDEX
FUNCTIONAL CROSS-REFERENCE
41
42
Product available in technology indicated
Product available in reduced-noise advanced CMOS (11000 series) CMOS

CBTLV AHCT ALVC CD4K
' New product planned in technology indicated OTHER

ABTE GTLP HSTL JTAG SSTV SSTL FIFO HCT TVC GTL
BiCMOS
ALVT 64BCT ALB ABT BCT ALS
BIPOLAR
AHC ACT AVC LVT TTL AC AS LS S F
CBT
FCT
1G00 1G02 1G04 1GU04 1G06 1G07 1G08 1G14 1G32 1G66 1G79 1G80 1G86 1G125 1G126 1G240 1G384 00 02 03 04 U04 05 06 07 08 09 10 11 14
43
' ' '
' ' ' ' ' '
' '
PCA
DEVICE
LVC
HC
LV
FB
ABT ALB ALVT BCT 64BCT LVT ALS AS F LS S TTL AC
ACT
AHC AHCT ALVC AVC CBT CBTLV CD4K FCT HC HCT LV LVC TVC ABTE FB FIFO GTL GTLP HSTL JTAG PCA SSTL SSTV
44
97 DEVICE BiCMOS BIPOLAR CMOS OTHER
96
93
92
90
86
85
75
74
73
52
51
47
45
42
38
37
35
33
32
31
30
27
26
25
21
20
19
17
16
107
BiCMOS
64BCT ALVT ALB ABT BCT ALS
BIPOLAR
AHCT ALVC AHC ACT AVC LVT TTL AC AS LS S F
CMOS
CBTLV CD4K ABTE FIFO CBT HCT LVC TVC GTL FCT HC LV FB
OTHER
GTLP HSTL JTAG SSTV SSTL PCA
DEVICE 109 112 121 122 123 124 125 126 128 132 133 136 137 138 139 140 145 147 148 150 151 153 154 155 156 157 158 159 161 163 164
45
'
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
165 166 169 170 173 174 175 181 182 190 191 192 193 194 195 221 224 225 229 230 232 233 236 237 238 240 241 243 244 245 247
SSTV
TTL
SSTL
FIFO
AHC
ABT
ACT
BCT
CBT
HCT
ALS
TVC
GTL
LVT
FCT
AS
LS
PCA
ALB
AVC
LVC
AC
HC
LV
FB
46
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
BIPOLAR
CMOS
OTHER
DEVICE 250 251 253 257 258 259 260 265 266 273 276 279 280 283 286 292 293 294 297 298 299 306 321 323 348 354 356 365 366 367 368
47
'
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
373 374 375 377 378 381 390 393 395 399 423 442 465 480 518 520 521 533 534 540 541 543 561 563 564 569 573 574 575 576 577
SSTV
TTL
SSTL
FIFO
AHC
ABT
ACT
BCT
CBT
HCT
ALS
TVC
GTL
LVT
FCT
AS
LS
PCA
ALB
AVC
LVC
AC
HC
LV
FB
48
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
BIPOLAR
CMOS
OTHER
DEVICE 580 590 592 593 594 595 596 597 598 599 620 621 623 624 628 629 638 639 640 641 642 645 646 648 651 652 653 654 657 666 667
49
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
669 670 673 674 679 682 684 688 697 746 756 757 760 804 805 808 817 818 821 822 823 824 825 827 828 832 833 841 842 843 844 '
SSTV
TTL
SSTL
FIFO
AHC
ABT
ACT
BCT
CBT
HCT
ALS
TVC
GTL
LVT
FCT
AS
LS
PCA
ALB
AVC
LVC
AC
HC
LV
FB
410
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
BIPOLAR
CMOS
OTHER
DEVICE 845 853 857 861 863 867 869 870 873 874 876 885 990 992 994 996 1000 1004 1005 1008 1016 1032 1034 1035 1050 1051 1052 1053 1056 1071 1073
411
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
1244 1245 1284 1394 1612 1616 1640 1645 1650 1651 1653 1655 1804 2031 2032 2033 2040 2041 2226 2227 2228 2229 2235 2240 2241 2244 2245 2257 2373 2374 2414 ' ' ' ' '
SSTV
TTL
SSTL
FIFO
AHC
ABT
ACT
BCT
CBT
HCT
ALS
TVC
GTL
LVT
FCT
AS
LS
PCA
ALB
AVC
LVC
AC
HC
LV
FB
412
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
BIPOLAR
CMOS
OTHER
DEVICE 2541 2543 2573 2574 2646 2652 2827 2952 3010 3125 3126 3244 3245 3251 3253 3257 3306 3345 3383 3384 3611 3612 3613 3614 3622 3631 3632 3638 3641 3651 3857
413
'
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
3861 4001 4002 4007 4009 4010 4011 4012 4013 4014 4015 4016 4017 4018 4019 4020 4021 4022 4023 4024 4025 4026 4027 4028 4029 4030 4031 4033 4034 4035 4040
SSTV
TTL
SSTL
FIFO
AHC
ABT
ACT
BCT
CBT
HCT
ALS
TVC
GTL
LVT
FCT
AS
LS
PCA
ALB
AVC
LVC
AC
HC
LV
FB
414
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
BIPOLAR
CMOS
OTHER
DEVICE 4041 4042 4043 4044 4045 4046 4047 4048 4049 4050 4051 4052 4053 4054 4055 4056 4059 4060 4063 4066 4067 4068 4069 4070 4071 4072 4073 4075 4076 4077 4078
415
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
4081 4082 4085 4086 4089 4093 4094 4097 4098 4099 4245 4316 4351 4352 4374 4502 4503 4504 4508 4510 4511 4512 4514 4515 4516 4517 4518 4520 4521 4522 4527
SSTV
TTL
SSTL
FIFO
AHC
ABT
ACT
BCT
CBT
HCT
ALS
TVC
GTL
LVT
FCT
AS
LS
PCA
ALB
AVC
LVC
AC
HC
LV
FB
416
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
BIPOLAR
CMOS
OTHER
DEVICE 4532 4536 4538 4541 4543 4555 4556 4572 4585 4724 5400 5401 5402 5403 6800 7001 7002 7032 7046 7266 7802 7803 7804 7805 7806 7807 7808 7811 7813 7814 7819
417
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
7820 7881 7882 8240 8244 8245 8373 8374 8543 8550 8646 8652 8952 8980 8990 8996 8997 11000 11004 11008 11011 11030 11032 11074 11086 11138 11139 11175 11240 11244 11245
SSTV
TTL
SSTL
FIFO
AHC
ABT
ACT
BCT
CBT
HCT
ALS
TVC
GTL
LVT
FCT
AS
LS
PCA
ALB
AVC
LVC
AC
HC
LV
FB
418
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
BIPOLAR
CMOS
OTHER
DEVICE 11257 11286 11373 11374 11543 11652 14538 16209 16210 16211 16212 16213 16214 16222 16232 16233 16240 16241 16244 16245 16246 16260 16269 16270 16271 16282 16292 16334 16344 16373 16374
419
' '
'
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
16390 16409 16460 16470 16500 16501 16524 16525 16540 16541 16543 16600 16601 16612 16616 16622 16623 16640 16646 16651 16652 16657 16721 16722 16800 16820 16821 16823 16825 16827 16831 ' ' ' ' ' ' ' ' ' ' '
SSTV
TTL
SSTL
FIFO
AHC
ABT
ACT
BCT
CBT
HCT
ALS
TVC
GTL
LVT
FCT
AS
LS
PCA
ALB
AVC
LVC
AC
HC
LV
FB
420
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
BIPOLAR
CMOS
OTHER
DEVICE 16832 16833 16834 16835 16836 16837 16841 16843 16847 16853 16857 16859 16861 16863 16901 16903 16912 16916 16918 16923 16945 16952 18245 18502 18504 18512 18514 18640 18646 18652 25244
421
' '
' '
' '
'
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
25245 25642 29821 29823 29825 29827 29828 29833 29841 29843 29854 29863 29864 32244 32245 32316 32318 32373 32374 32501 32543 32945 40102 40103 40105 40106 40107 40109 40110 40117 40147 ' ' ' ' ' ' '
SSTV
TTL
SSTL
FIFO
AHC
ABT
ACT
BCT
CBT
HCT
ALS
TVC
GTL
LVT
FCT
AS
LS
PCA
ALB
AVC
LVC
AC
HC
LV
FB
422
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
BiCMOS
BIPOLAR
CMOS
OTHER
DEVICE 40161 40174 40175 40192 40193 40194 40257 161284 162240 162241 162244 162245 162260 162268 162280 162282 162292 162334 162344 162373 162374 162409 162460 162500 162501 162525 162541 162543 162601 162646 162652
423
'
CBTLV
64BCT
AHCT
ALVC
CD4K
ABTE
GTLP
HSTL
ALVT
JTAG
162721 162820 162822 162823 162825 162827 162830 162831 162832 162834 162835 162836 162841 162952 163244 163245 163373 163374 163500 163501 163543 163646 163652 163827 163952 164245 182502 182504 182512 182646 182652
SSTV
TTL
SSTL
FIFO
AHC
ABT
ACT
BCT
CBT
HCT
ALS
TVC
GTL
LVT
FCT
AS
LS
PCA
ALB
AVC
LVC
AC
HC
LV
FB
424
BiCMOS DEVICE
BIPOLAR
CMOS
OTHER
LOGIC OVERVIEW
FUNCTIONAL INDEX
LOGIC PURCHASING TOOLS/ALTERNATE SOURCES
51
52
SECTION 5 DEVICE SELECTION GUIDE
CONTENTS
ABT Advanced BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 ABTE/ETL Advanced BiCMOS Technology/Enhanced Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . 511 AC/ACT Advanced CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 513 AHC/AHCT Advanced High-Speed CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 521 ALB Advanced Low-Voltage BiCMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 527 ALS Advanced Low-Power Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 529 ALVC Advanced Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 535 ALVT Advanced Low-Voltage BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 539 AS Advanced Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 541 AVC Advanced Very-Low-Voltage CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 545 BCT BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 547 64BCT 64-Series BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 547 BTA Bus-Termination Arrays . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 551 CBT Crossbar Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 553 CBTLV Low-Voltage Crossbar Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 557 CD4000 CMOS B-Series Integrated Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 559 74F Fast Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 563 FB+/BTL FutureBus+/Backplane Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 567 FCT Fast CMOS TTL Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 569 FIFO First-In, First-Out Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 577 GTL Gunning Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 581 GTLP Gunning Transceiver Logic Plus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 583 HC/HCT High-Speed CMOS Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 587 IEEE Std 1149.1 (JTAG) Boundary-Scan Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 597 Little Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5101 LS Low-Power Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5105 LV Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5111 LVC Low-Voltage CMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5115 LVT Low-Voltage BiCMOS Technology Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5119 PCA I2C Inter-Integrated Circuit Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5123 S Schottky Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5125 SSTL/SSTV Stub Series-Terminated Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5129 HSTL High-Speed Transceiver Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5129 TTL Transistor-Transistor Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5131 TVC Translation Voltage Clamp Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5135
53
54
ABT
Advanced BiCMOS Technology Logic

The ABT family, TIs second-generation family of BiCMOS bus-interface products, is manufactured using a 0.8- BiCMOS process. It provides high drive up to 64 mA and propagation delays in the 5-ns range, while maintaining very low power consumption. ABT products are well suited for live-insertion applications with an Ioff specification of 0.1 mA. The ABT family offers series-damping-resistor options where reduced transmission-line effects are required. Special ABT parts that provide high-current drive (180 mA) for use with 25- transmission lines also are offered. Advanced bus functions, such as universal bus transceivers (UBT ) emulate a wide variety of bus-interface functions. Multiplexing options for memory interleaving and bus upsizing or downsizing also are provided. The ABT devices can be purchased in octal, Widebus, or Widebus+. The Widebus and Widebus+ packages feature higher performance with reduced noise and flow-through pinout for easier board layout. Widebus+ devices offer input bus-hold circuitry to eliminate the need for external pullup resistors for floating inputs. See www.ti.com/sc/logic for the most current data sheets.
55
DEVICE SELECTION GUIDE ABT

DEVICE SN74ABT125 SN74ABT126 SN74ABT240A SN74ABT241 SN74ABT241A SN54ABT244 SN74ABT244A SN74ABT245A SN74ABT245B SN74ABTH245 SN74ABT273 SN74ABT373 SN54ABT374 SN74ABT374A SN74ABT377 SN74ABT377A SN74ABT533 SN74ABT533A SN74ABT534 SN74ABT534A SN74ABT540 SN54ABT541 SN74ABT541B SN74ABT543 SN74ABT543A SN74ABT573 SN74ABT573A SN54ABT574 SN74ABT574A SN74ABT620 SN74ABT623 NO. PINS 14 14 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 24 24 20 20 20 20 20 20 DESCRIPTION Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal D-Type Flip-Flops with Clear Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal D-Type Flip-Flops with Enable Octal D-Type Flip-Flops with Enable Octal Inverting Transparent Latches with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs AVAILABILITY
MIL PDIP QFP SOIC SSOP TQFP TSSOP TVSOP
LITERATURE REFERENCE SCBS182 SCBS183 SCBS098 SCBS184 SCBS184 SCBS099 SCBS099 SCBS081 SCBS081 SCBS663 SCBS185 SCBS155 SCBS111 SCBS111 SCBS156 SCBS156 SCBS186 SCBS186 SCBS187 SCBS187 SCBS188 SCBS093 SCBS093 SCAS422 SCBS157 SCBS190 SCBS190 SCBS191 SCBS191 SCBS113 SCBS114
commercial package description and availability

LFBGA (low-profile fine-pitch ball grid array) GKE = 96 pins GKF = 114 pins PDIP (plastic dual-in-line package)
P = 8 pins N = 14/16/20 pins NT = 24/28 pins
QFP (quad flatpack) RC = 52 pins (FB only) PH = 80 pins (FIFO only) PQ = 100/132 pins (FIFO only) TQFP (plastic thin quad flatpack)
PAH PAG PM PN PCA, PZ PCB = 52 pins = 64 pins (FB only) = 64 pins = 80 pins = 100 pins (FB only) = 120 pins (FIFO only)
SOIC (small-outline integrated circuit) D = 8/14/16 pins DW = 16/20/24/28 pins QSOP (quarter-size outline package)
DBQ = 16/20/24 pins
TSSOP (thin shrink small-outline package)

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins
TVSOP (thin very small-outline package)

DGV = 14/16/20/24/48/56 pins DBB = 80 pins
SSOP (shrink small-outline package)

DB = 14/16/20/24/28/30/38 pins DBQ = 16/20/24 DL = 28/48/56 pins
PLCC (plastic leaded chip carrier)

FN = 20/28/44/68/84 pins
SOT (small-outline transistor) DBV = 5 pins DCK = 5 pins
schedule
= Now ' = Planned
56

DEVICE SN74ABT640 SN74ABT646A SN74ABT651 SN74ABT652A SN74ABT657A SN54ABT821 SN74ABT821A SN74ABT823 SN74ABT827 SN74ABT833 SN74ABT841 SN74ABT841A SN74ABT843 SN74ABT853 SN74ABT861 SN74ABT863 SN74ABT2240A SN74ABT2241 SN74ABT2244A SN74ABT2245 SN74ABTR2245 SN74ABT2827 SN74ABT2952A SN74ABT5400A SN74ABT5401 SN74ABT5402A SN74ABT5403 SN54ABT16240 SN74ABT16240A SN74ABT16241A SN74ABT16244A SN74ABTH16244 SN74ABT16245A SN74ABTH16245 SN74ABTH16260 SN74ABT16373A SN74ABT16374A NO. PINS 20 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 20 20 20 20 20 24 24 28 28 28 28 48 48 48 48 48 48 48 56 48 48 DESCRIPTION Octal Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers with Parity Generators/Checkers and 3-State Outputs 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 10-Bit Buffers/Drivers with 3-State Outputs 8-Bit to 9-Bit Parity Bus Transceivers 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 9-Bit Bus-Interface D-Type Latches with 3-State Outputs 8-Bit to 9-Bit Parity Bus Transceivers 10-Bit Transceivers with 3-State Outputs 9-Bit Bus Transceivers with 3-State Outputs Octal Buffers and Line/MOS Drivers with Series Damping Resistors and 3-State Outputs Octal Buffers and Line/MOS Drivers with Series Damping Resistors and 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs Octal Transceivers and Line MOS Drivers with Series Damping Resistors and 3-State Outputs Octal Transceivers and Line MOS Drivers with Series Damping Resistors and 3-State Outputs 10-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs 11-Bit Line/Memory Drivers with 3-State Outputs 11-Bit Line/Memory Drivers with 3-State Outputs 12-Bit Line/Memory Drivers with 3-State Outputs 12-Bit Line/Memory Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 12-Bit to 24-Bit Multiplexed D-Type Latches with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCBS104 SCBS069 SCBS083 SCBS072 SCBS192 SCBS193 SCBS193 SCBS158 SCBS159 SCBS195 SCBS196 SCBS196 SCBS197 SCBS198 SCBS199 SCBS201 SCBS232 SCBS233 SCBS106 SCBS234 SCBS680 SCBS648 SCBS203 SCBS661 SCBS235 SCBS660 SCBS236 Call SCBS095 SCBS096 SCBS073 SCBS677 SCBS300 SCBS662 SCBS204 SCBS160 SCBS205
57

DEVICE SN74ABTH16460 SN74ABT16470 SN74ABT16500B SN74ABT16501 SN74ABT16540A SN74ABT16541A SN74ABT16543 SN74ABTH16543 SN74ABT16600 SN74ABT16601 SN74ABT16623 SN74ABT16640 SN74ABT16646 SN74ABT16652 SN74ABT16657 SN74ABT16821 SN74ABT16823 SN74ABTH16823 SN74ABT16825 SN74ABT16833 SN74ABT16841 SN74ABT16843 SN74ABT16853 SN74ABT16863 SN74ABT16952 SN74ABTH25245 SN74ABTH32245 SN74ABTH32316 SN74ABTH32318 SN74ABTH32501 SN74ABTH32543 SN74ABT162244 SN74ABT162245 SN74ABTH162245 SN74ABTH162260 SN74ABTH162460 SN74ABT162500 SN74ABT162501 SN74ABT162601 NO. PINS 56 56 56 56 48 48 56 56 56 56 48 48 56 56 56 56 56 56 56 56 56 56 56 56 56 24 100 80 80 100 100 48 48 48 56 56 56 56 56 DESCRIPTION 4-to-1 Multiplexed/Demultiplexed Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Transceivers with Parity Generators/Checkers and 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit Buffers/Drivers with 3-State Outputs Dual 8-Bit to 9-Bit Parity Bus Transceivers 20-Bit Bus-Interface D-Type Latches with 3-State Outputs 18-Bit Bus-Interface D-Type Latches with 3-State Outputs Dual 8-Bit to 9-Bit Parity Bus Transceivers 18-Bit Bus-Interface Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 25- Octal Bus Transceivers with 3-State Outputs 32-Bit Bus Transceivers with 3-State Outputs 16-Bit Tri-Port Universal Bus Exchangers 18-Bit Tri-Port Universal Bus Exchangers 32-Bit Universal Bus Transceivers with 3-State Outputs 32-Bit Registered Bus Transceivers with 3-State Outputs 16-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 16-Bit Bus Transceivers with Series Damping Resistors and 3-State Outputs 16-Bit Bus Transceivers with Series Damping Resistors and 3-State Outputs 12-Bit to 24-Bit Multiplexed D-Type Latches with Series Damping Resistors and 3-State Outputs 4-to-1 Multiplexed/Demultiplexed Registered Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCBS207 SCBS085 SCBS057 SCBS086 SCBS208 SCBS118 SCBS087 Call SCBS209 SCBS210 SCBS211 SCBS107 SCBS212 SCBS215 SCBS103 SCBS216 SCBS217 SCBS664 SCBS218 SCBS097 SCBS222 SCBS223 SCBS153 SCBS225 SCBS082 SCBS251 SCBS228 SCBS179 SCBS180 SCBS229 SCBS230 SCBS238 SCBS239 SCBS712 SCBS240 SCBS241 SCBS242 SCBS243 SCBS247
58

DEVICE SN74ABT162823A SN74ABT162825 SN74ABT162827A SN74ABT162841 NO. PINS 56 56 56 56 DESCRIPTION 18-Bit Bus-Interface Flip-Flops with 3-State Outputs 18-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 20-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 20-Bit Bus-Interface D-Type Latches with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCBS666 SCBS474 SCBS248 SCBS665
59
510
ABTE/ETL
Advanced BiCMOS Technology/ Enhanced Transceiver Logic
ABTE, with wide noise margin ETL logic levels on the A port, is backward compatible with existing LVTTL/TTL logic. ABTE devices support the ANSI/VITA 1-1994 specification (VME64) with tight tolerances for transition times and skew. ABTE is manufactured using the 0.8- BiCMOS process and provides A-port drive levels up to 90 mA for incident-wave switching. B-port features include bus-hold circuitry eliminating the need for external pullup resistors and 25- series output resistors to dampen signal reflections. Other features include a VCC BIAS pin and internal pullup resistors on control pins for live-insertion protection. The VMEbus International Trade Association (VITA) established a task group in 1997 to specify a synchronous protocol to double data transfer rates to 320 Mbytes/s or more. The new specification, 2eSST (double-edge source synchronous transfers), is based on the asynchronous 2eVME protocol. Sustained data rates of 1 Gbyte/s, more then ten times faster than traditional VME64 backplanes with single-edge signaling, are possible by taking advantage of 2eSSTs use of both edges of each VMEbus clock and the 21-slot VME320 star-configuration backplane. TI, in conjunction with VITA, is designing a device to support the 2eSST protocol. See www.ti.com/sc/logic for the most current data sheets and additional information on this new device.
511
ABTE/ETL
DEVICE SN74ABTE16245 SN74ABTE16246
NO. PINS 48 48
DESCRIPTION 16-Bit Incident-Wave-Switching Bus Transceivers with 3-State Outputs 11-Bit Incident-Wave-Switching Bus Transceivers with 3-State and Open-Collector Outputs
AVAILABILITY
MIL SSOP TSSOP
LITERATURE REFERENCE SCBS226 SCBS227
DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
512
AC/ACT
Advanced CMOS Logic
TI offers a full family of advanced CMOS logic with a wide range of AC/ACT devices for low-power and medium- to high-speed applications. Products acquired from Harris Semiconductor provide many additional functions. Over 160 AC and ACT device types are available, including gates, latches, flip-flops, buffers/drivers, counters, multiplexers, transceivers, and registered transceivers. The AC/ACT family is a reliable, low-power logic family with 24-mA output current drive at 5-V VCC (AC/ACT) and 12-mA output current drive 3.3-V VCC (AC only). The family includes standard end-pin products and center-pin VCC and ground-configuration products with output-edge control (OEC) circuitry. The OEC circuitry, available only with the center-pin products, helps reduce simultaneous switching noise associated with high-speed logic. The center-pin products include 16-, 18-, and 20-bit bus-interface functions packaged in 48- and 56-pin shrink small-outline package (SSOP) and thin shrink small-outline package (TSSOP). These packages allow the designer to double functionality in the same circuit board area or reduce the circuit board area by one-half. The AC family offers CMOS inputs and outputs while the ACT family offers TTL inputs with CMOS outputs. See www.ti.com/sc/logic for the most current data sheets.
513
DEVICE SELECTION GUIDE AC

DEVICE CD74AC00 SN74AC00 CD74AC02 CD74AC04 SN74AC04 CD74AC05 CD74AC08 SN74AC08 CD74AC10 SN74AC10 SN74AC11 CD74AC14 SN74AC14 CD74AC20 CD74AC32 SN74AC32 CD74AC74 SN74AC74 CD74AC86 SN74AC86 CD74AC109 CD74AC112 CD74AC138 CD74AC139 CD74AC151 CD74AC153 CD74AC157 CD74AC158 CD74AC161 CD74AC163 CD74AC164 CD74AC174 CD74AC175 CD74AC238 CD74AC240 NO. PINS 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 16 16 16 16 16 16 16 16 16 14 16 16 16 20 Quad 2-Input NAND Gates Quad 2-Input NAND Gates Quad 2-Input NOR Gates Hex Inverters Hex Inverters Hex Inverters with Open-Drain Outputs Quad 2-Input AND Gates Quad 2-Input AND Gates Triple 3-Input NAND Gates Triple 3-Input NAND Gates Triple 3-Input AND Gates Hex Schmitt-Trigger Inverters Hex Schmitt-Trigger Inverters Dual 4-Input NAND Gates Quad 2-Input OR Gates Quad 2-Input OR Gates Dual D-Type Flip-Flops with Set and Reset Dual D-Type Flip-Flops with Set and Reset Quad 2-Input Exclusive-OR Gates Quad 2-Input Exclusive-OR Gates Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters 8-Bit Serial-In, Parallel-Out Shift Registers Hex D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear 3-to-8 Line Decoders/Demultiplexers Octal Buffers/Drivers with 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP TSSOP
LITERATURE REFERENCE SCHS223 SCAS524 SCHS224 SCHS225 SCAS519 SCHS225 SCHS226 SCAS536 SCHS227 SCAS529 SCAS532 SCHS228 SCAS522 SCHS229 SCHS230 SCAS528 SCHS231 SCAS521 SCHS232 SCAS533 SCHS282 SCHS233 SCHS234 SCHS235 SCHS236 SCHS237 SCHS283 SCHS283 SCHS239 SCHS284 SCHS240 SCHS241 SCHS242 SCHS234 SCHS287

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
See Appendix A for package information on CD54/74AC devic
514

DEVICE SN74AC240 CD74AC241 SN74AC241 CD74AC244 SN74AC244 CD74AC245 SN74AC245 CD74AC251 CD74AC253 CD74AC257 CD74AC273 CD74AC280 CD74AC283 CD74AC299 CD74AC323 CD74AC373 SN74AC373 CD74AC374 SN74AC374 SN74AC533 CD74AC534 SN74AC534 CD74AC540 CD74AC541 CD74AC563 SN74AC563 SN74AC564 CD74AC573 SN74AC573 CD74AC574 SN74AC574 CD74AC623 CD74AC646 CD74AC652 74AC11000 74AC11004 74AC11008 74AC11011 74AC11032 74AC11074 74AC11086 74AC11138 74AC11175 74AC11240 NO. PINS 20 20 20 20 20 20 20 16 16 16 20 14 16 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 24 24 16 20 16 16 16 14 16 16 20 24 DESCRIPTION Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs 1-of-8 Data Selectors/Multiplexers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Octal D-Type Flip-Flops with Clear 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Binary Full Adders with Fast Carry 8-Bit Universal Shift/Storage Registers 8-Bit Universal Shift/Storage Registers Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Quad 2-Input NAND Gates Hex Inverters Quad 2-Input AND Gates Triple 3-Input AND Gates Quad 2-Input OR Gates Dual D-Type Flip-Flops with Set and Reset Quad 2-Input Exclusive-OR Gates 3-to-8 Line Inverting Decoders/Demultiplexers Quad D-Type Flip-Flops with Clear Octal Buffers/Drivers with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCAS512 SCHS287 SCAS513 SCHS244 SCAS514 SCHS245 SCAS461 SCHS246 SCHS247 SCHS248 SCHS249 SCHS250 SCHS251 SCHS288 SCHS288 SCHS289 SCAS540 SCHS290 SCAS543 SCAS555 SCHS290 SCAS554 SCHS285 SCHS285 SCHS291 SCAS552 SCAS551 SCHS291 SCAS542 SCHS292 SCAS541 SCHS286 SCHS293 SCHS294 SCLS054 SCHS033 SCAS014 SCHS029 SCAS007 SCAS499 SCAS081 SCAS042 SCAS090 SCAS448
515

DEVICE 74AC11244 74AC11245 74AC11257 74AC16244 74AC16245 74AC16373 74AC16374 74AC16652 NO. PINS 24 24 20 48 48 48 48 56 DESCRIPTION Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Output 16-Bit Bus Transceivers and Registers with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCAS171 SCAS010 SCAS049 SCAS120 SCAS235 SCAS121 SCAS123 SCAS242
516
DEVICE SELECTION GUIDE ACT

DEVICE CD74ACT00 SN74ACT00 CD74ACT02 CD74ACT04 SN74ACT04 CD74ACT05 CD74ACT08 SN74ACT08 CD74ACT10 SN74ACT10 SN74ACT11 CD74ACT14 SN74ACT14 CD74ACT20 CD74ACT32 SN74ACT32 CD74ACT74 SN74ACT74 CD74ACT86 SN74ACT86 CD74ACT109 CD74ACT112 CD74ACT138 CD74ACT139 CD74ACT151 CD74ACT153 CD74ACT157 CD74ACT158 CD74ACT161 CD74ACT163 CD74ACT164 CD74ACT174 CD74ACT175 CD74ACT238 CD74ACT240 NO. PINS 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 16 16 16 16 16 16 16 16 16 14 16 16 16 20 Quad 2-Input NAND Gates Quad 2-Input NAND Gates Quad 2-Input NOR Gates Hex Inverters Hex Inverters Hex Inverters with Open-Drain Outputs Quad 2-Input AND Gates Quad 2-Input AND Gates Triple 3-Input NAND Gates Triple 3-Input NAND Gates Triple 3-Input AND Gates Hex Schmitt-Trigger Inverters Hex Schmitt-Trigger Inverters Dual 4-Input NAND Gates Quad 2-Input OR Gates Quad 2-Input OR Gates Dual D-Type Flip-Flops with Set and Reset Dual D-Type Flip-Flops with Set and Reset Quad 2-Input Exclusive-OR Gates Quad 2-Input Exclusive-OR Gates Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters 8-Bit Serial-In, Parallel-Out Shift Registers Hex D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear 3-to-8 Line Decoders/Demultiplexers Octal Buffers/Drivers with 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCHS223 SCAS523 SCHS224 SCHS225 SCAS518 SCHS225 SCHS226 SCAS535 SCHS227 SCAS526 SCAS531 SCHS228 SCAS557 SCHS229 SCHS230 SCAS530 SCHS231 SCAS520 SCHS232 SCAS534 SCHS233 SCHS233 SCHS234 SCHS235 SCHS236 SCHS237 SCHS238 SCHS238 SCHS284 SCHS284 SCHS240 SCHS241 SCHS242 SCHS234 SCHS244

LFBGA (low-profile fine-pitch ball grid array)
GKE = 96 pins GKF = 114 pins
PDIP (plastic dual-in-line package)

SOIC (small-outline integrated circuit) D = 8/14/16 pins DW = 16/20/24/28 pins QSOP (quarter-size outline package) DBQ = 16/20/24 pins SSOP (shrink small-outline package)

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins

FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
See Appendix A for package information on CD54/74ACT devices.
517

DEVICE SN74ACT240 CD74ACT241 SN74ACT241 CD74ACT244 SN74ACT244 CD74ACT245 SN74ACT245 CD74ACT253 CD74ACT257 CD74ACT258 CD74ACT273 CD74ACT280 CD74ACT283 CD74ACT297 CD74ACT299 CD74ACT373 SN74ACT373 CD74ACT374 SN74ACT374 SN74ACT533 SN74ACT534 CD74ACT540 CD74ACT541 SN74ACT563 SN74ACT564 CD74ACT573 SN74ACT573 CD74ACT574 SN74ACT574 CD74ACT623 CD74ACT646 CD74ACT651 CD74ACT652 SN74ACT1071 SN74ACT1073 SN74ACT1284 74ACT11000 74ACT11004 74ACT11008 74ACT11030 74ACT11032 74ACT11074 74ACT11139 74ACT11240 NO. PINS 20 20 20 20 20 20 20 16 16 16 20 14 16 16 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 24 24 24 14 20 20 16 20 16 14 16 14 16 24 DESCRIPTION Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Octal D-Type Flip-Flops with Clear 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Binary Full Adders with Fast Carry Digital Phase-Locked Loops 8-Bit Universal Shift/Storage Registers Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs 10-Bit Bus Termination Networks with Bus Hold 16-Bit Bus Termination Networks with Bus Hold 7-Bit Bus-Interfaces with 3-State Outputs Quad 2-Input NAND Gates Hex Inverters Quad 2-Input AND Gates 8-Input NAND Gates Quad 2-Input OR Gates Dual D-Type Flip-Flops with Set and Reset Dual 2-to-4 Line Decoders/Demultiplexers Octal Buffers/Drivers with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCAS515 SCHS287 SCAS516 SCHS287 SCAS517 SCHS245 SCAS452 SCHS247 SCHS248 SCHS248 SCHS249 SCHS250 SCHS251 SCHS297 SCHS288 SCHS289 SCAS544 SCHS290 SCAS539 SCAS553 SCAS556 SCHS285 SCHS285 SCAS550 SCAS549 SCHS291 SCAS538 SCHS292 SCAS537 SCHS286 SCHS293 SCHS294 SCHS294 SCAS192 SCAS193 SCAS459 SCAS002 SCAS215 SCAS013 SCLS050 SCAS008 SCAS498 SCAS175 SCAS210
518

DEVICE 74ACT11244 74ACT11245 74ACT11257 74ACT11286 74ACT11373 74ACT11374 74ACT11543 74ACT11652 74ACT16240 74ACT16244 74ACT16245 74ACT16373 74ACT16374 74ACT16541 74ACT16543 74ACT16623 74ACT16646 74ACT16651 74ACT16652 74ACT16657 74ACT16823 74ACT16825 74ACT16827 74ACT16841 74ACT16861 74ACT16863 74ACT16952 NO. PINS 24 24 20 14 24 24 28 28 48 48 48 48 48 48 56 48 56 56 56 56 56 56 56 56 56 56 56 DESCRIPTION Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs 9-Bit Parity Generators/Checkers with Bus-Driver Parity I/O Port Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Output 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Transceivers with Parity Generators/Checkers and 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit Buffers/Drivers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Bus Interface D-Type Latches with 3-State Outputs 20-Bit Bus Transceivers with 3-State Outputs 18-Bit Bus Interface Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCAS006 SCAS031 SCAS053 SCAS069 SCAS015 SCAS217 SCAS136 SCAS087 SCAS137 SCAS116 SCAS097 SCAS122 SCAS124 SCAS208 SCAS126 SCAS152 SCAS127 SCAS449 SCAS128 SCAS164 SCAS160 SCAS155 SCAS163 SCAS174 SCAS197 SCAS162 SCAS159
519
520
AHC/AHCT
Advanced High Speed CMOS Logic
The AHC/AHCT logic family provides a natural migration path for HCMOS users who need more speed in low-power, low-noise, and low-drive applications. The AHC logic family consists of basic gates, octals, and 16-bit Widebus functions fabricated using the EPIC1-S process, which produces high performance at low cost. TI also offers single-gate solutions, designated with 1G in the device name. Performance characteristics of the AHC family are:
Speed Typical propagation delays of 5.2 ns (octals), about three times faster than HC devices. AHC devices are the quick and quiet solution at 5-V VCC for higher-speed operation. Low noise The AHC family allows designers to combine the low-noise characteristics of HCMOS devices with todays performance levels, without the overshoot and undershoot problems typical of higher-drive devices required to get AHC speeds. Low power The AHC family CMOS technology exhibits low power consumption (40-mA max static current, one-half that of HCMOS). Drive Output-drive current is 8 mA at 5-V VCC (AHC/AHCT) and 4 mA at 3.3-V VCC (AHC only). The AHC family offers CMOS inputs and outputs, while the AHCT family offers TTL inputs with CMOS outputs. Packaging AHC devices are available in small-outline integrated circuit (SOIC), shrink small-outline package (SSOP), plastic dual in-line package (PDIP), thin shrink small-outline package (TSSOP), thin very small-outline package (TVSOP), and 5-pin small-outline transistor (SOT) package. Selected AHC devices are available in military versions (SN54AHCXX).
Using TI products offers several business advantages:
Competitive advantage AHC and competitors VHC devices have equivalent specifications; therefore, AHC devices are drop-in replacements offering alternte sources. With TIs production capacity, delivery performance, and competitive prices, AHC devices are among the most economical, easy-to-use, and easy-to-get logic products.
See www.ti.com/sc/logic for the most current data sheets.
521
DEVICE SELECTION GUIDE AHC

DEVICE SN74AHC1G00 SN74AHC1G02 SN74AHC1G04 SN74AHC1GU04 SN74AHC1G08 SN74AHC1G14 SN74AHC1G32 SN74AHC1G86 SN74AHC1G125 SN74AHC1G126 SN74AHC00 SN74AHC02 SN74AHC04 SN74AHCU04 SN74AHC05 SN74AHC08 SN74AHC14 SN74AHC32 SN74AHC74 SN74AHC86 SN74AHC123A SN74AHC125 SN74AHC126 SN74AHC132 SN74AHC138 SN74AHC139 SN74AHC157 SN74AHC158 SN74AHC240 SN74AHC244 SN74AHC245 SN74AHC273 SN74AHC367 SN74AHC373 SN74AHC374 NO. PINS 5 5 5 5 5 5 5 5 5 5 14 14 14 14 14 14 14 14 14 14 16 14 14 14 16 16 16 16 20 20 20 20 16 20 20 DESCRIPTION Single 2-Input NAND Gates Single-2-Input NOR Gates Single Inverters Single Inverters Single 2-Input AND Gates Single Schmitt-Trigger Inverters Single 2-Input OR Gates Single 2-Input Exclusive-OR Gates Single Bus Buffers with 3-State Outputs Single Bus Buffers with 3-State Outputs Quad 2-Input NAND Gates Quad 2-Input NOR Gates Hex Inverters Hex Unbuffered Inverters Hex Inverters with Open-Drain Outputs Quad 2-Input AND Gates Hex Schmitt-Trigger Inverters Quad 2-Input OR Gates Dual D-Type Flip-Flops with Set and Reset Quad 2-Input Exclusive-OR Gates Dual Retriggerable Monostable Multivibrators with Reset Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Quad 2-Input NAND Gates with Schmitt-Trigger Inputs 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal D-Type Flip-Flops with Clear Hex Buffers/Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs AVAILABILITY
MIL PDIP SOIC SOT SSOP TSSOP TVSOP
LITERATURE REFERENCE SCLS313 SCLS342 SCLS318 SCLS343 SCLS314 SCLS321 SCLS317 SCLS323 SCLS377 SCLS379 SCLS227 SCLS254 SCLS231 SCLS234 SCLS357 SCLS236 SCLS238 SCLS247 SCLS255 SCLS249 SCLS352 SCLS256 SCLS257 SCLS365 SCLS258 SCLS259 SCLS345 SCLS346 SCLS251 SCLS226 SCLS230 SCLS376 SCLS424 SCLS235 SCLS240

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
522
DEVICE SELECTION GUIDE AHC

DEVICE SN74AHC540 SN74AHC541 SN74AHC573 SN74AHC574 SN74AHC594 SN74AHC595 SN74AHC16240 SN74AHC16244 SN74AHC16373 SN74AHC16374 SN74AHC16540 SN74AHC16541 NO. PINS 20 20 20 20 16 16 48 48 48 48 48 48 DESCRIPTION Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 8-Bit Shift Registers with Output Registers 8-Bit Shift Registers with 3-State Output Registers 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCLS260 SCLS261 SCLS242 SCLS244 SCLS423 SCLS373 SCLS326 SCLS327 SCLS329 SCLS330 SCLS331 SCLS332
523
DEVICE SELECTION GUIDE AHCT

DEVICE SN74AHCT1G00 SN74AHCT1G02 SN74AHCT1G04 SN74AHCT1G08 SN74AHCT1G14 SN74AHCT1G32 SN74AHCT1G86 SN74AHCT1G125 SN74AHCT1G126 SN74AHCT00 SN74AHCT02 SN74AHCT04 SN74AHCT08 SN74AHCT14 SN74AHCT32 SN74AHCT74 SN74AHCT86 SN74AHCT123A SN74AHCT125 SN74AHCT126 SN74AHCT132 SN74AHCT138 SN74AHCT139 SN74AHCT157 SN74AHCT158 SN74AHCT240 SN74AHCT244 SN74AHCT245 SN74AHCT273 SN74AHCT367 SN74AHCT373 SN74AHCT374 SN74AHCT540 SN74AHCT541 SN74AHCT573 NO. PINS 5 5 5 5 5 5 5 5 5 14 14 14 14 14 14 14 14 16 14 14 14 16 16 16 16 20 20 20 20 16 20 20 20 20 20 DESCRIPTION Single 2-Input NAND Gates Single-2-Input NOR Gates Single Inverters Single 2-Input AND Gates Single Schmitt-Trigger Inverters Single 2-Input OR Gates Single 2-Input Exclusive-OR Gates Single Bus Buffers with 3-State Outputs Single Bus Buffers with 3-State Outputs Quad 2-Input NAND Gates Quad 2-Input NOR Gates Hex Inverters Quad 2-Input AND Gates Hex Schmitt-Trigger Inverters Quad 2-Input OR Gates Dual D-Type Flip-Flops with Set and Reset Quad 2-Input Exclusive-OR Gates Dual Retriggerable Monostable Multivibrators with Reset Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Quad 2-Input NAND Gates with Schmitt-Trigger Inputs 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal D-Type Flip-Flops with Clear Hex Buffers/Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCLS316 SCLS341 SCLS319 SCLS315 SCLS322 SCLS320 SCLS324 SCLS378 SCLS380 SCLS229 SCLS262 SCLS232 SCLS237 SCLS246 SCLS248 SCLS263 SCLS250 SCLS420 SCLS264 SCLS265 SCLS366 SCLS266 SCLS267 SCLS347 SCLS348 SCLS252 SCLS228 SCLS233 SCLS375 SCLS418 SCLS139 SCLS241 SCLS268 SCLS269 SCLS243

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
524

DEVICE SN74AHCT574 SN74AHCT594 SN74AHCT595 SN74AHCT16240 SN74AHCT16244 SN74AHCT16245 SN74AHCT16373 SN74AHCT16374 SN74AHCT16540 SN74AHCT16541 NO. PINS 20 16 16 48 48 48 48 48 48 48 DESCRIPTION Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 8-Bit Shift Registers with Output Registers 8-Bit Shift Registers with 3-State Output Registers 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCLS245 SCLS417 SCLS374 SCLS333 SCLS334 SCLS335 SCLS336 SCLS337 SCLS338 SCLS339
525
526
ALB
Advanced Low Voltage BiCMOS Logic

The specially designed 3.3-V ALB family uses 0.6- BiCMOS process technology for bus-interface functions. ALB provides 25-mA drive at 3.3 V with maximum propagation delays of 2.2 ns, making it one of TIs fastest logic families. The inputs have clamping diodes to limit overshoot and undershoot. The ALB family currently is available in two functions with Widebus and Shrink Widebus footprints, with advanced packaging options such as shrink small-outline package (SSOP), thin shrink small-outline package (TSSOP), and thin very small-outline package (TVSOP). See www.ti.com/sc/logic for the most current data sheets.
527
DEVICE SELECTION GUIDE ALB

DEVICE SN74ALB16244 SN74ALB16245 NO. PINS 48 48 DESCRIPTION 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs AVAILABILITY
SSOP TSSOP TVSOP
LITERATURE REFERENCE SCBS647 SCBS678

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
528
ALS
Advanced Low Power Schottky Logic

The ALS family provides over 130 bipolar logic functions. This family, combined with the AS family, can be used to optimize systems through performance budgeting. By using AS in speed-critical paths and ALS where speed is less critical, designers can optimize speed and power performance in bipolar designs. The ALS family includes gates, flip-flops, counters, drivers, transceivers, registered transceivers, readback latches, clock drivers, register files, and multiplexers. See www.ti.com/sc/logic for the most current data sheets.
529
DEVICE SELECTION GUIDE ALS

DEVICE SN74ALS00A SN74ALS02A SN74ALS03B SN74ALS04B SN74ALS05A SN74ALS08 SN74ALS09 SN74ALS10A SN74ALS11A SN74ALS20A SN74ALS21A SN74ALS27A SN74ALS30A SN74ALS32 SN74ALS33A SN74ALS35A SN74ALS37A SN74ALS38B SN74ALS74A SN74ALS86 SN74ALS109A SN74ALS112A SN74ALS133 SN74ALS137A SN74ALS138A SN74ALS139 SN74ALS151 SN74ALS153 SN74ALS156 SN74ALS157A SN74ALS158 SN74ALS161B SN74ALS163B SN74ALS164A SN74ALS165 NO. PINS 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 16 16 16 16 16 16 16 16 16 16 16 16 14 16 Quad 2-Input NAND Gates Quad 2-Input NOR Gates Quad 2-Input NAND Gates with Open-Collector Outputs Hex Inverters Hex Inverters with Open-Collector Outputs Quad 2-Input AND Gates Quad 2-Input AND Gates with Open-Collector Outputs Triple 3-Input NAND Gates Triple 3-Input AND Gates Dual 4-Input NAND Gates Dual 4-Input AND Gates Triple 3-Input NOR Gates 8-Input NAND Gates Quad 2-Input OR Gates Quad 2-Input NOR Gates Hex Non-Inverters with Open-Collector Outputs Quad 2-Input NAND Gates Quad 2-Input NAND Gates Dual D-Type Flip-Flops with Set and Reset Quad 2-Input Exclusive-OR Gate Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset 13-Input NAND Gates 3-to-8 Line Decoders/Demultiplexers with Address Latches 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Dual 2-to-4 Line Decoders/Demultiplexers with Open-Collector Outputs Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters 8-Bit Serial-In, Parallel-Out Shift Registers 8-Bit Parallel-In, Serial-Out Shift Registers DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDAS187 SDAS111 SDAS013 SDAS063 SDAS190 SDAS191 SDAS084 SDAS002 SDAS009 SDAS192 SDAS085 SDAS112 SDAS010 SDAS113 SDAS034 SDAS011 SDAS195 SDAS196 SDAS143 SDAS006 SDAS198 SDAS199 SDAS202 SDAS203 SDAS055 SDAS204 SDAS205 SDAS206 SDAS099 SDAS081 SDAS081 SDAS024 SDAS024 SDAS159 SDAS157

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
530

DEVICE SN74ALS166 SN74ALS169B SN74ALS174 SN74ALS175 SN74ALS191A SN54ALS193 SN74ALS193A SN74ALS240A SN74ALS240A-1 SN74ALS241C SN74ALS243A SN74ALS244B SN74ALS244C SN74ALS244C-1 SN74ALS245A SN74ALS245A-1 SN74ALS251 SN74ALS253 SN74ALS257 SN74ALS257A SN74ALS258 SN74ALS258A SN74ALS259 SN74ALS273 SN74ALS280 SN74ALS299 SN74ALS323 SN74ALS373 SN74ALS373A SN74ALS374A SN74ALS518 SN74ALS520 SN74ALS521 SN74ALS533A SN74ALS534A SN74ALS540 SN74ALS540-1 SN74ALS541 SN74ALS541-1 SN74ALS561A SN74ALS563B SN74ALS564B SN74ALS569A SN74ALS573C NO. PINS 16 16 16 16 16 16 16 20 20 20 14 20 20 20 20 20 16 16 16 16 16 16 16 20 14 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 8-Bit Parallel-Load Shift Registers Synchronous 4-Bit Up/Down Binary Counters Hex D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear Presettable Synchronous 4-Bit Up/Down Binary Counters Presettable Synchronous 4-Bit Up/Down Binary Counters Presettable Synchronous 4-Bit Up/Down Binary Counters Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Quad Bus-Transceivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs 1-of-8 Data Selectors/Multiplexers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs 8-Bit Addressable Latches Octal D-Type Flip-Flops with Clear 9-Bit Odd/Even Parity Generators/Checkers 8-Bit Universal Shift/Storage Registers 8-Bit Universal Shift/Storage Registers Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 8-Bit Identity Comparators (P = Q) with Open-Collector Outputs and Input Pullup Resistors 8-Bit Identity Comparators (P = Q) with Input Pullup Resistors 8-Bit Identity Comparators (P = Q) Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Synchronous 4-Bit Binary Counter with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDAS156 SDAS125 SDAS207 SDAS207 SDAS210 Call SDAS211 SDAS214 SDAS214 SDAS153 SDAS069 Call SDAS142 SDAS142 SDAS272 SDAS272 SDAS215 SDAS216 SDAS124 SDAS124 SDAS124 SDAS124 SDAS217 SDAS218 SDAS038 SDAS220 SDAS267 SDAS083 SDAS083 SDAS167 SDAS224 SDAS224 SDAS224 SDAS270 SDAS168 SDAS025 SDAS025 SDAS025 SDAS025 SDAS225 SDAS163 SDAS164 SDAS229 SDAS048
531

DEVICE SN74ALS574B SN74ALS575A SN74ALS576B SN74ALS577A SN74ALS580B SN74ALS620A SN74ALS621A SN74ALS621A-1 SN74ALS623A SN74ALS638A SN74ALS638A-1 SN74ALS639A SN74ALS640B SN74ALS640B-1 SN74ALS641A SN74ALS641A-1 SN74ALS642A SN74ALS642A-1 SN74ALS645A SN74ALS645A-1 SN74ALS646A SN74ALS646A-1 SN74ALS648A SN74ALS651A SN74ALS651A-1 SN74ALS652 SN74ALS652A SN74ALS652A-1 SN74ALS653 SN74ALS654 SN74ALS666 SN74ALS667 SN74ALS679 SN74ALS688 SN74ALS746 SN74ALS760 SN74ALS804A SN74ALS805A SN74ALS832A SN74ALS841 SN74ALS843 SN74ALS845 SN74ALS857 SN74ALS867A NO. PINS 20 24 20 24 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 24 24 24 24 24 24 24 24 24 24 24 24 20 20 20 20 20 20 20 24 24 24 24 24 DESCRIPTION Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal D-Type Transparent Latches with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with Open-Collector and 3-State Outputs Octal Bus Transceivers and Registers with Open-Collector and 3-State Outputs 8-Bit D-Type Transparent Read-Back Latches with 3-State Outputs 8-Bit D-Type Transparent Read-Back Latches with 3-State Outputs 12-Bit Address Comparators 8-Bit Magnitude Comparators Octal Buffers and Line Drivers with Input Pullup Resistors and 3-State Outputs Octal Buffers and Line Drivers with Open-Collector Outputs Hex 2-Input NAND Drivers Hex 2-Input NOR Drivers Hex 2-Input OR Drivers 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 9-Bit Bus-Interface D-Type Latches with 3-State Outputs 8-Bit Bus-Interface D-Type Latches with 3-State Outputs Hex 2-to-1 Universal Multiplexers with 3-State Outputs Synchronous 8-Bit Up/Down Counters AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDAS165 SDAS165 SDAS065 SDAS065 SDAS277 SDAS226 SDAS226 SDAS226 SDAS226 SDAS123 SDAS123 SDAS123 SDAS122 SDAS122 SDAS300 SDAS300 SDAS300 SDAS300 SDAS278 SDAS278 SDAS039 SDAS039 SDAS039 SDAS066 SDAS066 SDAS066 SDAS066 SDAS066 SDAS066 SDAS066 SDAS227 SDAS227 SDAS003 SDAS228 SDAS052 SDAS141 SDAS022 SDAS023 SDAS017 SDAS059 SDAS232 SDAS233 SDAS170 SDAS115
532

DEVICE SN74ALS869 SN74ALS870 SN74ALS873B SN74ALS874B SN74ALS876A SN74ALS990 SN74ALS992 SN74ALS994 SN74ALS996 SN74ALS996-1 SN74ALS1004 SN74ALS1005 SN74ALS1034 SN74ALS1035 SN74ALS1244A SN74ALS1245A SN74ALS1640A SN74ALS1645A SN74ALS2240 SN74ALS2541 SN74ALS29821 SN74ALS29823 SN74ALS29827 SN74ALS29828 SN74ALS29833 SN74ALS29841 SN74ALS29854 SN74ALS29863 NO. PINS 24 24 24 24 24 20 24 24 24 24 14 14 14 14 20 20 20 20 20 20 24 24 24 24 24 24 24 24 Synchronous 8-Bit Up/Down Counters Dual 16-by-4 Register Files Dual 4-Bit D-Type Latches with 3-State Outputs Dual 4-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs Dual 4-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 8-Bit D-Type Transparent Read-Back Latches 9-Bit D-Type Transparent Read-Back Latches with 3-State Outputs 10-Bit D-Type Transparent Read-Back Latches 8-Bit Edge-Triggered Read-Back Latches 8-Bit Edge-Triggered Read-Back Latches Hex Inverting Drivers Hex Inverting Buffers with Open-Collector Outputs Hex Drivers Hex Non-Inverting Buffers with Open-Collector Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Buffers and Line/MOS Drivers with 3-State Outputs and Series Damping Resistors Octal Line Driver/MOS Drivers with 3-State Outputs 10-Bit Bus Interface Flip-Flops with 3-State Outputs 9-Bit Bus Interface Flip-Flops with 3-State Outputs 10-Bit Buffers/Drivers with 3-State Outputs 10-Bit Buffers/Drivers with 3-State Outputs 8-Bit to 9-Bit Parity Bus Transceivers 10-Bit D-Type Bus-Interface Latches with 3-State Outputs 8-Bit to 9-Bit Parity Bus Transceivers 9-Bit Bus Transceivers with 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDAS115 SDAS139 SDAS036 SDAS061 SDAS061 SDAS027 SDAS028 SDAS237 SDAS098 SDAS098 SDAS074 SDAS240 SDAS053 SDAS243 SDAS186 SDAS245 SDAS246 SDAS246 SDAS268 SDAS273 SDAS145 SDAS146 SDAS095 SDAS095 SDAS119 SDAS149 SDAS118 SDAS096
533
534
ALVC
Advanced Low Voltage CMOS Technology Logic

One of the highest-performance 3.3-V bus-interface families is the ALVC family. These specially designed 3-V products are processed in 0.6- CMOS technology, with typical propagation delays of less than 3 ns, current drive of 24 mA, and static current of 40 A for bus-interface functions. ALVC devices have input bus-hold cells to eliminate the need for external pullup resistors for floating inputs. With over 90 Widebus and Widebus+ devices with series damping resistors and gates and octals on the roadmap, ALVC quickly is becoming the industry standard for many 3.3-V logic applications. The family also features innovative functions that make it ideal for memory interleaving, multiplexing, and interfacing to SDRAMs. Selected devices in the ALVC family are offered in Widebus footprints with all of the advanced packaging, such as shrink small-outline package (SSOP) and thin shrink small-outline package (TSSOP). Selected ALVC devices are offered in the MicroStar BGA (LFBGA) package. Other devices are offered in the small-outline integrated circuit (SOIC) package, SSOP, TSSOP, and thin very small-outline package (TVSOP). See www.ti.com/sc/logic for the most current data sheets.
535
DEVICE SELECTION GUIDE ALVC

DEVICE Gates and Octals SN74ALVC00 SN74ALVC04 SN74ALVC08 SN74ALVC10 SN74ALVC14 SN74ALVC32 SN74ALVC125 SN74ALVC126 SN74ALVC244 SN74ALVCH244 SN74ALVC245 SN74ALVCH245 SN74ALVCH373 SN74ALVCH374 Widebus Devices SN74ALVCH16240 SN74ALVC16244A SN74ALVCH16244 SN74ALVCH16245 SN74ALVCHR16245 SN74ALVCH16260 SN74ALVCH16269 SN74ALVCHR16269A SN74ALVCH16270 SN74ALVCH16271 SN74ALVCH16282 SN74ALVC16334 SN74ALVCH16334 SN74ALVCH16344 SN74ALVCH16373 SN74ALVCH16374 SN74ALVCH16409 SN74ALVCHR16409 SN74ALVCH16500 48 48 48 48 48 56 56 56 56 56 80 48 48 56 48 48 56 56 56 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 12-Bit to 24-Bit Multiplexed D-Type Latches with 3-State Outputs 12-Bit to 24-Bit Registered Bus Exchangers with 3-State Outputs 12-Bit to 24-Bit Registered Bus Exchangers with 3-State Outputs 12-Bit to 24-Bit Registered Bus Exchangers with 3-State Outputs 12-Bit to 24-Bit Multiplexed Bus Exchangers with 3-State Outputs 18-Bit to 36-Bit Registered Bus Exchangers with 3-State Outputs 16-Bit Universal Bus Drivers with 3-State Outputs 16-Bit Universal Bus Drivers with 3-State Outputs 1-Bit to 4-Bit Address Drivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Output 9-Bit 4-Port Universal Bus Exchangers with 3-State Outputs 9-Bit 4-Port Universal Bus Exchangers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs SCES045 SCAS250 SCES014 SCAS015 SCES064 SCES046 SCES019 SCES050 SCES028 SCES017 SCES036 SCES128 SCES090 SCES054 SCES020 SCES021 SCES022 SCES056 SCES023 14 14 14 14 14 14 14 14 20 20 20 20 20 20 Quad 2-Input NAND Gates Hex Inverters Quad 2-Input AND Gates Triple 3-Input NAND Gates Hex Schmitt-Trigger Inverters Quad 2-Input OR Gates Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs SCES115 SCES117 SCES101 SCES106 SCES107 SCES108 SCES110 SCES111 SCES188 SCES112 SCES271 SCES119 SCES116 SCES118 NO. PINS DESCRIPTION AVAILABILITY
LFBGA PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
536

DEVICE SN74ALVCH16501 SN74ALVCH16524 SN74ALVCH16525 SN74ALVCH16543 SN74ALVCH16600 SN74ALVCH16601 SN74ALVCHR16601 SN74ALVCH16646 SN74ALVCH16721 SN74ALVCH16820 SN74ALVCH16821 SN74ALVCH16823 SN74ALVCH16825 SN74ALVCH16827 SN74ALVCH16831 SN74ALVCH16832 SN74ALVC16834 SN74ALVC16835 SN74ALVCH16835 SN74ALVCH16841 SN74ALVCH16863 SN74ALVCH16901 SN74ALVCH16903 SN74ALVCH16952 Widebus+ Devices SN74ALVCH32244 SN74ALVCH32245 SN74ALVCH32374 SN74ALVCH32501 96 96 96 114 32-Bit Buffers/Drivers with 3-State Outputs 32-Bit Bus Transceivers with 3-State Outputs 32-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 32-Bit Universal Bus Transceivers with 3-State Outputs SCES281 SCES282 SCES283 SCES144 NO. PINS 56 56 56 56 56 56 56 56 56 56 56 56 56 56 80 64 56 56 56 56 56 64 56 56 DESCRIPTION 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Registered Bus Transceivers with 3-State Outputs 18-Bit Registered Bus Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 10-Bit D-Type Flip-Flops with Dual Outputs and 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit Buffers/Drivers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 1-to-4 Address Registers/Drivers with 3-State Outputs 1-to-4 Address Registers/Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 20-Bit Bus-Interface D-Type Latches with 3-State Outputs 18-Bit Bus-Interface Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with Parity Generators/Checkers 12-Bit Universal Bus Drivers with Parity Checker and Dual 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCES024 SCES080 SCES059 SCES025 SCES030 SCES027 SCES123 SCES032 SCES052 SCES035 SCES037 SCES038 SCES039 SCES041 SCES083 SCES098 SCES140 SCES125 SCES053 SCES043 SCES060 SCES010 SCES095 SCES011
537

DEVICE NO. PINS DESCRIPTION AVAILABILITY
Widebus Devices With Series Damping Resistors SN74ALVCH162244 SN74ALVCH162260 SN74ALVCH162268 SN74ALVCHG162280 SN74ALVCHG162282 SN74ALVC162334 SN74ALVCH162334 SN74ALVCH162344 SN74ALVCH162374 SN74ALVCH162409 SN74ALVCH162525 SN74ALVCH162601 SN74ALVCH162721 SN74ALVCH162820 SN74ALVCH162827 SN74ALVCH162830 SN74ALVCHS162830 SN74ALVC162831 SN74ALVCH162831 SN74ALVCH162832 SN74ALVC162834 SN74ALVC162835 SN74ALVCH162835 SN74ALVC162836 SN74ALVCH162836 SN74ALVCH162841 48 56 56 80 80 48 48 56 48 56 56 56 56 56 56 80 80 80 80 64 56 56 56 56 56 56 16-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 12-Bit to 24-Bit Multiplexed D-Type Latches with Series Damping Resistors and 3-State Outputs 12-Bit to 24-Bit Registered Bus Exchangers with 3-State Outputs 16-Bit to 32-Bit Bus Exchangers with Byte Masks and 3-State Outputs 18-Bit to 36-Bit Registered Bus Exchangers with 3-State Outputs 16-Bit Universal Bus Drivers with 3-State Outputs 16-Bit Universal Bus Drivers with 3-State Outputs 1-Bit to 4-Bit Address Drivers with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 9-Bit 4-Port Universal Bus Exchangers with 3-State Outputs 18-Bit Registered Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 20-Bit Flip-Flops with 3-State Outputs 10-Bit Flip-Flops with Dual Outputs and 3-State Outputs 20-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 1-Bit to 2-Bit Address Drivers with 3-State Outputs 1-Bit to 2-Bit Address Drivers with 3-State Outputs 1-Bit to 4-Bit Address Registors/Drivers with 3-State Outputs 1-Bit to 4-Bit Address Registers/Drivers with 3-State Outputs 1-Bit to 4-Bit Address Registers/Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 20-Bit Universal Bus Drivers with 3-State Outputs 20-Bit Universal Bus Drivers with 3-State Outputs 20-Bit Bus-Interface D-Type Latches with 3-State Outputs SCES065 SCES570 SCES018 SCES093 SCES094 SCES127 SCES120 SCES085 SCES092 SCES189 SCES058 SCES026 SCES055 SCES012 SCES013 SCES082 SCES097 SCES605 SCES084 SCES588 SCES172 SCES126 SCES121 SCES129 SCES122 SCES088
Widebus Devices With Level Shifter SN74ALVC164245 48 16-Bit 3.3-V to-5-V Level-Shifting Transceivers with 3-State Outputs SCES416
538
ALVT
Advanced Low Voltage BiCMOS Technology Logic

ALVT is a 5-V tolerant, 3.3-V and 2.5-V product using 0.6- BiCMOS technology for advanced bus-interface functions. ALVT provides superior performance, up to 28% speed improvement compared to similar LVT at 3.3 V, current drive of 64 mA, and pin-for-pin compatibility with existing ABT and LVT families. ALVT operates at LVTTL signal levels in telecom and networking high-performance system point-to-point or distributed-load backplane applications. ALVT is an excellent migration path from ABT or LVT. Performance characteristics of the ALVT family include:
3.3-V or 2.5-V operation with 5-V tolerant I/O capability for use in a mixed-voltage environment Speed Provides high performance with up to 28% speed improvement over LVT. Drive Provides up to 64 mA of drive at 3.3-V VCC and 24 mA at 2.5-V VCC, yet consumes less than 330 W of standby power.
Additional features include:
Live insertion ALVT devices incorporate Ioff and power-up 3-state (PU3S) circuitry to protect the devices in live-insertion applications and make them ideally suited for hot-insertion applications. Ioff prevents the devices from being damaged during partial power down, and PU3S forces the outputs to the high-impedance state during power up and power down. Bus hold Eliminates floating inputs by holding them at the last valid logic state, eliminating the need for external pullup and pulldown resistors. Damping-resistor option TI implements series damping resistors on selected devices, reducing overshoot and undershoot, matching line impedance, and minimizing ringing. Packaging ALVT devices are available in shrink small-outline package (SSOP), thin shrink small-outline package (TSSOP), and thin very small-outline package (TVSOP), with selected devices offered in MicroStar BGA (LFBGA) packages.
539
DEVICE SELECTION GUIDE ALVT

DEVICE SN74ALVTH16240 SN74ALVTH16244 SN74ALVTH16245 SN74ALVTHR16245 SN74ALVTH16260 SN74ALVTH16373 SN74ALVTH16374 SN74ALVTH16500 SN74ALVTH16501 SN74ALVTH16543 SN74ALVTH16601 SN74ALVTH16646 SN74ALVTH16652 SN74ALVTH16721 SN74ALVTH16821 SN74ALVTH16827 SN74ALVTH16841 SN74ALVTH32244 SN74ALVTH32373 SN74ALVTH32374 SN74ALVTH162244 SN74ALVTH162245 SN74ALVTH162827 NO. PINS 48 48 48 48 56 48 48 56 56 56 56 56 56 56 56 56 56 96 96 96 48 48 56 DESCRIPTION 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with I/O Series Damping Resistors and 3-State Outputs 12-Bit to 24-Bit Multiplexed D-Type Latches with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Bus Interface D-Type Latches with 3-State Outputs 32-Bit Buffers/Drivers with 3-State Outputs 32-Bit Transparent D-Type Latches with 3-State Outputs 32-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 16-Bit Bus Transceivers with Series Damping Resistors and 3-State Outputs 20-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' AVAILABILITY
LFBGA SSOP TSSOP TVSOP
LITERATURE REFERENCE SCES138 SCES070 SCES066 Call SCES332 SCES067 SCES068 SCES069 SCES071 SCES073 SCES143 SCES072 SCES192 SCES139 SCES078 SCES076 SCES077 SCES279 SCES322 SCES280 SCES074 SCES331 SCES079

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
540
AS
Advanced Schottky Logic

The AS family of high-performance bipolar logic includes over 90 functions that offer high drive capabilities. This family, combined with the ALS family, can be used to optimize system speed and power through performance budgeting where BiCMOS logic is used. By using AS in speed-critical paths and ALS where speed is less critical, designers can optimize speed and power performance. The AS family includes gates, flip-flops, counters, drivers, transceivers, registered transceivers, readback latches, clock drivers, register files, and multiplexers. See www.ti.com/sc/logic for the most current data sheets.
541
DEVICE SELECTION GUIDE AS

DEVICE SN74AS00 SN74AS02 SN74AS04 SN74AS08 SN74AS10 SN74AS11 SN74AS20 SN74AS21 SN74AS27 SN74AS30 SN74AS32 SN74AS74A SN74AS86A SN74AS109A SN74AS138 SN74AS151 SN74AS153 SN74AS157 SN74AS158 SN74AS161 SN74AS163 SN74AS169A SN74AS174 SN74AS175B SN74AS181A SN74AS194 SN74AS230A SN74AS240A SN74AS241A SN74AS244A SN74AS245 SN74AS250A SN74AS253A SN74AS257 SN74AS258 NO. PINS 14 14 14 14 14 14 14 14 14 14 14 14 14 16 16 16 16 16 16 16 16 16 16 16 24 16 20 20 20 20 20 24 16 16 16 Quad 2-Input NAND Gates Quad 2-Input NOR Gates Hex Inverters Quad 2-Input AND Gates Triple 3-Input NAND Gates Triple 3-Input AND Gates Dual 4-Input NAND Gates Dual 4-Input AND Gates Triple 3-Input NOR Gates 8-Input NAND Gates Quad 2-Input OR Gates Dual D-Type Flip-Flops with Set and Reset Quad 2-Input Exclusive-OR Gates Dual Positive-Edge-Triggered J-K Flip-Flops with Set and Reset 3-to-8 Line Inverting Decoders/Demultiplexers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters Synchronous 4-Bit Up/Down Binary Counters Hex D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear Arithmetic Logic Units/Function Generators 4-Bit Bidirectional Universal Shift Registers Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs 1-of-16 Data Generators/Multiplexers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDAS187 SDAS111 SDAS063 SDAS191 SDAS002 SDAS009 SDAS192 SDAS085 SDAS112 SDAS010 SDAS113 SDAS143 SDAS006 SDAS198 SDAS055 SDAS205 SDAS206 SDAS081 SDAS081 SDAS024 SDAS024 SDAS125 SDAS207 SDAS207 SDAS209 SDAS212 SDAS213 SDAS214 SDAS153 SDAS142 SDAS272 SDAS137 SDAS216 SDAS124 SDAS124

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
542

DEVICE SN74AS280 SN74AS286 SN74AS298A SN74AS373 SN74AS374 SN74AS533A SN74AS534 SN74AS573A SN74AS574 SN74AS575 SN74AS576 SN74AS580 SN74AS623 SN74AS638A SN74AS640 SN74AS641 SN74AS645 SN74AS646 SN74AS648 SN74AS651 SN74AS652 SN74AS756 SN74AS757 SN74AS760 SN74AS804B SN74AS805B SN74AS808B SN74AS821A SN74AS823A SN74AS825A SN74AS832B SN74AS841A SN74AS867 SN74AS869 SN74AS873A SN74AS874 SN74AS876 SN74AS885 SN74AS1000A SN74AS1004A SN74AS1008A SN74AS1032A SN74AS1034A NO. PINS 14 14 16 20 20 20 20 20 20 24 20 20 20 20 20 20 20 24 24 24 24 20 20 20 20 20 20 24 24 24 20 24 24 24 24 24 24 24 14 14 14 14 14 DESCRIPTION 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Parity Generators/Checkers with Bus-Driver Parity I/O Port Quad 2-Input Multiplexers with Storage Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal D-Type Transparent Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal D-Type Transparent Latches with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Buffers and Line Drivers with Open-Collector Outputs Octal Buffers and Line Drivers with Open-Collector Outputs Octal Buffers and Line Drivers with Open-Collector Outputs Hex 2-Input NAND Drivers Hex 2-Input NOR Drivers Hex 2-Input NOR Drivers 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 8-Bit Bus-Interface Flip-Flops with 3-State Outputs Hex 2-Input OR Drivers 10-Bit Bus-Interface D-Type Latches with 3-State Outputs Synchronous 8-Bit Up/Down Counters Synchronous 8-Bit Up/Down Counters Dual 4-Bit D-Type Latches with 3-State Outputs Dual 4-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs Dual 4-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 8-Bit Magnitude Comparators Quad 2-Input NAND Buffers/Drivers Hex Inverting Drivers Quad 2-Input AND Buffers/Drivers Quad 2-Input OR Buffers/Drivers Hex Drivers AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDAS038 SDAS050 SDAS219 SDAS083 SDAS167 SDAS270 SDAS168 SDAS048 SDAS165 SDAS165 SDAS065 SDAS277 SDAS226 SDAS123 SDAS122 SDAS300 SDAS278 SDAS039 SDAS039 SDAS066 SDAS066 SDAS040 SDAS040 SDAS141 SDAS022 SDAS023 SDAS018 SDAS230 SDAS231 SDAS020 SDAS017 SDAS059 SDAS115 SDAS115 SDAS036 SDAS061 SDAS061 SDAS236 SDAS056 SDAS074 SDAS071 SDAS072 SDAS053
543

DEVICE SN74AS1804 SN74AS4374B NO. PINS 20 20 Hex 2-Input NAND Drivers Octal Edge-Triggered D-Type Dual-Rank Flip-Flops with 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDAS042 SDAS109
544
AVC
Advanced Very Low Voltage CMOS Logic

TIs new AVC logic family provides designers the tools to create advanced high-speed systems with propagation delays of less than 2 ns. Though optimized for 2.5-V systems, AVC logic supports operating voltages between 1.2 V and 3.6 V. The AVC family features TIs Dynamic Output Control (DOC) circuitry, which dynamically lowers circuit output impedance during signal transition for fast rise and fall times, and then raises the impedance after signal transmission to reduce ringing. Trends in digital electronics design emphasize lower power consumption, lower supply voltages, faster operating speeds, smaller timing budgets, and heavier loads. Many designs are making the transition from 3.3 V to 2.5 V with bus speeds increasing beyond 100 MHz. Signal integrity need not be compromised to meet these design requirements. TIs AVC family is designed to meet the needs of these high-speed, low-voltage systems, including next-generation high-performance workstations, PCs, networking servers, and telecommunications switching equipment. Key features:
Sub-2-ns maximum tpd at 2.5 V for AVC16245 Designed for next-generation, high-performance PCs, workstations, and servers DOC circuitry enhances high-speed, low-noise operation Supports mixed-voltage systems Optimized for 2.5 V; operable from 1.2 V to 3.6 V Bus-hold feature eliminates need for external resistors on unused input pins. Ioff supports partial power down.
545
DEVICE SELECTION GUIDE AVC

DEVICE SN74AVC00 SN74AVC08 SN74AVC10 SN74AVC32 SN74AVC245 SN74AVCH245 SN74AVC16244 SN74AVC16245 SN74AVCH16245 SN74AVC16269 SN74AVC16334 SN74AVC16334A SN74AVC16373 SN74AVC16374 SN74AVC16501 SN74AVC16601 SN74AVC16646 SN74AVC16721 SN74AVC16722 SN74AVCH16722 SN74AVC16820 SN74AVC16821 SN74AVC16827 SN74AVC16831 SN74AVC16834 SN74AVC16834A SN74AVC16835 SN74AVC16835A SN74AVCH16835 SN74AVC16836 SN74AVC32244 SN74AVC32245 SN74AVC32373 SN74AVC32374 SN74AVC32501 NO. PINS 14 14 14 14 20 20 48 48 48 56 48 48 48 48 56 56 56 56 64 64 56 56 56 80 56 56 56 56 56 56 96 96 96 96 114 Quad 2-Input NAND Gates Quad 2-Input AND Gates Triple 3-Input NAND Gates Quad 2-Input OR Gates Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 12-Bit to 24-Bit Registered Bus Exchangers with 3-State Outputs 16-Bit Universal Bus Drivers with 3-State Outputs 16-Bit Universal Bus Drivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 10-Bit D-Type Flip-Flops with Dual Outputs and 3-State Outputs 20-Bit D-Type Flip-Flops with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 1-to-4 Address Registers/Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 20-Bit Universal Bus Drivers with 3-State Outputs 32-Bit Buffers/Drivers with 3-State Outputs 32-Bit Bus Transceivers with 3-State Outputs 32-Bit Transparent D-Type Latches with 3-State Outputs 32-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 32-Bit Universal Bus Transceivers with 3-State Outputs ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' DESCRIPTION AVAILABILITY
LFBGA SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCES146 SCES147 SCES148 SCES149 SCES263 SCES264 SCES150 SCES142 SCES151 SCES152 SCES154 Call SCES156 SCES158 SCES160 SCES162 SCES181 SCES164 SCES166 SCES167 SCES173 SCES175 SCES176 SCES179 SCES183 Call SCES168 Call SCES169 SCES170 SCES329 SCES191 SCES327 SCES328 SCES185

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
546
BCT
BiCMOS Technology Logic

BCT is a family of 8-, 9-, and 10-bit drivers, latches, transceivers, and registered transceivers. Designed specifically for bus-interface applications, BCT offers TTL I/O with high speeds, 64-mA output drive, and very low power in the disabled mode. Over 50 BCT functions are in production. The BCT25xxx series of fast, high-drive bus-interface functions provides incident-wave switching required by large backplane applications. Designed specifically to ensure incident-wave switching down to 25 , these low-impedance driver devices can maximize the speed and reliability of heavily loaded systems. Each device of this series delivers 188 mA of IOL drive current. Also included in TIs BCT family are devices with series damping resistors to reduce overshoot and undershoot that can occur in memory-driving applications. See www.ti.com/sc/logic for the most current data sheets.
64BCT
64 Series BiCMOS Technology Logic

The 64BCT family offers all the features found in TIs standard BCT family. In addition, the family is characterized for operation from 40C to 85C and incorporates circuitry to protect the device in live-insertion applications. See www.ti.com/sc/logic for the most current data sheets.
547
DEVICE SELECTION GUIDE BCT

DEVICE SN74BCT125A SN74BCT126A SN74BCT240 SN74BCT241 SN74BCT244 SN74BCT245 SN74BCT373 SN74BCT374 SN74BCT540A SN74BCT541A SN74BCT543 SN74BCT573 SN74BCT574 SN74BCT623 SN74BCT640 SN74BCT646 SN74BCT652 SN74BCT756 SN74BCT757 SN74BCT760 SN74BCT2240 SN74BCT2241 SN74BCT2244 SN74BCT2245 SN74BCT2414 SN74BCT2827C SN74BCT25244 SN74BCT25245 SN74BCT25642 SN74BCT29821 SN74BCT29825 SN74BCT29827B SN74BCT29843 NO. PINS 14 14 20 20 20 20 20 20 20 20 24 20 20 20 20 24 24 20 20 20 20 20 20 20 20 24 24 24 24 24 24 24 24 DESCRIPTION Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Buffers and Line Drivers with Open-Collector Outputs Octal Buffers and Line Drivers with Open-Collector Outputs Octal Buffers and Line Drivers with Open-Collector Outputs Octal Buffers and Line/MOS Drivers with 3-State Outputs and Series Damping Resistors Octal Buffers and Line/MOS Drivers with Series Damping Resistors and 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs Octal Transceivers and Line MOS Drivers with Series Damping Resistors and 3-State Outputs Dual 2-Line to 4-Line Memory Decoders with On-Chip Supply-Voltage Monitor 10-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 25- Octal Buffers/Drivers with 3-State Outputs 25- Octal Bus Transceivers with 3-State Outputs 25- Octal Bus Transceivers with Open-Collector Outputs 10-Bit Bus-Interface Flip-Flops with 3-State Outputs Octal Bus Interface Flip-Flops with 3-State Outputs 10-Bit Buffers/Drivers with 3-State Outputs 9-Bit D-Type Bus-Interface Latches with 3-State Outputs QFP (quad flatpack) RC = 52 pins (FB only) PH = 80 pins (FIFO only) PQ = 100/132 pins (FIFO only) TQFP (plastic thin quad flatpack)
AVAILABILITY
LITERATURE REFERENCE SCBS032 SCBS252 SCBS004 SCBS005 SCBS006 SCBS013 SCBS016 SCBS019 SCBS012 SCBS011 SCBS026 SCBS071 SCBS074 SCBS020 SCBS025 SCBS037 SCBS038 SCBS056 SCBS041 SCBS034 SCBS030 SCBS035 SCBS017 SCBS102 SCBS059 SCBS007 SCBS064 SCBS053 SCBS047 SCBS021 SCBS075 SCBS008 SCBS256

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
548
DEVICE SELECTION GUIDE BCT

DEVICE SN74BCT29854 SN74BCT29863B SN74BCT29864B NO. PINS 24 24 24 DESCRIPTION 8-Bit to 9-Bit Parity Bus Transceivers 9-Bit Bus Transceivers with 3-State Outputs 9-Bit Bus Transceivers with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCBS257 SCBS015 SCBS010
549
DEVICE SELECTION GUIDE 64BCT

DEVICE SN64BCT125A SN64BCT126A SN64BCT244 SN64BCT245 SN64BCT757 SN64BCT25244 SN64BCT25245 NO. PINS 14 14 20 20 20 24 24 Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Buffers and Line Drivers with Open-Collector Outputs 25- Octal Buffers/Drivers with 3-State Outputs 25- Octal Bus Transceivers with 3-State Outputs DESCRIPTION AVAILABILITY
PDIP SOIC SSOP
LITERATURE REFERENCE SCBS052 SCBS051 SCBS027 SCBS040 SCBS479 SCBS477 SCBS060

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
550
BTA
Bus Termination Arrays

TIs BTA family offers a space-saving, efficient, and effective solution to bus-termination requirements. In high-speed digital systems with long transmission lines, reflecting waves on the line can cause voltage undershoots and overshoots that lead to malfunctions at the driven input. A BTA is a series of diodes that clamps a signal on a bus or any other signal trace using high-frequency logic to limit overshoot and undershoot problems. See www.ti.com/sc/logic for the most current data sheets.
551
DEVICE SELECTION GUIDE BTA

DEVICE SN74F1016 SN74S1050 SN74S1051 SN74S1052 SN74S1053 SN74F1056 SN74S1056 SN74ACT1071 SN74ACT1073 CD40117B NO. PINS 20 16 16 20 20 16 10 14 20 14 DESCRIPTION 16-Bit Schottky Barrier Diode R-C Bus-Termination Arrays 12-Bit Schottky Barrier Diode Bus-Termination Arrays 12-Bit Schottky Barrier Diode Bus-Termination Arrays 16-Bit Schottky Barrier Diode Bus-Termination Arrays 16-Bit Schottky Barrier Diode Bus-Termination Arrays 8-Bit Schottky Barrier Diode Bus-Termination Arrays 8-Bit Schottky Barrier Diode Bus-Termination Arrays 10-Bit Bus Termination Networks with Bus-Hold Function 16-Bit Bus Termination Networks with Bus-Hold Function Programmable Dual 4-Bit Terminators AVAILABILITY
MIL PDIP SIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SDFS093 SDLS015 SDLS018 SDLS016 SDLS017 SDFS085 SDLS019 SCAS192 SCAS193 SCHS101

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
552
CBT
Crossbar Technology Logic

Power and speed are two primary concerns in todays computing market. CBT can address these issues in bus-interface applications. CBT enables a bus-interface device to function as a very fast bus switch, effectively isolating buses when the switch is open and offering very little propagation delay when the switch is closed. These devices can function as high-speed bus interfaces between computer-system components, such as the central processing unit (CPU) and memory. CBT devices also can be used as 5-V to 3.3-V translators, allowing designers to mix 5-V or 3.3-V components in the same system. The CBT devices are available in advanced packaging, such as the shrink small-outline package (SSOP), thin shrink small-outline package (TSSOP), and thin very small-outline package (TVSOP) for reduced board area. See www.ti.com/sc/logic for the most current data sheets.
553
DEVICE SELECTION GUIDE CBT

DEVICE SN74CBT1G66 SN74CBT1G125 SN74CBTD1G125 SN74CBT1G384 SN74CBT3125 SN74CBT3126 SN74CBT3244 SN74CBT3245A SN74CBT3251 SN74CBT3253 SN74CBT3257 SN74CBT3306 SN74CBTD3306 SN74CBTS3306 SN74CBT3345 SN74CBT3383 CYBUS3384 SN74CBT3384A SN74CBTD3384 SN74CBTS3384 SN74CBT3861 SN74CBTD3861 SN74CBT6800A SN74CBTK6800 SN74CBTS6800 SN74CBT16209A SN74CBT16210 SN74CBTD16210 SN74CBT16211A SN74CBTD16211 SN74CBTH16211 SN74CBTS16211 NO. PINS 5 5 5 5 14/16 14/16 20 20 16 16 16 8 8 8 20 24 24 24 24 24 24 24 24 24 24 48 48 48 56 56 56 56 DESCRIPTION Single FET Bus Switches Single FET Bus Switches Single FET Bus Switches with Level Shifting Single FET Bus Switches Quad FET Bus Switches Quad FET Bus Switches Octal FET Bus Switches Octal FET Bus Switches 1-of-8 FET Multiplexers/Demultiplexers Dual 1-of-4 FET Multiplexers/Demultiplexers 4-Bit 1-of-2 FET Multiplexers/Demultiplexers Dual FET Bus Switches Dual FET Bus Switches with Level Shifting Dual FET Bus Switches with Schottky Diode Clamping 8-Bit FET Bus Switches 10-Bit FET Bus-Exchange Switches 10-Bit FET Bus Switches 10-Bit FET Bus Switches 10-Bit FET Bus Switches with Level Shifting 10-Bit FET Bus Switches with Schottky Diode Clamping 10-Bit FET Bus Switches 10-Bit FET Bus Switches with Level Shifting 10-Bit FET Bus Switches with Precharged Outputs for Live Insertion 10-Bit FET Bus Switches with Precharged Outputs and Active-Clamp Undershoot-Protection Circuit 10-Bit FET Bus Switches with Precharged Outputs and Diode Clamping 18-Bit FET Bus-Exchange Switches 20-Bit FET Bus Switches 20-Bit FET Bus Switches 24-Bit FET Bus Switches 24-Bit FET Bus Switches with Level Shifting 24-Bit FET Bus Switches with Bus Hold 24-Bit FET Bus Switches with Schottky Diode Clamping ' ' ' ' AVAILABILITY
MIL LFBGA SOIC SOT SSOP TSSOP TVSOP
LITERATURE REFERENCE SCDS110 SCDS046 SCDS063 SCDS065 SCDS021 SCDS020 SCDS001 SCDS002 SCDS019 SCDS018 SCDS017 SCDS016 SCDS030 SCDS029 SCDS027 SCDS003 SCDS103 SCDS004 SCDS025 SCDS024 SCDS061 SCDS084 SCDS005 SCDS107 SCDS102 SCDS006 SCDS033 SCDS049 SCDS028 SCDS048 SCDS062 SCDS050
'

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
554

DEVICE SN74CBT16212A SN74CBTS16212 SN74CBT16213 SN74CBTS16213 SN74CBT16214 SN74CBT16232 SN74CBT16233 SN74CBT16244 SN74CBT16245 SN74CBTK16245 SN74CBT16292 SN74CBT16390 SN74CBT16861 SN74CBTD16861 SN74CBTK16861 SN74CBTR16861 SN74CBT32245 SN74CBTK32245 SN74CBT162292 SN74CBT162292A NO. PINS 56 56 56 56 56 56 56 48 48 48 56 56 48 48 48 48 96 96 56 56 DESCRIPTION 24-Bit FET Bus-Exchange Switches 24-Bit FET Bus-Exchange Switches with Schottky Diode Clamping 24-Bit FET Bus-Exchange Switches 24-Bit FET Bus-Exchange Switches with Schottky Diode Clamping 12-Bit 1-of-3 FET Multiplexers/Demultiplexers Synchronous 16-Bit 1-of-2 FET Multiplexers/Demultiplexers 16-Bit 1-of-2 FET Multiplexers/Demultiplexers 16-Bit FET Bus Switches 16-Bit FET Bus Switches 16-Bit FET Bus Switches with Active-Clamp Undershoot-Protection Circuit 12-Bit 1-of-2 FET Multiplexers/Demultiplexers with Internal Pulldown Resistors 16-Bit to 32-Bit FET Multiplexer/Demultiplexer Bus Switches 20-Bit FET Bus Switches 20-Bit FET Bus Switches with Level Shifting 20-Bit FET Bus Switches with Active-Clamp Undershoot-Protection Circuit 20-Bit FET Bus Switches with Series Damping Resistors 32-Bit FET Bus Switches 32-Bit FET Bus Switches with Active-Clamp Undershoot-Protection Circuit 12-Bit 1-of-2 Multiplexers/Demultiplexers with Internal Pulldown Resistors 12-Bit 1-of-2 Multiplexers/Demultiplexers with Internal Pulldown Resistors ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' ' AVAILABILITY
MIL LFBGA SOIC SOT SSOP TSSOP TVSOP
LITERATURE REFERENCE SCDS007 SCDS036 SCDS026 SCDS051 SCDS008 SCDS009 SCDS010 SCDS031 SCDS070 SCDS105 SCDS053 SCDS035 SCDS068 SCDS069 SCDS108 SCDS078 SCDS104 SCDS106 SCDS052 Call
555
556
CBTLV
Low Voltage Crossbar Technology Logic

TI developed the SN74CBTLV family of 3.3-V bus switches to complement its existing SN74CBT family of 5-V bus switches. TI was the first to offer these devices, designed for 3.3-V, in its continuing drive to provide low-voltage solutions. CBTLV devices can be used in multiprocessor systems as fast bus connections, bus-exchange switches for crossbar systems, ping-pong memory connections, or bus-byte swapping. They also can be used to replace relays, improving connect/disconnect speed and eliminating relay-reliability problems. The CBTLV family, designed to operate at 3.3 V, furthers the goal of an integrated system operating with LVTTL voltages. The CBTLV devices are available in industry-leading packaging options, such as the shrink small-outline package (SSOP), thin small-outline package (TSSOP), and thin very small-outline package (TVSOP) for reduced board area. See www.ti.com/sc/logic for the most current data sheets.
557
DEVICE SELECTION GUIDE CBTLV

DEVICE SN74CBTLV1G125 SN74CBTLV3125 SN74CBTLV3126 SN74CBTLV3245A SN74CBTLV3251 SN74CBTLV3253 SN74CBTLV3257 SN74CBTLV3383 SN74CBTLV3384 SN74CBTLV3857 SN74CBTLV3861 SN74CBTLV16210 SN74CBTLV16211 SN74CBTLV16212 SN74CBTLV16292 SN74CBTLVR16292 SN74CBTLV16800 NO. PINS 5 14/16 14/16 20 16 16 16 24 24 24 24 48 56 56 56 56 48 Single FET Bus Switches Quad FET Bus Switches Quad FET Bus Switches Octal FET Bus Switches 1-of-8 FET Multiplexers/Demultiplexers Dual 1-of-4 FET Multiplexers/Demultiplexers 4-Bit 1-of-2 FET Multiplexers/Demultiplexers 10-Bit FET Bus-Exchange Switches 10-Bit FET Bus Switches 10-Bit FET Bus Switches with Internal Pulldown Resistors 10-Bit FET Bus Switches 20-Bit FET Bus Switches 24-Bit FET Bus Switches 24-Bit FET Bus-Exchange Switches 12-Bit 1-of-2 FET Multiplexers/Demultiplexers with Internal Pulldown Resistors 12-Bit 1-of-2 FET Multiplexers/Demultiplexers with Internal Pulldown Resistors 20-Bit FET Bus Switches with Precharged Outputs DESCRIPTION AVAILABILITY
SOIC SOT SSOP TSSOP TVSOP
LITERATURE REFERENCE SCDS057 SCDS037 SCDS038 SCDS034 SCDS054 SCDS039 SCDS040 SCDS047 SCDS059 SCDS085 SCDS041 SCDS042 SCDS043 SCDS044 SCDS055 SCDS056 SCDS045

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
558
CD4000
CMOS B Series Integrated Circuits

The CD4000 family is a CMOS B series of devices with a maximum dc supply-voltage rating of 20 V. The family has a large number of functions, including analog switches, monostable multivibrators, level converters, counters, timers, display drivers, phase-locked loops (PLLs), and other functions. The wide operating voltage range of this family allows use of the CD4000 products in varied applications, including instrumentation, control, and communications. Key features:
Wide variety of functions High noise immunity Low power consumption Propagation delay time similar to LSTTL products 5-, 10-, and 15-V parametric ratings High fanout, typically 10 Excellent temperature stability
TIs CD4000 products were acquired from Harris Semiconductor in December 1998. See www.ti.com/sc/logic for the most current data sheets.
559
DEVICE SELECTION GUIDE CD4000

DEVICE CD4001B CD4001UB CD4002B CD4007UB CD4009UB CD4010B CD4010UB CD4011B CD4011UB CD4012B CD4013B CD4014B CD4015B CD4016B CD4017B CD4018B CD4019B CD4020B CD4021B CD4022B CD4023B CD4024B CD4025B CD4026B CD4027B CD4028B CD4029B CD4030B CD4031B CD4033B CD4034B CD4035B CD4040B CD4041UB CD4042B CD4043B CD4044B CD4045B CD4046B CD4047B NO. PINS 14 14 14 14 16 16 16 14 14 14 14 16 16 14 16 16 16 16 16 16 14 14 14 16 16 16 16 14 16 16 24 16 16 14 16 16 16 16 16 14 Quad 2-Input NOR Gates Quad 2-Input Unbuffered NOR Gates Dual 4-Input NOR Gates Dual Unbuffered Complementary Pairs Plus Inverter Hex Inverting Buffers/Converters Hex Buffers/Converters Hex Buffers/Converters Quad 2-Input NAND Gates Quad 2-Input Unbuffered NAND Gates Dual 4-Input NAND Gates Dual D-Type Flip-Flops 8-Stage Static Shift Registers Dual 4-Stage Static Shift Registers Quad Bilateral Switches Decade Counter/Divider with 1-of-10 Decoded Outputs Divide-by-N Counters Quad AND/OR Select Gates 12-Stage Ripple-Carry Binary Counters/Dividers 8-Stage Static Shift Registers Octal Counters/Dividers with 1-of-8 Decoded Outputs Triple 3-Input NAND Gates 7-Stage Ripple-Carry Binary Counters/Dividers Triple 3-Input NOR Gates Decade Counters/Drivers with Decoded 7-Segment Display Outputs Dual J-K Master-Slave Flip-Flops BCD-to-Decimal Decoders Presettable Up/Down Binary or BCD-Decade Counters Quad Exclusive-OR Gates 64-Stage Static Shift Registers Decade Counters/Drivers with Decoded 7-Segment Display Outputs 8-Stage Static Bidirectional Parallel/Serial Input/Output Bus Registers 4-Stage Parallel-In/Parallel-Out Shift Registers 12-Stage Ripple-Carry Binary Counters/Dividers Quad True/Complement Buffers Quad Clocked D Latches Quad NOR R/S Latches with 3-State Outputs Quad NAND R/S Latches with 3-State Outputs 21-Stage Counters Micropower Phase-Locked Loops with VCO Low-Power Monostable/Astable Multivibrators DESCRIPTION AVAILABILITY
MIL PDIP SOIC TSSOP
LITERATURE REFERENCE SCHS015 SCHS016 SCHS015 SCHS018 SCHS020 SCHS020 Call SCHS021 SCHS022 SCHS021 SCHS023 SCHS024 SCHS025 SCHS026 SCHS027 SCHS028 SCHS029 SCHS030 SCHS024 SCHS027 SCHS021 SCHS030 SCHS015 SCHS031 SCHS032 SCHS033 SCHS034 SCHS035 SCHS036 SCHS031 SCHS037 SCHS038 SCHS030 SCHS039 SCHS040 SCHS041 SCHS041 SCHS042 SCHS043 SCHS044
commercial package description and availability schedule

= Now ' = Planned
See Appendix A for package information.
560

DEVICE CD4048B CD4049UB CD4050B CD4051B CD4052B CD4053B CD4054B CD4055B CD4056B CD4059A CD4060B CD4063B CD4066B CD4067B CD4068B CD4069UB CD4070B CD4071B CD4072B CD4073B CD4075B CD4076B CD4077B CD4078B CD4081B CD4082B CD4085B CD4086B CD4089B CD4093B CD4094B CD4097B CD4098B CD4099B CD4502B CD4503B CD4504B CD4508B CD4510B CD4511B CD4512B CD4514B CD4515B CD4516B NO. PINS 16 16 16 16 16 16 16 16 16 24 16 16 14 24 14 14 14 14 14 14 14 16 14 14 14 14 14 14 16 14 16 24 16 16 16 16 16 24 16 16 16 24 24 16 Multifunction Expandable 8-Input Gates Hex Buffers/Converters Hex Buffers/Converters 8-Channel Analog Multiplexers/Demultiplexers with Logic-Level Conversion Dual 4-Channel Analog Multiplexers/Demultiplexers with Logic-Level Conversion Triple 2-Channel Analog Multiplexers/Demultiplexers with Logic-Level Conversion 4-Segment Liquid Crystal Display Drivers BCD to 7-Segment Liquid Crystal Decoders/Drivers with Display-Frequency Output BCD to 7-Segment Liquid Crystal Decoders/Drivers with Strobed Latch Function Programmable Divide-by-N Counters 14-Stage Binary-Ripple Counters/Dividers and Oscillator 4-Bit Magnitude Comparators Quad Bilateral Switches Single 16-Channel Analog Multiplexers/Demultiplexers 8-Input NAND/AND Gates Hex Inverters Quad Exclusive-OR Gates Quad 2-Input OR Gates Dual 4-Input OR Gates Triple 3-Input AND Gates Triple 3-Input OR Gates 4-Bit D-Type Registers Quad Exclusive-NOR Gates 8-Input NOR/OR Gates Quad 2-Input AND Gates Dual 4-Input AND Gates Dual 2-Wide 2-Input AND-OR-Invert Gates Expandable 4-Wide 2-Input AND-OR-Invert Gates 4-Bit Binary Rate Multipliers Quad 2-Input NAND Schmitt Triggers 8-Stage Shift-and-Store Bus Registers Differential 8-Channel Analog Multiplexers/Demultiplexers Dual Monostable Multivibrators 8-Bit Addressable Latches Strobed Hex Inverters/Buffers Hex Buffers Hex Voltage-Level Shifters for TTL-to-CMOS or CMOS-to-CMOS Operation Dual 4-Bit Latches Presettable BCD Up/Down Counters BCD to 7-Segment Latch Decoder Drivers 8-Channel Data Selectors 4-Bit Latches/4-to-16 Line Decoders 4-Bit Latches/4-to-16 Line Decoders Presettable Binary Up/Down Counters DESCRIPTION AVAILABILITY
MIL PDIP SOIC TSSOP
LITERATURE REFERENCE SCHS045 SCHS046 SCHS046 SCHS047 SCHS047 SCHS047 SCHS048 SCHS048 SCHS048 SCHS109 SCHS049 SCHS050 SCHS051 SCHS052 SCHS053 SCHS054 SCHS055 SCHS056 SCHS056 SCHS057 SCHS056 SCHS058 SCHS055 SCHS059 SCHS057 SCHS057 SCHS060 SCHS061 SCHS062 SCHS115 SCHS063 SCHS052 SCHS065 SCHS066 SCHS067 SCHS068 SCHS069 SCHS070 SCHS071 SCHS072 SCHS073 SCHS074 SCHS074 SCHS071
561

DEVICE CD4517B CD4518B CD4520B CD4521B CD4522B CD4527B CD4532B CD4536B CD4541B CD4543B CD4555B CD4556B CD4572UB CD4585B CD4724B CD14538B CD40102B CD40103B CD40106B CD40107B CD40109B CD40110B CD40117B CD40147B CD40161B CD40174B CD40175B CD40192B CD40193B CD40194B CD40257B NO. PINS 16 16 16 16 16 16 16 16 14 16 16 16 16 16 16 16 16 16 14 8 16 16 14 16 16 16 16 16 16 16 16 Dual 64-Stage Static Shift Registers Dual BCD Up Counters Dual Binary Up Counters 24-Stage Frequency Dividers Programmable BCD Divide-by-N Counters BCD Rate Multipliers 8-Bit Priority Encoders Programmable Timers Programmable Timers BCD to 7-Segment Latches/Decoders/Drivers for Liquid-Crystal Displays Dual Binary 1-of-4 Decoders/Demultiplexers Dual Binary 1-of-4 Decoders/Demultiplexers Hex Gates (4 Inverters, 2-Input NOR, 2-Input NAND) 4-Bit Magnitude Comparators 8-Bit Addressable Latches Dual-Precision Monostable Multivibrators 2-Decade BCD Presettable Synchronous Down Counters 8-Bit Binary Presettable Synchronous Down Counters Hex Schmitt Triggers Dual 2-Input NAND Buffers/Drivers Quad Low- to High-Voltage Level Shifters Decade Up-Down Counters/Latches/7-Segment Display Drivers Programmable Dual 4-Bit Terminators 10-Line to 4-Line BCD Priority Encoders Programmable 4-Bit Binary Counters with Asynchronous Clear Hex D-Type Flip-Flops Quad D-Type Flip-Flops Presettable BCD-Type Up/Down Counters with Dual Clock and Reset Presettable BCD-Type Up/Down Counters with Dual Clock and Reset 4-Bit Bidirectional Universal Shift Registers Quad 2-Line to 1-Line Data Selectors/Multiplexers DESCRIPTION AVAILABILITY
MIL PDIP SOIC TSSOP
LITERATURE REFERENCE SCHS075 SCHS076 SCHS076 SCHS078 SCHS079 SCHS080 SCHS082 SCHS083 SCHS085 SCHS086 SCHS087 SCHS087 SCHS090 SCHS091 SCHS092 SCHS093 SCHS095 SCHS095 SCHS096 SCHS097 SCHS098 SCHS099 SCHS100 SCHS102 SCHS103 SCHS104 SCHS105 SCHS106 SCHS106 SCHS107 SCHS108
562
74F
Fast Logic
74F logic is a general-purpose family of high-speed advanced bipolar logic. TI provides over 50 functions in the 74F family, including gates, buffers/drivers, bus transceivers, flip-flops, latches, counters, multiplexers, and demultiplexers. See www.ti.com/sc/logic for the most current data sheets.
563
DEVICE SELECTION GUIDE 74F

DEVICE SN74F00 SN74F02 SN74F04 SN74F08 SN74F10 SN74F11 SN74F20 SN74F21 SN74F27 SN74F30 SN74F32 SN74F38 SN74F74 SN74F86 SN74F109 SN74F112 SN74F125 SN74F126 SN74F138 SN74F151B SN74F153 SN74F157A SN74F158A SN74F161A SN74F163A SN74F169 SN74F174A SN74F175 SN74F240 SN74F241 SN74F244 SN74F245 SN74F251B SN74F253 SN74F257 NO. PINS 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 16 14 14 16 16 16 16 16 16 16 16 16 16 20 20 20 20 16 16 16 Quad 2-Input NAND Gates Quad 2-Input NOR Gates Hex Inverters Quad 2-Input AND Gates Triple 3-Input NAND Gates Triple 3-Input AND Gates Dual 4-Input NAND Gates Dual 4-Input AND Gates Triple 3-Input NOR Gates 8-Input NAND Gates Quad 2-Input OR Gates Quad 2-Input NAND Gates Dual D-Type Flip-Flops with Set and Reset Quad 2-Input Exclusive-OR Gates Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs 3-to-8 Line Inverting Decoders/Demultiplexers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters Synchronous 4-Bit Up/Down Binary Counters Hex D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs 1-of-8 Data Selectors/Multiplexers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDFS035 SDFS036 SDFS037 SDFS038 SDFS039 SDFS040 SDFS041 SDFS006 SDFS042 SDFS043 SDFS044 SDFS013 SDFS046 SDFS019 SDFS047 SDFS048 SDFS016 SDFS017 SDFS051 SDFS023 SDFS052 SDFS053 SDFS054 SDFS056 SDFS088 SDFS089 SDFS029 SDFS058 SDFS061 SDFS090 SDFS063 SDFS010 SDFS066 SDFS064 SDFS065

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
564

DEVICE SN74F258 SN74F260 SN74F280B SN74F283 SN74F299 SN74F373 SN74F374 SN74F377A SN74F520 SN74F521 SN74F541 SN74F543 SN74F573 SN74F574 SN74F623 SN74F657 SN74F1016 SN74F1056 SN74F2244 SN74F2245 SN74F2373 NO. PINS 16 14 14 16 20 20 20 20 20 20 20 24 20 20 20 24 20 16 20 20 20 DESCRIPTION Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Dual 5-Input NOR Gates 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Binary Full Adders with Fast Carry 8-Bit Universal Shift/Storage Registers Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal D-Type Flip-Flops with Enable 8-Bit Identity Comparators (P = Q) with Input Pullup Resistors 8-Bit Identity Comparators (P = Q) Octal Buffers and Line Drivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with Parity Generators/Checkers and 3-State Outputs 16-Bit Schottky Barrier Diode R-C Bus-Termination Arrays 8-Bit Schottky Barrier Diode Bus-Termination Arrays Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs Octal Bus Transceivers with Series Damping Resistors and 3-State Outputs 25- Octal Transparent D-Type Latches with 3-State Outputs AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDFS067 SDFS012 SDFS008 SDFS069 SDFS071 SDFS076 SDFS077 SDFS018 SDFS081 SDFS091 SDFS021 SDFS025 SDFS011 SDFS005 SDFS087 SDFS027 SDFS093 SDFS085 SDFS095 SDFS099 SDFS100
565
566
FB+/BTL
FutureBus+/ Backplane Transceiver Logic

The FB+ series of devices is designed for use in double-terminated high-speed bus applications and is fully compatible with IEEE Std 896-1991 (FutureBus+) and IEEE Std 1194.1-1991 (BTL). These transceivers are available in 7-, 8-, 9-, and 18-bit versions for 5-V CMOS or TTL-to-BTL and BTL-to-TTL translations. Other features include BTL drive up to 100 mA, low (5 pF to 6 pF maximum) B-port Cio, tpd performance below 5 ns, and B-port BIAS VCC pins for live insertion. One device, the 18-bit FB1653, offers 5-V CMOS, TTL- or LVTTL-to-BTL and BTL-to-LVTTL translations. The new GTLP series of high-drive devices also can be used in BTL applications. Please refer to the GTLP in BTL Applications applications report, literature number SCEA017, for more information. See www.ti.com/sc/logic for the most current data sheets.
567
DEVICE SELECTION GUIDE FB+/BTL

DEVICE SN74FB1650 SN74FB1651 SN74FB1653 SN74FB2031 SN74FB2032 SN74FB2033A SN74FB2033K SN74FB2040 SN74FB2041A NO. PINS 100 100 100 52 52 52 52 52 52 DESCRIPTION 18-Bit TTL/BTL Universal Storage Transceivers 17-Bit TTL/BTL Universal Storage Transceivers with Buffered Clock Lines 17-Bit LVTTL/BTL Universal Storage Transceivers with Buffered Clock Lines 9-Bit TTL/BTL Address/Data Transceivers 9-Bit TTL/BTL Competition Transceivers 8-Bit TTL/BTL Registered Transceivers 8-Bit TTL/BTL Registered Transceivers 8-Bit TTL/BTL Transceivers 7-Bit TTL/BTL Transceivers AVAILABILITY
MIL QFP TQFP
LITERATURE REFERENCE SCBS178 SCBS177 SCBS702 SCBS176 SCBS175 SCBS174 SCBS472 SCBS173 SCBS172

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
568
FCT
Fast CMOS TTL Logic

The FCT product family is designed for high-current-drive bus-interface applications. The FCT family is fabricated using a CMOS 6-m technology to provide up to 40-mA or 64-mA current sink capability, with typical propagation delays of 5 ns (CD74FCT245). The family is optimized to operate at 5 V and is pin-function compatible with most standard bipolar and CMOS logic families. The FCT family of devices has several features for efficient bus interfacing. The family does not have input or output diodes to VCC, and most FCT devices have 3-state outputs. Bus noise is minimized with 1-V, or less, typical ground bounce (Volp, 5-V VCC, 25C) and limited output voltage swing (3.5-V typical). The FCT family includes 8-, 9-, and 10-bit bus-interface devices. Key features:
5-V operation 5-ns typical propagation delay (CD74FCT245) Low quiescent power consumption 1-V typical Volp
TIs FCT family was acquired from Harris Semiconductor in December 1998. See www.ti.com/sc/logic for the most current data sheets.
569
DEVICE SELECTION GUIDE FCT

DEVICE CY29FCT52CT CY74FCT138AT CY74FCT138CT CY74FCT138T CY74FCT157AT CY74FCT157CT CY74FCT163CT CY74FCT163T CY74FCT191AT CY74FCT191CT CD74FCT240 CY74FCT240AT CY74FCT240CT CY74FCT240T CD74FCT244 CD74FCT244AT CY74FCT244AT CY74FCT244CT CY74FCT244DT CY74FCT244T CD74FCT245 CY74FCT245AT CY74FCT245CT CY74FCT245DT CY74FCT245T CY74FCT257AT CY74FCT257CT CY74FCT257T CD74FCT273 CY74FCT273AT CY74FCT273CT CY74FCT273T CD74FCT373 CY74FCT373AT CY74FCT373CT CY74FCT373T CD74FCT374 CY74FCT374AT CY74FCT374CT CY74FCT374T CY74FCT377AT NO. PINS 24 16 16 16 16 16 16 16 16 16 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 16 16 16 20 20 20 20 20 20 20 20 20 20 20 20 20 DESCRIPTION Octal Registered Transceivers with 3-State Outputs 1-of-8 Decoders 1-of-8 Decoders 1-of-8 Decoders Quad 2-Input Multiplexers Quad 2-Input Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters Presettable Synchronous 4-Bit Up/Down Binary Counters Presettable Synchronous 4-Bit Up/Down Binary Counters Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Octal D-Type Flip-Flops with Clear Octal D-Type Flip-Flops with Clear Octal D-Type Flip-Flops with Clear Octal D-Type Flip-Flops with Clear Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Flip-Flops with Enable AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SCCS010 SCCS013 SCCS013 SCCS013 SCCS014 SCCS014 SCCS015 SCCS015 SCCS016 SCCS016 SCHS270 SCCS017 SCCS017 SCCS017 SCHS270 SCHS270 SCCS017 SCCS017 SCCS017 SCCS017 SCHS271 SCCS018 SCCS018 SCCS018 SCCS018 SCCS019 SCCS019 SCCS019 SCHS254 SCCS020 SCCS020 SCCS020 SCHS272 SCCS021 SCCS021 SCCS021 SCHS256 SCCS022 SCCS022 SCCS022 SCCS023
commercial package description and availability schedule

= Now ' = Planned See Appendix A for package information.
570

DEVICE CY74FCT377CT CY74FCT377T CY74FCT399AT CY74FCT399CT CY74FCT480AT CY74FCT480BT CY29FCT520AT CY29FCT520BT CY29FCT520CT CD74FCT540 CY74FCT540CT CD74FCT541 CY74FCT541AT CY74FCT541CT CY74FCT541T CD74FCT543 CY74FCT543AT CY74FCT543CT CY74FCT543T CD74FCT564 CD74FCT573 CD74FCT573AT CY74FCT573AT CY74FCT573CT CY74FCT573T CD74FCT574 CY74FCT574AT CY74FCT574CT CY74FCT574T CD74FCT623 CD74FCT646 CY74FCT646AT CY74FCT646CT CY74FCT646T CD74FCT652 CY74FCT652AT CY74FCT652CT CY74FCT652T CD74FCT653 CD74FCT654 CY29FCT818AT CY29FCT818CT CD74FCT821A CY74FCT821AT CY74FCT821BT NO. PINS 20 20 16 16 24 24 24 24 24 20 20 20 20 20 20 24 24 24 24 20 20 20 20 20 20 20 20 20 20 20 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 Octal D-Type Flip-Flops with Enable Octal D-Type Flip-Flops with Enable Quad 2-Input Multiplexers with Storage Quad 2-Input Multiplexers with Storage Dual 8-Bit Parity Generators/Checkers Dual 8-Bit Parity Generators/Checkers 8-Bit Multi-Level Pipeline Registers 8-Bit Multi-Level Pipeline Registers 8-Bit Multi-Level Pipeline Registers Inverting Octal Buffers and Line Drivers with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Inverting D-Type Flip-Flops with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with Open-Drain and 3-State Outputs Octal Bus Transceivers and Registers with Open-Drain and 3-State Outputs Diagnostic Scan Registers Diagnostic Scan Registers 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 10-Bit Bus-Interface Flip-Flops with 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SCCS023 SCCS023 SCCS024 SCCS024 SCCS025 SCCS025 SCCS011 SCCS011 SCCS011 SCHS257 SCCS029 SCHS257 SCCS029 SCCS029 SCCS029 SCHS258 SCCS030 SCCS030 SCCS030 SCHS259 SCHS260 SCHS260 SCCS021 SCCS021 SCCS021 SCHS259 SCCS022 SCCS022 SCCS022 SCHS296 SCHS261 SCCS031 SCCS031 SCCS031 SCHS262 SCCS032 SCCS032 SCCS032 SCHS263 SCHS263 SCCS012 SCCS012 SCHS264 SCCS033 SCCS033
571

DEVICE CY74FCT821CT CD74FCT822A CD74FCT823A CY74FCT823AT CY74FCT823BT CY74FCT823CT CD74FCT824A CY74FCT825CT CY74FCT827AT CY74FCT827CT CD74FCT841A CY74FCT841AT CY74FCT841BT CY74FCT841CT CD74FCT842A CD74FCT843A CD74FCT844A CY74FCT2240AT CY74FCT2240CT CY74FCT2240T CY74FCT2244AT CY74FCT2244CT CY74FCT2244T CY74FCT2245AT CY74FCT2245CT CY74FCT2245T CY74FCT2257AT CY74FCT2257CT CY74FCT2373AT CY74FCT2373CT CY74FCT2373T CY74FCT2374AT CY74FCT2374CT CY74FCT2374T CY74FCT2541AT CY74FCT2541CT CY74FCT2541T CY74FCT2543AT CY74FCT2543CT CY74FCT2543T CY74FCT2573AT CY74FCT2573CT CY74FCT2573T CY74FCT2574AT NO. PINS 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 24 20 20 20 20 20 20 20 20 20 16 16 20 20 20 20 20 20 20 20 20 24 24 24 20 20 20 20 DESCRIPTION 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 8-Bit Bus-Interface Flip-Flops with 3-State Outputs 10-Bit Buffers/Drivers with 3-State Outputs 10-Bit Buffers/Drivers with 3-State Outputs 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 9-Bit Bus-Interface D-Type Latches with 3-State Outputs 9-Bit Transparent Latches with 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs Octal Bus Transceivers with Series Damping Resistors and 3-State Outputs Octal Bus Transceivers with Series Damping Resistors and 3-State Outputs Octal Bus Transceivers with Series Damping Resistors and 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with Series Damping Resistors and 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Line Drivers/MOS Drivers with 3-State Outputs Octal Line Drivers/MOS Drivers with 3-State Outputs Octal Line Drivers/MOS Drivers with 3-State Outputs Octal Registered Transceivers with Series Damping Resistors and 3-State Outputs Octal Registered Transceivers with Series Damping Resistors and 3-State Outputs Octal Registered Transceivers with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SCCS033 SCHS264 SCHS265 SCCS033 SCCS033 SCCS033 SCHS265 SCCS033 SCCS034 SCCS034 SCHS266 SCCS035 SCCS035 SCCS035 SCHS267 SCHS267 SCHS295 SCCS036 SCCS036 SCCS036 SCCS036 SCCS036 SCCS036 SCCS037 SCCS037 SCCS037 SCCS038 SCCS038 SCCS039 SCCS039 SCCS039 SCCS040 SCCS040 SCCS040 SCCS041 SCCS041 SCCS041 SCCS042 SCCS042 SCCS042 SCCS039 SCCS039 SCCS039 SCCS040
572

DEVICE CY74FCT2574CT CY74FCT2574T CY74FCT2646AT CY74FCT2646CT CY74FCT2652AT CY74FCT2652CT CY74FCT2827AT CY74FCT2827CT CD74FCT2952A CY74FCT16240AT CY74FCT16240ET CY74FCT16244AT CY74FCT16244CT CY74FCT16244ET CY74FCT16244T CY74FCT16245AT CY74FCT16245CT CY74FCT16245ET CY74FCT16245T CY74FCT16373AT CY74FCT16373CT CY74FCT16373ET CY74FCT16374AT CY74FCT16374CT CY74FCT16374ET CY74FCT16374T CY74FCT16500CT CY74FCT16501AT CY74FCT16501ET CY74FCT16543AT CY74FCT16543CT CY74FCT16543ET CY74FCT16543T CY74FCT16646AT CY74FCT16646CT CY74FCT16646ET CY74FCT16646T CY74FCT16652AT CY74FCT16652CT CY74FCT16652ET CY74FCT16823AT CY74FCT16823CT CY74FCT16823ET CY74FCT16827AT CY74FCT16827CT NO. PINS 20 20 24 24 24 24 24 24 24 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 56 56 56 56 56 56 56 56 56 56 56 56 56 56 56 56 56 56 56 DESCRIPTION Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Transparent D-Type Latches with Series Damping Resistors and 3-State Outputs Octal Registered Bus Transceivers with Series Damping Resistors and 3-State Outputs Octal Registered Bus Transceivers with Series Damping Resistors and 3-State Outputs Octal Bus Transceivers and Registers with Series Damping Resistors and 3-State Outputs Octal Bus Transceivers and Registers with Series Damping Resistors and 3-State Outputs 10-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 10-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SCCS040 SCCS040 SCCS043 SCCS043 SCCS044 SCCS044 SCCS045 SCCS045 SCBS720 SCCS027 SCCS027 SCCS028 SCCS028 SCCS028 SCCS028 SCCS026 SCCS026 SCCS026 SCCS026 SCCS054 SCCS054 SCCS054 SCCS055 SCCS055 SCCS055 SCCS055 SCCS056 SCCS057 SCCS057 SCCS059 SCCS059 SCCS059 SCCS059 SCCS060 SCCS060 SCCS060 SCCS060 SCCS061 SCCS061 SCCS061 SCCS062 SCCS062 SCCS062 SCCS064 SCCS064
573

DEVICE CY74FCT16827ET CY74FCT16841AT CY74FCT16841CT CY74FCT16952AT CY74FCT16952CT CY74FCT16952ET CY74FCT162240CT CY74FCT162240ET CY74FCT162244AT CY74FCT162244CT CY74FCT162244ET CY74FCT162244T CY74FCT162H244AT CY74FCT162H244CT CY74FCT162H244ET CY74FCT162245AT CY74FCT162245CT CY74FCT162245ET CY74FCT162245T CY74FCT162H245AT CY74FCT162H245CT CY74FCT162H245ET CY74FCT162373AT CY74FCT162373CT CY74FCT162373ET CY74FCT162374AT CY74FCT162374CT CY74FCT162374ET CY74FCT162374T CY74FCT162500AT CY74FCT162500CT CY74FCT162501AT CY74FCT162501CT CY74FCT162501ET CY74FCT162H501CT CY74FCT162H501ET CY74FCT162543AT CY74FCT162543CT CY74FCT162543ET CY74FCT162543T CY74FCT162H543CT CY74FCT162646AT CY74FCT162646CT CY74FCT162646ET CY74FCT162652AT NO. PINS 56 56 56 56 56 56 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 48 56 56 56 56 56 56 56 56 56 56 56 56 56 56 56 56 DESCRIPTION 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Bu- Interface D-Type Latches with 3-State Outputs 20-Bit Bus-Interface D-Type Latches with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with Bus Hold and 3-State Outputs 16-Bit Buffers/Drivers with Bus Hold and 3-State Outputs 16-Bit Buffers/Drivers with Bus Hold and 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with Bus Hold and 3-State Outputs 16-Bit Bus Transceivers with Bus Hold and 3-State Outputs 16-Bit Bus Transceivers with Bus Hold and 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with Bus Hold and 3-State Outputs 18-Bit Universal Bus Transceivers with Bus Hold and 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with Bus Hold and 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SCCS064 SCCS067 SCCS067 SCCS065 SCCS065 SCCS065 SCCS027 SCCS027 SCCS028 SCCS028 SCCS028 SCCS028 SCCS028 SCCS028 SCCS028 SCCS026 SCCS026 SCCS026 SCCS026 SCCS026 SCCS026 SCCS026 SCCS054 SCCS054 SCCS054 SCCS055 SCCS055 SCCS055 SCCS055 SCCS056 SCCS056 SCCS057 SCCS057 SCCS057 SCCS057 SCCS057 SCCS059 SCCS059 SCCS059 SCCS059 SCCS059 SCCS060 SCCS060 SCCS060 SCCS061
574

DEVICE CY74FCT162652CT CY74FCT162652ET CY74FCT162823AT CY74FCT162823CT CY74FCT162823ET CY74FCT162827AT CY74FCT162827BT CY74FCT162827CT CY74FCT162827ET CY74FCT162841CT CY74FCT162952AT CY74FCT162952BT CY74FCT162952ET CY74FCT162H952AT CY74FCT162H952CT CY74FCT162H952ET CY74FCT163244A CY74FCT163244C CY74FCT163H244C CY74FCT163245A CY74FCT163245C CY74FCT163H245A CY74FCT163H245C CY74FCT163373C CY74FCT163374A CY74FCT163374C CY74FCT163H374C CY74FCT163500A CY74FCT163500C CY74FCT163501C CY74FCT163H501C CY74FCT163543A CY74FCT163543C CY74FCT163646C CY74FCT163652A CY74FCT163652C CY74FCT163827A CY74FCT163827C CY74FCT163952C CY74FCT163H952C NO. PINS 56 56 56 56 56 56 56 56 56 56 56 56 56 56 56 56 48 48 48 48 48 48 48 48 48 48 48 56 56 56 56 56 56 56 56 56 56 56 56 56 DESCRIPTION 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 18-Bit D-Type Flip-Flops with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Bus-Interface D-Type Latches with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with Bus Hold and 3-State Outputs 16-Bit Registered Transceivers with Bus Hold and 3-State Outputs 16-Bit Registered Transceivers with Bus Hold and 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with Bus Hold and 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with Bus Hold and 3-State Outputs 16-Bit Bus Transceivers with Bus Hold and 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with Bus Hold and 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with Bus Hold and 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 20-Bit Buffers/Drivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Registered Transceivers with Bus Hold and 3-State Outputs AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SCCS061 SCCS061 SCCS062 SCCS062 SCCS062 SCCS064 SCCS064 SCCS064 SCCS064 SCCS067 SCCS065 SCCS065 SCCS065 SCCS065 SCCS065 SCCS065 SCCS046 SCCS046 SCCS046 SCCS051 SCCS051 SCCS051 SCCS051 SCCS053 SCCS050 SCCS050 SCCS050 SCCS066 SCCS066 SCCS047 SCCS047 SCCS063 SCCS063 SCCS058 SCCS052 SCCS052 SCCS049 SCCS049 SCCS048 SCCS048
575
576
FIFO
First In, First Out Memories
Todays competitive environment creates a constant need for greater system performance. One common method to optimize system performance involves the use of a first in, first out (FIFO) memory to eliminate the data bottlenecks common between digital signal processors (DSPs), high-speed processors, industry-standard buses, memory devices, and analog front ends (AFEs). TI offers a wide range of FIFO devices designed for use in a variety of systems including real-time DSP applications, telecommunications, internetworking, instrumentation, and high-bandwidth computing. TIs high-performance FIFO products provide the speed and features necessary to enhance your systems performance. Visit the TI FIFO home page at http://www.ti.com/sc/fifo for a comprehensive overview of TIs FIFO product line, new product releases, data sheets, application reports, and pricing.
577
DEVICE SELECTION GUIDE FIFO

DEVICE NO. PINS CLOCK (MHz) DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP PLCC QFP TQFP
36-Bit Synchronous FIFOs SN74ABT3611 SN74ABT3613 SN74ABT3612 SN74ABT3614 SN74ACT3622 SN74ACT3631 SN74ACT3632 SN74ACT3641 SN74ACT3651 SN74ALVC3631 SN74ALVC3641 SN74ALVC3651 132, 120 132, 120 132, 120 132, 120 132, 120 132, 120 132, 120 132, 120 132, 120 132, 120 132, 120 132, 120 67 67 67 67 67 67 67 67 67 100 100 100 64 36 Synchronous FIFOs 64 36 Synchronous FIFOs 64 36 2 Synchronous Bidirectional FIFOs 64 36 2 Synchronous Bidirectional FIFOs 256 36 2 Synchronous Bidirectional FIFOs 512 36 Synchronous FIFOs 512 36 2 Synchronous Bidirectional FIFOs 1024 36 Synchronous FIFOs 2048 36 Synchronous FIFOs 512 36, 3.3-V Synchronous FIFOs 1024 36, 3.3-V Synchronous FIFOs 2048 36, 3.3-V Synchronous FIFOs 512 32 2 Synchronous Bidirectional FIFOs 64 18 Synchronous FIFOs 256 18 Synchronous FIFOs 512 18 Synchronous FIFOs 512 18 2 Synchronous Bidirectional FIFOs 1024 18 Synchronous FIFOs 1024 18 Synchronous FIFOs 2048 18 Synchronous FIFOs 64 18, 3.3-V Synchronous FIFOs 256 18, 3.3-V Synchronous FIFOs 512 18, 3.3-V Synchronous FIFOs SCBS127 SCBS128 SCBS129 SCBS126 SCAS247 SCAS246 SCAS224 SCAS338 SCAS439 SDMS025 SDMS025 SDMS025
32-Bit Synchronous FIFOs SN74ACT3638 132, 120 67 SCAS228
18-Bit Synchronous FIFOs SN74ACT7813 SN74ACT7805 SN74ACT7803 SN74ABT7819 SN74ACT7811 SN74ACT7881 SN74ACT7882 SN74ALVC7813 SN74ALVC7805 SN74ALVC7803 56 56 56 80 68, 80 68, 80 68, 80 56 56 56 67 67 67 100 67 67 67 50 50 50 SCAS199 SCAS201 SCAS191 SCBS125 SCAS151 SCAS227 SCAS445 SCAS594 SCAS593 SCAS436

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
578

DEVICE NO. PINS CLOCK (MHz) DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP PLCC QFP TQFP
18-Bit Asynchronous FIFOs SN74ACT7814 SN74ACT7806 SN74ACT7804 SN74ABT7820 SN74ACT7802 SN74ALVC7814 SN74ALVC7806 SN74ALVC7804 9-Bit FIFOs SN74ACT2235 SN74ACT7807 SN74ACT7808 44, 64 44, 64 44, 64 50 67 50 1024 9 2 Asynchronous Bidirectional FIFOs 2048 9 Synchronous FIFOs 2048 9 Asynchronous FIFOs 64 1 2 Independent Synchronous FIFOs 64 1 2 Independent Synchronous FIFOs 256 1 2 Independent Synchronous FIFOs 256 1 2 Independent Synchronous FIFOs 16 4 Synchronous FIFOs 16 4 Asynchronous FIFOs 16 4 Asynchronous FIFOs 16 4 Asynchronous FIFOs 16 4 Asynchronous FIFOs 16 4 Asynchronous FIFOs 16 5 Asynchronous FIFOs 16 5 Asynchronous FIFOs 16 5 Asynchronous FIFOs SCAS148 SCAS200 SCAS205 56 56 56 80 80 56 56 56 50 50 50 67 40 40 40 40 64 18 Asynchronous FIFOs 256 18 Asynchronous FIFOs 512 18 Asynchronous FIFOs 512 18 2 Asynchronous Bidirectional FIFOs 1024 18 Asynchronous FIFOs 64 18, 3.3-V Asynchronous FIFOs 256 18, 3.3-V Asynchronous FIFOs 512 18, 3.3-V Asynchronous FIFOs SCAS209 SCAS438 SCAS204 SCAS206 SCAS187 SCAS592 SCAS591 SCAS437
1-Bit Telecommunication FIFOs SN74ACT2226 SN74ACT2227 SN74ACT2228 SN74ACT2229 Mature Products SN74LS224A SN74ALS232B SN74ALS236 CD40105B CD74HC40105 CD74HCT40105 SN74S225 SN74ALS229B SN74ALS233B 16 16, 16, 20 16 16 16 16 20 20 20 10 40 30 3 12 12 10 40 40 SDLS023 SCAS251 SDAS107 SCHS096 SCHS222 SCHS222 SDLS207 SDAS090 SCAS253 24 28 24 28 22 60 22 60 SCAS219 SCAS220 SCAS219 SCAS220
579
580
GTL
Gunning Transceiver Logic

GTL devices are high-speed transceivers operating at LVTTL logic levels on the card and at GTL/GTL+ signal levels on the backplane. The devices are designed with faster edge rates for applications in which the backplane length/number of slots is limited, and hot insertion is not a requirement. GTL devices are best suited for use in point-to-point applications or in lightly loaded backplanes. The devices operate at the JEDEC JESD8-3 GTL or at the higher threshold-voltage/lower noise-margin GTL+ signal levels. Use GTLP devices in applications that require a slower edge rate. GTL family features:
3.3-V or 3.3-/5-V VCC operation with 5-V-tolerant LVTTL I/Os (except GTL1655) permits the devices to act as 5-V CMOS/TTL or 3.3-V LVTTL-to-GTL+/GTL and GTL+/GTL-to-3.3-V LVTTL translators. Output edge control (OEC) reduces line reflections, electromagnetic interference (EMI), and improves overall signal integrity. B-port drive of 50 mA and 100 mA (GTL1655 only) allows the designer flexibility in matching the device to the application. Ioff circuitry prevents damage during partial power-down situations. Power-up 3-state (PU3S) and BIAS VCC circuitry (GTL1655 only) permit true live-insertion capability. Bus-hold circuitry (A port only) eliminates floating inputs by holding them at the last valid logic state. No external pullup or pulldown resistors are needed for unused or undriven inputs, which reduces power, cost, and board layout time. There is no bus-hold circuitry on the B port (GTL/GTL+ side) because this would defeat the purpose of the open-drain output that takes on the high-impedance state to allow the bus to be pulled to the logic high state via the termination resistors.
See http://www.ti.com/sc/gtl for further information. TI provides a wide range of design assistance, including application support, application reports, free samples, demonstration backplane, and HSPICE/IBIS simulation models.
581
DEVICE SELECTION GUIDE GTL

DEVICE SN74GTL1655 SN54GTL16612 SN74GTL16616 SN74GTL16622A SN74GTL16923 NO. PINS 64 56 56 64 64 DESCRIPTION 16-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers with Live Insertion 18-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers 17-Bit LVTTL-to-GTL/GTL+ Universal Bus Transceivers with Buffered Clock Outputs 18-Bit LVTTL-to-GTL/GTL+ Registered Bus Transceivers 18-Bit LVTTL-to-GTL/GTL+ Registered Bus Transceivers AVAILABILITY
MIL SSOP TSSOP
LITERATURE REFERENCE SCBS696 SCBS480 SCBS481 SCBS673 SCBS674

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
582
GTLP
Gunning Transceiver Logic Plus

GTLP devices are high-speed CMOS transceivers specifically designed for heavily loaded parallel backplane applications. The reduced output swing (<1 V), reduced input threshold levels, differential input, and output edge control OEC and TI-OPC overshoot protection circuitry on the GTLP rising and falling edges reduces EMI and improves overall signal integrity, allowing higher backplane clock frequencies. This increases the bandwidth for manufacturers developing improved data-communication solutions. GTLP solves high-performance parallel backplane designers needs:
Offers higher backplane speeds (60 MHz to 125 MHz) for increased data-throughput requirements, lower EMI, and lower power consumption. Ioff, power-up 3-state (PU3S), and BIAS VCC circuitry support true live-insertion capability for easy internal precharging of the backplane I/O pins for applications in which active backplane data cannot be suspended or disturbed during card insertion or removal. Compatible with existing parallel backplane technologies (i.e., ABT and LVT), GTLP provides an alternative to more complex serial technologies.
GTLP family features:
3.3-V VCC with 5-V-tolerant LVTTL I/Os permits GTLP devices to act as 5-V CMOS, TTL, or LVTTL-to-GTLP and GTLP-to-LVTTL translators. A-port (LVTTL side) balanced drive of 24 mA B-port (GTLP side) open drain sinks either 50 mA or 100 mA of current, allowing the designer flexibility in matching the best device to backplane length, slot spacing, and termination resistance. Edge-rate control (ERC) circuitry allows either fast or slow edge rates. One-third the static power consumption of BiCMOS logic devices A-port bus-hold circuitry (GTLPH only) eliminates floating inputs by holding them at the last valid logic state.
See http://www.ti.com/sc/gtlp for further information. TI provides a wide range of design assistance, including application reports and support, free samples, demonstration backplane, and HSPICE/IBIS simulation models.
583
Migration Path From GTLPH16912

MEDIUM-DRIVE UNIVERSAL BUS TRANSCEIVER 16601 Pinout 18 Bits With OE, LE, CLK, and CE Controls High Drive
GTLPH32916
2 18 Bits
GTLPH16916
GTLPH1616
1-Bit Buffered Clock
Buffered clock supports source-synchronous applications High Drive
GTLPH32912
2 18 Bits
GTLPH16912
GTLPH1612
3.3-V and 5-V VCC
2 8 Bits Without CE
GTLPH16612
GTLPH1655
Migration Path From GTLPH16945

MEDIUM-DRIVE BUS TRANSCEIVER 16245 Pinout 2 8 Bits With Separate DIR and OE Controls Supports 1394 backplane PHY and clock signal applications
GTLPH306
GTLP1394
8 Bits High Drive 4 8 Bits
2 Bits, 3 Wire
GTLPH32945
GTLPH16945
GTLPH1645
4 8 Bits
GTLPH3245
584
DEVICE SELECTION GUIDE GTLP

DEVICE SN74GTLPH306 SN74GTLP817 SN74GTLP1394 SN74GTLPH1612 SN74GTLPH1616 SN74GTLPH1645 SN74GTLPH1655 SN74GTLPH3245 SN74GTLPH16612 SN74GTLPH16912 SN74GTLPH16916 SN74GTLPH16945 SN74GTLPH32945 NO. PINS 24 24 16 64 64 56 64 114 56 56 56 48 96 DESCRIPTION 8-Bit LVTTL-to-GTLP Bus Transceivers GTLP-to-LVTTL 1-to-6 Fanout Drivers 2-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceivers with Selectable Parity 18-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Bus Transceivers 17-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Bus Transceivers with Buffered Clock 16-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceivers 16-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Universal Bus Transceivers 32-Bit LVTTL-to-GTLP Adjustable-Edge-Rate Bus Transceivers 18-Bit LVTTL to GTLP Universal Bus Transceivers 18-Bit LVTTL-to-GTLP Universal Bus Transceivers 17-Bit LVTTL-to-GTLP Universal Bus Transceivers with Buffered Clock 16-Bit LVTTL-to-GTLP Bus Transceivers 32-Bit LVTTL-to-GTLP Bus Transceivers ' ' ' ' ' ' ' ' AVAILABILITY
LFBGA SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCES284 SCES285 SCES286 SCES287 Call
' ' '
' ' ' ' ' ' '
' ' '
'
SCES290 SCES294 SCES291 SCES326 SCES288 Call SCES292 SCES293



PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins

FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
585
SN74GTLP1394
Specifically designed for use with the Texas Instruments TSB14C01A 1394 backplane layer controller family to transmit 1394 backplane serial bus across parallel backplanes
The 1394 backplane serial
bus plays a supportive role in backplane systems, providing a means for diagnostics, system enhancement, and peripheral monitoring. 64-Bit Data Bus
GTLP1394 Transceiver TSB14C01A
32- to 64-Bit Address Bus
High-performance, multi-slot,
parallel-backplane-optimized GTLP edge rates easily support data transfer rates of 25 Mbps (S25), 50 Mbps (S50), and 100 Mbps (S100).
Termination Backplane Trace Connector VME / FB+ / CPCI or GTLP Transceiver
GTLP vs LVDS solutions Single-chip solution Easier to implement GTLP vs BTL/FB+ solutions Better signal integrity More cost effective Less power consumption
STRB
DATA
VTT
$ < $ <
RTT
%
%
VTT SN74GTLP1394 main features include:

3.3 V 2.4 2.0 1.5 0.8 0.4 0 VCC VOH VIH Vt VIL VOL GND
z z z z z z z
LVTTL to GTLP bidirectional translator High GTLP drive (100 mA) TI-OPCTM overshoot protection circuitry BIAS VCC supports true live insertion. 3.3-V VCC with 5-V tolerance $3.75 in lots of 1000 16-pin SOIC (D & DR), TSSOP (PWR), and TVSOP (DGVR) packages
VREF 100 MHz

1.5V 1.05 1.00 0.95 0.55 VOH, VTT VIH Vt, VREF VIL VOL
LVTTL
GTLP
www.ti.com/sc/1394
586
www.ti.com/sc/gtlp
HC/HCT
High Speed CMOS Logic
TI offers a full family of HC/HCT devices for low-power, medium- to low-speed applications. The recent addition of products acquired from Harris Semiconductor has added a wide range of additional functions. Over 250 HC and HCT device types are available, including gates, latches, flip-flops, buffers/drivers, counters, multiplexers, transceivers, and registered transceivers. The HC/HCT family is a popular, reliable logic family with 6-mA output current drive at 5-V VCC (HC/HCT) and 20-A output current drive 3.3-V VCC (HC only). The HC family offers CMOS inputs and outputs, while the HCT family offers TTL inputs with CMOS outputs. See www.ti.com/sc/logic for the most current data sheets.
587
DEVICE SELECTION GUIDE HC

DEVICE CD74HC00 SN74HC00 CD74HC02 SN74HC02 CD74HC03 SN74HC03 CD74HC04 SN74HC04 CD74HCU04 SN74HCU04 SN74HC05 CD74HC08 SN74HC08 CD74HC10 SN74HC10 CD74HC11 SN74HC11 CD74HC14 SN74HC14 CD74HC20 SN74HC20 CD74HC21 SN74HC21 CD74HC27 SN74HC27 CD74HC30 CD74HC32 SN74HC32 CD74HC42 SN74HC42 CD74HC73 CD74HC74 SN74HC74 CD74HC75 CD74HC85 NO. PINS 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 16 14 14 14 16 16 Quad 2-Input NAND Gates Quad 2-Input NAND Gates Quad 2-Input NOR Gates Quad 2-Input NOR Gates Quad 2-Input NAND Gates with Open-Drain Outputs Quad 2-Input NAND Gates with Open-Drain Outputs Hex Inverters Hex Inverters Hex Unbuffered Inverters Hex Unbuffered Inverters Hex Inverters with Open-Drain Outputs Quad 2-Input AND Gates Quad 2-Input AND Gates Triple 3-Input NAND Gates Triple 3-Input NAND Gates Triple 3-Input AND Gates Triple 3-Input AND Gates Hex Schmitt-Trigger Inverters Hex Schmitt-Trigger Inverters Dual 4-Input NAND Gates Dual 4-Input NAND Gates Dual 4-Input AND Gates Dual 4-Input AND Gates Triple 3-Input NOR Gates Triple 3-Input NOR Gates 8-Input NAND Gates Quad 2-Input OR Gates Quad 2-Input OR Gates 4-Line BCD-to-10-Line Decimal Decoders 4-Line BCD-to-10-Line Decimal Decoders Dual J-K Edge-Triggered Flip-Flops with Reset Dual D-Type Flip-Flops with Set and Reset Dual D-Type Flip-Flops with Set and Reset Dual 2-Bit Bistable Transparent Latches 4-Bit Magnitude Comparators DESCRIPTION AVAILABILITY
LITERATURE REFERENCE SCHS116 SCLS181 SCHS125 SCLS076 SCHS126 SCLS077 SCHS117 SCLS078 SCHS127 SCLS079 SCLS080 SCHS118 SCLS081 SCHS128 SCLS083 SCHS273 SCLS084 SCHS129 SCLS085 SCHS130 SCLS086 SCHS131 SCLS087 SCHS132 SCLS088 SCHS121 SCHS274 SCLS200 SCHS133 SCLS091 SCHS134 SCHS124 SCLS094 SCHS135 SCHS136

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
See Appendix A for package information on CD54/74HC devic
588

DEVICE CD74HC86 SN74HC86 CD74HC93 CD74HC107 CD74HC109 SN74HC109 CD74HC112 SN74HC112 CD74HC123 CD74HC125 SN74HC125 CD74HC126 SN74HC126 CD74HC132 SN74HC132 CD74HC137 CD74HC138 SN74HC138 CD74HC139 SN74HC139 CD74HC147 SN74HC148 CD74HC151 SN74HC151 CD74HC153 SN74HC153 CD74HC154 CD74HC157 SN74HC157 CD74HC158 SN74HC158 CD74HC161 SN74HC161 CD74HC163 SN74HC163 CD74HC164 SN74HC164 CD74HC165 SN74HC165 CD74HC166 SN74HC166 CD74HC173 CD74HC174 SN74HC174 NO. PINS 14 14 14 14 16 16 16 16 16 14 14 14 14 14 14 16 16 16 16 16 16 16 16 16 16 16 24 16 16 16 16 16 16 16 16 14 14 16 16 16 16 16 16 16 DESCRIPTION Quad 2-Input Exclusive-OR Gates Quad 2-Input Exclusive-OR Gates 4-Bit Binary Ripple Counters Dual Negative-Edge-Triggered J-K Flip-Flops with Reset Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset Dual Retriggerable Monostable Multivibrators with Reset Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Quad 2-Input NAND Gates with Schmitt-Trigger Inputs Quad 2-Input NAND Gates with Schmitt-Trigger Inputs 3-to-8 Line Decoders/Demultiplexers with Address Latches 3-to-8 Line Inverting Decoders/Demultiplexers 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers 10-to-4 Line Priority Encoders 8-to-3 Line Priority Encoders 1-of-8 Data Selectors/Multiplexers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers 4-to-16 Line Decoders/Demultiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters 8-Bit Serial-In, Parallel-Out Shift Registers 8-Bit Serial-In, Parallel-Out Shift Registers 8-Bit Parallel-In, Serial-Out Shift Registers 8-Bit Parallel-In, Serial-Out Shift Registers 8-Bit Parallel-Load Shift Registers 8-Bit Parallel-Load Shift Registers Quad D-Type Flip-Flops with 3-State Outputs Hex D-Type Flip-Flops with Clear Hex D-Type Flip-Flops with Clear AVAILABILITY
LITERATURE REFERENCE SCHS137 SCLS100 SCHS138 SCHS139 SCHS140 SCLS098 SCHS141 SCLS099 SCHS142 SCHS143 SCLS104 SCHS144 SCLS103 SCHS145 SCLS034 SCHS146 SCHS147 SCLS107 SCHS148 SCLS108 SCHS149 SCLS109 SCHS150 SCLS110 SCHS151 SCLS112 SCHS152 SCHS153 SCLS113 SCHS153 SCLS296 SCHS154 SCLS297 SCHS154 SCLS298 SCHS155 SCLS115 SCHS156 SCLS116 SCHS157 SCLS117 SCHS158 SCHS159 SCLS119
589

DEVICE CD74HC175 SN74HC175 CD74HC190 CD74HC191 SN74HC191 CD74HC192 CD74HC193 SN74HC193 CD74HC194 CD74HC195 CD74HC221 CD74HC237 CD74HC238 CD74HC240 SN74HC240 SN74HC240A CD74HC241 SN74HC241 CD74HC243 CD74HC244 SN74HC244 CD74HC245 SN74HC245 CD74HC251 SN74HC251 CD74HC253 SN74HC253 CD74HC257 SN74HC257 CD74HC258 SN74HC258 CD74HC259 SN74HC259 SN74HC266 CD74HC273 SN74HC273 CD74HC280 CD74HC283 CD74HC297 CD74HC299 CD74HC354 CD74HC365 SN74HC365 CD74HC366 NO. PINS 16 16 16 16 16 16 16 16 16 16 16 16 16 20 20 20 20 20 14 20 20 20 20 16 16 16 16 16 16 16 16 16 16 14 20 20 14 16 16 20 20 16 16 16 DESCRIPTION Quad D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear Presettable Synchronous 4-Bit Up/Down BCD Decade Counters Presettable Synchronous 4-Bit Up/Down Binary Counters Presettable Synchronous 4-Bit Up/Down Binary Counters BCD Presettable Synchronous 4-Bit Up/Down Decade Counters Presettable Synchronous 4-Bit Up/Down Binary Counters Presettable Synchronous 4-Bit Up/Down Binary Counters 4-Bit Bi-directional Universal Shift Registers 4-Bit Parallel Access Shift Registers Dual Monostable Multivibrators with Schmitt-Trigger Inputs 3-to-8 Line Decoders/Demultiplexers with Address Latches 3-to-8 Line Decoders/Demultiplexers Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Quad Bus-Transceivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs 1-of-8 Data Selectors/Multiplexers with 3-State Outputs 1-of-8 Data Selectors/Multiplexers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs 8-Bit Addressable Latches 8-Bit Addressable Latches Quad 2-Input Exclusive-NOR Gates with Open-Drain Outputs Octal D-Type Flip-Flops with Clear Octal D-Type Flip-Flops with Clear 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Binary Full Adders with Fast Carry Digital Phase-Locked Loops 8-Bit Universal Shift/Storage Registers 8-Line to 1-Line Data Selectors/Multiplexers/Registers Hex Buffers/Line Drivers with 3-State Outputs Hex Buffers/Line Drivers with 3-State Outputs Hex Inverting Buffers/Line Drivers with 3-State Outputs AVAILABILITY
LITERATURE REFERENCE SCHS160 SCLS299 SCHS275 SCHS162 SCLS121 SCHS163 SCHS163 SCLS122 SCHS164 SCHS165 SCHS166 SCHS146 SCHS147 SCHS167 SCLS128 Call SCHS167 SCLS300 SCHS168 SCHS167 SCLS130 SCHS119 SCLS131 SCHS169 SCLS132 SCHS170 SCLS133 SCHS171 SCLS224 SCHS276 SCLS224 SCHS173 SCLS134 SCLS135 SCHS174 SCLS136 SCHS175 SCHS176 SCHS177 SCHS178 SCHS179 SCHS180 SCLS308 SCHS180
590

DEVICE CD74HC367 SN74HC367 CD74HC368 SN74HC368 CD74HC373 SN74HC373 CD74HC374 SN74HC374 CD74HC377 SN74HC377 CD74HC390 CD74HC393 SN74HC393 CD74HC423 CD74HC533 CD74HC534 CD74HC540 SN74HC540 CD74HC541 SN74HC541 CD74HC563 SN74HC563 CD74HC564 CD74HC573 SN74HC573A CD74HC574 SN74HC574 SN74HC590A SN74HC594 SN74HC595 CD74HC597 SN74HC623 CD74HC640 SN74HC640 SN74HC645 CD74HC646 SN74HC646 CD74HC652 SN74HC652 CD74HC670 SN74HC682 SN74HC684 CD74HC688 SN74HC688 NO. PINS 16 16 16 16 20 20 20 20 20 20 16 14 14 16 20 20 20 20 20 20 20 20 20 20 20 20 20 16 16 16 16 20 20 20 20 24 24 24 24 16 20 20 20 20 DESCRIPTION Hex Buffers/Line Drivers with 3-State Outputs Hex Buffers/Line Drivers with 3-State Outputs Hex Inverting Buffers/Line Drivers with 3-State Outputs Hex Inverting Buffers/Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Octal D-Type Flip-Flops with Enable Octal D-Type Flip-Flops with Enable Dual 4-Bit Decade Counters Dual 4-Bit Binary Counters Dual 4-Bit Binary Counters Dual Retriggerable Monostable Multivibrators with Reset Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal D-Type Inverting Flip-Flops with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 8-Bit Binary Counters with 3-State Output Registers 8-Bit Shift Registers with Output Registers 8-Bit Shift Registers with 3-State Output Registers 8-Bit Shift Registers with Input Latches Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs 4-by-4 Register Files with 3-State Outputs 8-Bit Magnitude Comparators 8-Bit Magnitude Comparators 8-Bit Magnitude Comparators 8-Bit Magnitude Comparators AVAILABILITY
LITERATURE REFERENCE SCHS181 SCLS309 SCHS181 SCLS310 SCHS182 SCLS140 SCHS183 SCLS141 SCHS184 SCLS307 SCHS185 SCHS186 SCLS143 SCHS142 SCHS187 SCHS188 SCHS189 SCLS007 SCHS189 SCLS305 SCHS187 SCLS145 SCHS188 SCHS182 SCLS147 SCHS183 SCLS148 SCLS039 SCLS040 SCLS041 SCHS191 SCLS149 SCHS192 SCLS303 SCLS304 SCHS193 SCLS150 SCHS194 SCLS151 SCHS195 SCLS018 SCLS340 SCHS196 SCLS010
591

DEVICE CD74HC4002 CD74HC4015 CD74HC4016 CD74HC4017 CD74HC4020 SN74HC4020 CD74HC4024 CD74HC4040 SN74HC4040 CD74HC4046A CD74HC4049 CD74HC4050 CD74HC4051 CD74HC4052 CD74HC4053 CD74HC4059 CD74HC4060 SN74HC4060 CD74HC4066 SN74HC4066 CD74HC4067 CD74HC4075 CD74HC4094 CD74HC4316 CD74HC4351 CD74HC4352 CD74HC4511 CD74HC4514 CD74HC4515 CD74HC4518 CD74HC4520 CD74HC4538 CD74HC4543 SN74HC7001 SN74HC7002 SN74HC7032 CD74HC7046A CD74HC7266 CD74HC40103 NO. PINS 14 16 14 16 16 16 14 16 16 16 16 16 16 16 16 24 16 16 14 14 24 14 16 16 20 20 16 24 24 16 16 16 16 14 14 14 16 14 16 Dual 4-Input NOR Gates Dual 4-Stage Static Shift Registers Quad Bilateral Switches Decade Counters/Dividers with 1-of-10 Decoded Outputs 12-Stage Ripple-Carry Binary Counters/Dividers 12-Stage Ripple-Carry Binary Counters/Dividers 7-Stage Ripple-Carry Binary Counters/Dividers 12-Stage Ripple-Carry Binary Counters/Dividers 12-Stage Ripple-Carry Binary Counters/Dividers Micropower Phase-Locked Loops with VCO Hex Buffers/Converters Hex Buffers/Converters 8-Channel Analog Multiplexers/Demultiplexers with Logic Level Conversion Dual 4-Channel Analog Multiplexers/Demultiplexers with Logic Level Conversion Triple 2-Channel Analog Multiplexers/Demultiplexers with Logic Level Conversion Programmable Divide-by-N Counters 14-Stage Binary-Ripple Counters/Dividers and Oscillators 14-Stage Binary-Ripple Counters/Dividers and Oscillators Quad Bilateral Switches Quad Bilateral Switches Single 16-Channel Analog Multiplexers/Demultiplexers Triple 3-Input OR Gates 8-Stage Shift-and-Store Bus Registers Quad Analog Switches with Level Translation Analog 1-of-8 Multiplexers/Demultiplexers with Latch Analog Dual 1-of-4 Multiplexers/Demultiplexers with Latch BCD to 7-Segment Latch Decoder Drivers 4-Bit Latches/4-to-16 Line Decoders 4-Bit Latches/4-to-16 Line Decoders Dual BCD Up Counters Dual Binary Up Counters Dual Retriggerable Precision Monostable Multivibrators BCD to 7-Segment Latches/Decoders/Drivers for Liquid-Crystal Displays Quad 2-Input AND Gates with Schmitt-Trigger Inputs Quad 2-Input NOR Gates with Schmitt-Trigger Inputs Quad 2-Input OR Gates with Schmitt-Trigger Inputs Phase-Locked Loops with VCO and Lock Detector Quad 2-Input Exclusive NOR Gates 8-Bit Binary Presettable Synchronous Down Counters DESCRIPTION AVAILABILITY
LITERATURE REFERENCE SCHS197 SCHS198 SCHS199 SCHS200 SCHS201 SCLS158 SCHS202 SCHS203 SCLS160 SCHS204 SCHS205 SCHS205 SCHS122 SCHS122 SCHS122 SCHS206 SCHS207 SCLS161 SCHS208 SCLS325 SCHS209 SCHS210 SCHS211 SCHS212 SCHS213 SCHS213 SCHS214 SCHS215 SCHS215 SCHS216 SCHS216 SCHS123 SCHS217 SCLS035 SCLS033 SCLS036 SCHS218 SCHS219 SCHS221
592
DEVICE SELECTION GUIDE HCT

DEVICE CD74HCT00 SN74HCT00 CD74HCT02 SN74HCT02 CD74HCT03 CD74HCT04 SN74HCT04 CD74HCT08 SN74HCT08 CD74HCT10 CD74HCT11 CD74HCT14 SN74HCT14 CD74HCT20 CD74HCT21 CD74HCT27 CD74HCT30 CD74HCT32 SN74HCT32 CD74HCT42 CD74HCT73 CD74HCT74 SN74HCT74 SN74HCT74A CD74HC75 CD74HCT85 CD74HCT86 CD74HCT93 CD74HCT107 CD74HCT109 CD74HCT112 CD74HCT123 CD74HCT125 SN74HCT125 CD74HCT126 NO. PINS 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 14 14 14 14 16 16 14 14 14 16 16 16 14 14 14 Quad 2-Input NAND Gates Quad 2-Input NAND Gates Quad 2-Input NOR Gates Quad 2-Input NOR Gates Quad 2-Input NAND Gates with Open-Drain Outputs Hex Inverters Hex Inverters Quad 2-Input AND Gates Quad 2-Input AND Gates Triple 3-Input NAND Gates Triple 3-Input AND Gates Hex Schmitt-Trigger Inverters Hex Schmitt-Trigger Inverters Dual 4-Input NAND Gates Dual 4-Input AND Gates Triple 3-Input NOR Gates 8-Input NAND Gates Quad 2-Input OR Gates Quad 2-Input OR Gates 4-Line BCD-to-10-Line Decimal Decoders Dual J-K Edge-Triggered Flip-Flops with Reset Dual D-Type Flip-Flops with Set and Reset Dual D-Type Flip-Flops with Set and Reset Dual D-Type Flip-Flops with Set and Reset Dual 2-Bit Bistable Transparent Latches 4-Bit Magnitude Comparators Quad 2-Input Exclusive-OR Gates 4-Bit Binary Ripple Counters Dual Negative-Edge-Triggered J-K Flip-Flops with Reset Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset Dual Retriggerable Monostable Multivibrators with Reset Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs DESCRIPTION AVAILABILITY
LITERATURE REFERENCE SCHS116 SCLS062 SCHS125 SCLS065 SCHS126 SCHS117 SCLS042 SCHS118 SCLS063 SCHS128 SCHS273 SCHS129 SCLS225 SCHS130 SCHS131 SCHS132 SCHS121 SCHS274 SCLS064 SCHS133 SCHS134 SCHS124 SCLS169 Call SCHS135 SCHS136 SCHS137 SCHS138 SCHS139 SCHS140 SCHS141 SCHS142 SCHS143 SCLS069 SCHS144



PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins

FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
See Appendix A for package information on CD54/74HCT devices.
593

DEVICE CD74HCT132 CD74HCT137 CD74HCT138 SN74HCT138 CD74HCT139 SN74HCT139 CD74HCT147 CD74HCT151 CD74HCT153 CD74HCT154 CD74HCT157 SN74HCT157 CD74HCT158 CD74HCT161 CD74HCT163 CD74HCT164 CD74HCT165 CD74HCT166 CD74HCT173 CD74HCT174 CD74HCT175 CD74HCT191 CD74HCT193 CD74HCT194 CD74HCT221 CD74HCT237 CD74HCT238 CD74HCT240 SN74HCT240 CD74HCT241 CD74HCT243 CD74HCT244 SN74HCT244 CD74HCT245 SN74HCT245 CD74HCT251 CD74HCT253 CD74HCT257 SN74HCT257 CD74HCT258 CD74HCT259 CD74HCT273 SN74HCT273 CD74HCT280 NO. PINS 14 16 16 16 16 16 16 16 16 24 16 16 16 16 16 14 16 16 16 16 16 16 16 16 16 16 16 20 20 20 14 20 20 20 20 16 16 16 16 16 16 20 20 14 DESCRIPTION Quad 2-Input NAND Gates with Schmitt-Trigger Inputs 3-to-8 Line Decoders/Demultiplexers with Address Latches 3-to-8 Line Inverting Decoders/Demultiplexers 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers 10-to-4 Line Priority Encoders 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers 4-to-16 Line Decoders/Demultiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters 8-Bit Serial-In, Parallel-Out Shift Registers 8-Bit Parallel-In, Serial-Out Shift Registers 8-Bit Parallel-Load Shift Registers Quad D-Type Flip-Flops with 3-State Outputs Hex D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear Presettable Synchronous 4-Bit Up/Down Binary Counters Presettable Synchronous 4-Bit Up/Down Binary Counters 4-Bit Bi-directional Universal Shift Registers Dual Monostable Multivibrators with Schmitt-Trigger Inputs 3-to-8 Line Decoders/Demultiplexers with Address Latches 3-to-8 Line Decoders/Demultiplexers Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Quad Bus-Transceivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs 1-of-8 Data Selectors/Multiplexers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs 8-Bit Addressable Latches Octal D-Type Flip-Flops with Clear Octal D-Type Flip-Flops with Clear 9-Bit Odd/Even Parity Generators/Checkers AVAILABILITY
LITERATURE REFERENCE SCHS145 SCHS146 SCHS147 SCLS171 SCHS148 SCLS066 SCHS149 SCHS150 SCHS151 SCHS152 SCHS153 SCLS071 SCHS153 SCHS154 SCHS154 SCHS155 SCHS156 SCHS157 SCHS158 SCHS159 SCHS160 SCHS162 SCHS163 SCHS164 SCHS166 SCHS146 SCHS147 SCHS167 SCLS174 SCHS167 SCHS168 SCHS167 SCLS175 SCHS119 SCLS020 SCHS169 SCHS170 SCHS171 SCLS072 SCHS172 SCHS173 SCHS174 SCLS068 SCHS175
594

DEVICE CD74HCT283 CD74HCT297 CD74HCT299 CD74HCT354 CD74HCT356 CD74HCT365 CD74HCT367 CD74HCT368 CD74HCT373 SN74HCT373 CD74HCT374 SN74HCT374 CD74HCT377 SN74HCT377 CD74HCT390 CD74HCT393 CD74HCT423 CD74HCT533 CD74HCT534 CD74HCT540 SN74HCT540 CD74HCT541 SN74HCT541 CD74HCT563 CD74HCT564 CD74HCT573 SN74HCT573 CD74HCT574 SN74HCT574 CD74HCT597 SN74HCT623 CD74HCT640 SN74HCT645 CD74HCT646 SN74HCT646 CD74HCT652 SN74HCT652 CD74HCT670 CD74HCT688 CD74HCT4020 CD74HCT4024 CD74HCT4040 CD74HCT4046A CD74HCT4051 NO. PINS 16 16 20 20 20 16 16 16 20 20 20 20 20 20 16 14 16 20 20 20 20 20 20 20 20 20 20 20 20 16 20 20 20 24 24 24 24 16 20 16 14 16 16 16 DESCRIPTION 9-Bit Binary Full Adders with Fast Carry Digital Phase-Locked Loops 8-Bit Universal Shift/Storage Registers 8-Line to 1-Line Data Selectors/Multiplexers/Registers 8-Line to 1-Line Data Selectors/Multiplexers/Registers Hex Buffers/Line Drivers with 3-State Outputs Hex Buffers/Line Drivers with 3-State Outputs Hex Inverting Buffers/Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal D-Type Flip-Flops with Enable Octal D-Type Flip-Flops with Enable Dual 4-Bit Decade Counters Dual 4-Bit Binary Counters Dual Retriggerable Monostable Multivibrators with Reset Octal Inverting Transparent Latches with 3-State Outputs Octal Inverting D-Type Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Inverting Transparent Latches with 3-State Outputs Octal Inverting D-Type Flip-Flops with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 8-Bit Shift Registers with Input Latches Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs 4-by-4 Register Files with 3-State Outputs 8-Bit Magnitude Comparators 12-Stage Ripple-Carry Binary Counters/Dividers 7-Stage Ripple-Carry Binary Counters/Dividers 12-Stage Ripple-Carry Binary Counters/Dividers Micropower Phase-Locked Loops with VCO 8-Channel Analog Multiplexers/Demultiplexers with Logic Level Conversion AVAILABILITY
LITERATURE REFERENCE SCHS176 SCHS177 SCHS178 SCHS179 SCHS277 SCHS180 SCHS181 SCHS181 SCHS182 SCLS009 SCHS183 SCLS005 SCHS184 SCLS067 SCHS185 SCHS186 SCHS142 SCHS187 SCHS188 SCHS189 SCLS008 SCHS189 SCLS306 SCHS187 SCHS188 SCHS182 SCLS176 SCHS183 SCLS177 SCHS191 SCLS016 SCHS192 SCLS019 SCHS278 SCLS178 SCHS194 SCLS179 SCHS195 SCHS196 SCHS201 SCHS202 SCHS203 SCHS204 SCHS122
595

DEVICE CD74HCT4052 CD74HCT4053 CD74HCT4060 CD74HCT4066 CD74HCT4067 CD74HCT4075 CD74HCT4094 CD74HCT4316 CD74HCT4351 CD74HCT4511 CD74HCT4514 CD74HCT4520 CD74HCT4538 CD74HCT4543 CD74HCT7046A CD74HCT40103 NO. PINS 16 16 16 14 24 14 16 16 20 16 24 16 16 16 16 16 DESCRIPTION Dual 4-Channel Analog Multiplexers/Demultiplexers with Logic Level Conversion Triple 2-Channel Analog Multiplexers/Demultiplexers with Logic Level Conversion 14-Stage Binary-Ripple Counters/Dividers and Oscillators Quad Bilateral Switches Single 16-Channel Analog Multiplexers/Demultiplexers Triple 3-Input OR Gates 8-Stage Shift-and-Store Bus Registers Quad Analog Switches with Level Translation Analog 1-of-8 Multiplexers/Demultiplexers with Latch BCD to 7-Segment Latch Decoder Drivers 4-Bit Latches/4-to-16 Line Decoders Dual Binary Up Counters Dual Retriggerable Precision Monostable Multivibrators BCD to 7-Segment Latches/Decoders/Drivers for Liquid-Crystal Displays Phase-Locked Loops with VCO and Lock Detector 8-Bit Binary Presettable Synchronous Down Counters AVAILABILITY
LITERATURE REFERENCE SCHS122 SCHS122 SCHS207 SCHS208 SCHS209 SCHS210 SCHS211 SCHS212 SCHS213 SCHS279 SCHS280 SCHS216 SCHS123 SCHS281 SCHS218 SCHS221
596
IEEE Std 1149.1 (JTAG) Boundary Scan Logic

The IEEE Std 1149.1 (JTAG) boundary-scan logic family of octal, Widebus, and scan-support functions incorporates circuitry that allows these devices and the electronic systems in which they are used to be tested without reliance on traditional probing techniques. Bus-interface logic devices are available in BCT, ABT, and LVT technologies in 8-, 18-, and 20-bit options of the standard buffers, latches, and transceivers. The universal bus transceiver (UBT), which can functionally replace 50+ standard bus-interface devices, is featured at Widebus widths (18 bits and 20 bits). Package options for these devices include plastic dual in-line package (PDIP), small-outline integrated circuit (SOIC), shrink small-outline package (SSOP), thin shrink small-outline package (TSSOP), and thin quad flatpack (TQFP). The scan-support functions include devices for controlling the test bus, performing at-speed functional testing, and partitioning the scan path into smaller, more manageable segments. Over 40 devices, composed of a wide selection of BCT and ABT octals, ABT and LVT Widebus, and scan-support functions, are available. Bus-hold and series-damping-resistor features also are available. See www.ti.com/sc/jtag for the most current data sheets.
IEEE Std 1149.1 (JTAG) Boundary-Scan Logic
Octal
Widebus
Scan-Support Functions
BCT
ABT
ABT/ABTH
LVTH
ACT/ABT
LVT
H indicates bus hold
597
TI IEEE Std 1149.1 Compliant Device Family and Function Cross Reference
Octal Bus Interface Logic With JTAG Test Access Port (TAP)
FUNCTION 240 244 245 373 374 543 646 652 952
PACKAGE DW/NT DW/NT DW NT DW/NT DW/NT DL/DW DL/DW DL/DW DL/DW
PINS 24 24 24 24 24 24 28 28 28 28
BITS 8 8 8 8 8 8 8 8 8 8
ABT
BH
BCT SN74BCT8240A SN74BCT8244A
BH N N N N N N
R N N N N N N
SN74ABT8245
SN74BCT8245A SN74BCT8245A SN74BCT8373A SN74BCT8374A
SN74ABT8543 SN74ABT8646 SN74ABT8652 SN74ABT8952
N N N N
N N N N
TQFP Bus Interface Logic With JTAG TAP
FUNCTION 16646 16652 16501 16601
PACKAGE PM PM PM PM
PINS 64 64 64 64
BITS 29 29 29 20
ABT SN74ABTH18646 SN74ABTH18652 SN74ABTH18502 SN74ABTH18504
BH Y Y Y Y
R Y Y Y Y
LVT SN74LVTH18646A SN74LVTH18652A SN74LVTH18502A SN74LVTH18504A
BH Y Y Y Y
R Y Y Y Y
Widebus Bus Interface Logic With JTAG TAP
FUNCTION 16245 16640 16501 16601
PACKAGE DGG/DL DGG/DL DGG DGG
PINS 56 56 64 64
BITS 29 29 29 20
ABT SN74ABT18245A SN74ABT18640
BH N N
R N N
LVT
BH
SN74LVTH18512 SN74LVTH18514
JTAG Scan Support Products
B Y
Y P
FUNCTION 8980 8990 8996 8997
PACKAGE DW FN DW/PW DW/NT
PINS 24 44 24 28
ABT
BH
ACT SN74ACT8990
BH N N
R N N
LVT SN74LVT8980 SN74LVT8996
BH N N
R N N
Embedded Test Bus Controller SN74ABT8996 N N 10-Bit Addressable Scan Ports SN74ACT8997
Test Bus Controller Scan Path Linker
B = both non-bus-hold and bus-hold version BH = bus hold N = no P = preview R = series-damping-resistor option Y = yes
598
DEVICE SELECTION GUIDE IEEE STD 1149.1 (JTAG) BOUNDARY SCAN LOGIC
DEVICE SN74BCT8240A SN74BCT8244A SN74ABT8245 SN74BCT8245A SN74BCT8373A SN74BCT8374A SN74ABT8543 SN74ABT8646 SN74ABT8652 SN74ABT8952 SN74LVT8980 SN74ACT8990 SN74ABT8996 SN74LVT8996 SN74ACT8997 SN74ABT18245A SN74ABT18502 SN74ABT18502A SN74ABTH18502A SN74LVTH18502A SN74ABT18504 SN74ABTH18504A SN74LVTH18504A SN74LVT18512 SN74LVTH18512 SN74LVTH18514 SN74ABT18640 SN74ABT18646 SN74ABTH18646A SN74LVTH18646A SN74ABT18652 SN74ABTH18652A
NO. PINS 24 24 24 24 24 24 28 28 28 28 24 44 24 24 28 56 64 64 64 64 64 64 64 64 64 64 56 64 64 64 64 64
DESCRIPTION Scan Test Devices with Octal Buffers Scan Test Devices with Octal Buffers Scan Test Devices with Octal Transceivers Scan Test Devices with Octal Transceivers Scan Test Devices with Octal D-Type Latches Scan Test Devices with Octal Edge-Triggered D-Type Flip-Flops Scan Test Devices with Octal Registered Bus Transceivers Scan Test Devices with Octal Bus Transceivers and Registers Scan Test Devices with Octal Bus Transceivers and Registers Scan Test Devices with Octal Registered Bus Transceivers Scan Test Bus Controllers with 8-Bit Generic Host Interfaces Test Bus Controllers IEEE Std 1149.1 (JTAG) TAP Masters with 16-Bit Generic Host Interfaces 10-Bit Addressable Scan Ports Multidrop-Addressable IEEE Std 1149.1 (JTAG) TAP Transceivers 10-Bit Addressable Scan Ports Multidrop-Addressable IEEE Std 1149.1 (JTAG) TAP Transceivers Scan Path Linkers with 4-Bit Identification Buses Scan-Controlled IEEE Std 1149.1 (JTAG) TAP Concatenators Scan Test Devices with 18-Bit Bus Transceivers Scan Test Devices with 18-Bit Universal Bus Transceivers Scan Test Devices with 18-Bit Universal Bus Transceivers Scan Test Devices with 18-Bit Universal Bus Transceivers Scan Test Devices with 18-Bit Universal Bus Transceivers Scan Test Devices with 20-Bit Universal Bus Transceivers Scan Test Devices with 20-Bit Universal Bus Transceivers Scan Test Devices with 20-Bit Universal Bus Transceivers Scan Test Devices with 18-Bit Universal Bus Transceivers Scan Test Devices with 18-Bit Universal Bus Transceivers Scan Test Devices with 20-Bit Universal Bus Transceivers Scan Test Devices with 18-Bit Inverting Bus Transceivers Scan Test Devices with 18-Bit Transceivers and Registers Scan Test Devices with 18-Bit Transceivers and Registers Scan Test Devices with 18-Bit Transceivers and Registers Scan Test Devices with 18-Bit Transceivers and Registers Scan Test Devices with 18-Bit Transceivers and Registers
AVAILABILITY
MIL PDIP PLCC SOIC SSOP TQFP TSSOP
LITERATURE REFERENCE SCBS067 SCBS042 SCBS124 SCBS043 SCBS044 SCBS045 SCBS120 SCBS123 SCBS122 SCBS121 SCBS676 SCBS190 SCBS489 SCBS686 SCBS157 SCBS110 SCBS109 SCBS488 SCBS164 SCBS668 SCBS108 SCBS165 SCBS667 SCBS711 SCBS671 SCBS670 SCBS267 SCBS131 SCBS166 SCBS311 SCBS132 SCBS167



PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins

FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
599
DEVICE SELECTION GUIDE IEEE STD 1149.1 (JTAG) BOUNDARY SCAN LOGIC
DEVICE SN74LVTH18652A SN74ABTH182502A SN74LVTH182502A SN74ABTH182504A SN74LVTH182504A SN74LVTH182512 SN74ABTH182646A SN74LVTH182646A SN74ABTH182652A SN74LVTH182652A
NO. PINS 64 64 64 64 64 64 64 64 64 64
DESCRIPTION Scan Test Devices with 18-Bit Transceivers and Registers Scan Test Devices with 18-Bit Universal Bus Transceivers Scan Test Devices with 18-Bit Universal Bus Transceivers Scan Test Devices with 20-Bit Universal Bus Transceivers Scan Test Devices with 20-Bit Universal Bus Transceivers Scan Test Devices with 18-Bit Universal Bus Transceivers Scan Test Devices with 18-Bit Transceivers and Registers Scan Test Devices with 18-Bit Transceivers and Registers Scan Test Devices with 18-Bit Transceivers and Registers Scan Test Devices with 18-Bit Transceivers and Registers
AVAILABILITY
MIL PDIP PLCC SOIC SSOP TQFP TSSOP
LITERATURE REFERENCE SCBS312 SCBS164 SCBS668 SCBS165 SCBS667 SCBS671 SCBS166 SCBS311 SCBS167 SCBS312
5100
Little Logic
TIs little-logic products are sized to meet smaller packaging needs in todays products. Designers needing to simplify board layout and routing can use little logic to aid in their design and cost-reduction efforts. With continued miniaturization of portable electronics, this product is the ideal choice for applications in which board area is limited. Additionally, little-logic devices can be used to minimize the impact of ASIC design-error fixes by limiting the need for board redesign, enabling faster time to market and reduced costs. Little-logic products are offered in the following technology families:
LVC (low-voltage CMOS technology logic) with 1.65-V to 5-V VCC operation and Ioff circuitry AHC/AHCT (advanced high-speed CMOS logic) with 2-V to 5.5-V operation in CMOS- and TTL-compatible versions CBT/CBTD (crossbar technology logic) with 4.5-V to 5.5-V operation with output voltage translation with integrated level-shifting diode
Single gates are available in SOT 23-5 and SC-70 packages. Dual gates will be offered in SM-8 and US-8 packages. See www.ti.com/sc/logic for the most current data sheets.
5101
DEVICE SELECTION GUIDE LITTLE LOGIC

DEVICE SN74AHC1G00 SN74AHCT1G00 SN74LVC1G00 SN74AHC1G02 SN74AHCT1G02 SN74LVC1G02 SN74AHC1G04 SN74AHC1GU04 SN74AHCT1G04 SN74LVC1G04 SN74LVC1GU04 SN74LVC1G06 SN74LVC1G07 SN74AHC1G08 SN74AHCT1G08 SN74LVC1G08 SN74AHC1G14 SN74AHCT1G14 SN74LVC1G14 SN74AHC1G32 SN74AHCT1G32 SN74LVC1G32A SN74CBT1G66 SN74LVC1G66 SN74LVC1G79 SN74LVC1G80 SN74AHC1G86 SN74AHCT1G86 SN74LVC1G86 SN74AHC1G125 SN74AHCT1G125 SN74CBT1G125 SN74CBTD1G125 SN74CBTLV1G125 SN74LVC1G125 NO. PINS 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 Single 2-Input NAND Gates Single 2-Input NAND Gates Single 2-Input NAND Gates Single-2-Input NOR Gates Single-2-Input NOR Gates Single-2-Input NOR Gates Single Inverters Single Inverters Single Inverters Single Inverters Single Inverters Single Inverting Buffers/Drivers with Open-Drain Outputs Single Buffers/Drivers with Open-Drain Outputs Single 2-Input AND Gates Single 2-Input AND Gates Single 2-Input AND Gates Single Schmitt-Trigger Inverters Single Schmitt-Trigger Inverters Single Schmitt-Trigger Inverters Single 2-Input OR Gates Single 2-Input OR Gates Single 2-Input OR Gates Single FET Bus Switches Single Bilateral Switches Single Edge-Triggered D-Type Flip-Flops Single Edge-Triggered D-Type Flip-Flops Single 2-Input Exclusive-OR Gates Single 2-Input Exclusive-OR Gates Single 2-Input Exclusive-OR Gates Single Bus Buffers with 3-State Outputs Single Bus Buffers with 3-State Outputs Single FET Bus Switches Single FET Bus Switches with Level Shifting Single FET Bus Switches Single Bus Buffers with 3-State Outputs ' ' ' ' ' ' ' ' ' ' ' DESCRIPTION AVAILABILITY
SOT
LITERATURE REFERENCE SCLS313 SCLS316 SCES212 SCLS342 SCLS341 SCES213 SCLS318 SCLS343 SCLS319 SCES214 SCES215 SCES295 SCES296 SCLS314 SCLS315 SCES217 SCLS321 SCLS322 SCES218 SCLS317 SCLS320 SCES135 SCDS110 SCES323 SCES220 SCES221 SCLS323 SCLS324 SCES222 SCLS377 SCLS378 SCDS046 SCDS063 SCDS057 SCES223

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
5102

DEVICE SN74AHC1G126 SN74AHCT1G126 SN74LVC1G126 SN74LVC1G240 SN74CBT1G384 NO. PINS 5 5 5 5 5 Single Bus Buffers with 3-State Outputs Single Bus Buffers with 3-State Outputs Single Bus Buffers with 3-State Outputs Single Buffers/Drivers with 3-State Outputs Single FET Bus Switches ' ' DESCRIPTION AVAILABILITY
SOT
LITERATURE REFERENCE SCLS379 SCLS380 SCES224 SCES305 SCDS065
5103
5104
LS
Low Power Schottky Logic

With a wide array of functions, TIs LS family continues to offer replacement alternatives for mature systems. This classic line of devices was at the cutting edge of performance when introduced, and it continues to deliver excellent value for many of todays designs. As the world leader in logic products, TI is committed to being the last major supplier at every price-performance node. See www.ti.com/sc/logic for the most current data sheets.
5105
DEVICE SELECTION GUIDE LS

DEVICE SN74LS00 SN74LS00 SN74LS02 SN74LS03 SN74LS04 SN74LS05 SN74LS06 SN74LS07 SN74LS08 SN74LS09 SN74LS10 SN74LS11 SN74LS14 SN74LS19A SN74LS20 SN74LS21 SN74LS26 SN74LS27 SN74LS30 SN74LS31 SN74LS32 SN74LS33 SN74LS37 SN74LS38 SN74LS42 SN74LS47 SN74LS51 SN74LS73A SN74LS74A SN74LS75 SN74LS85 SN74LS86A SN74LS90 SN74LS92 SN74LS93 NO. PINS 14 8 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 14 14 14 14 16 16 14 14 14 16 16 14 14 14 14 Quad 2-Input NAND Gates Quad 2-Input NAND Gates Quad 2-Input NOR Gates Quad 2-Input NAND Gates with Open-Collector Outputs Hex Inverters Hex Inverters with Open-Collector Outputs Hex Inverter Buffers/Drivers with Open-Collector Outputs Hex Buffers/Drivers with Open-Collector Outputs Quad 2-Input AND Gates Quad 2-Input AND Gates with Open-Collector Outputs Triple 3-Input NAND Gates Triple 3-Input AND Gates Hex Schmitt-Trigger Inverters Hex Schmitt-Trigger Inverters Dual 4-Input NAND Gates Dual 4-Input AND Gates Quad 2-Input NAND Gates Triple 3-Input NOR Gates 8-Input NAND Gates Hex Delay Elements for Generating Delay Lines Quad 2-Input OR Gates Quad 2-Input NOR Gates Quad 2-Input NAND Gates Quad 2-Input NAND Gates 4-Line BCD to 10-Line Decimal Decoders BCD to 7-Segment Decoders/Drivers Dual 2-Wide 2-Input, 2-Wide 3-Input AND-OR-Invert Gates Dual J-K Edge-Triggered Flip-Flops with Reset Dual D-Type Flip-Flops with Set and Reset 4-Bit Bistable Latches 4-Bit Magnitude Comparators Quad 2-Input Exclusive-OR Gates Decade Counters Divide-by-12 Counters 4-Bit Binary Counters DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDLS025 SDLS026 SDLS027 SDLS028 SDLS029 SDLS030 SDLS020 SDLS021 SDLS033 SDLS034 SDLS035 SDLS131 SDLS049 SDLS138 SDLS079 SDLS139 SDLS087 SDLS089 SDLS099 SDLS157 SDLS100 SDLS101 SDLS103 SDLS105 SDLS109 SDLS111 SDLS113 SDLS118 SDLS119 SDLS120 SDLS123 SDLS124 SDLS940 SDLS940 SDLS940

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
5106

DEVICE SN74LS96 SN74LS107A SN74LS109A SN74LS112A SN74LS122 SN74LS123 SN74LS125A SN74LS126A SN74LS132 SN74LS136 SN74LS138 SN74LS139A SN74LS145 SN74LS148 SN74LS151 SN74LS153 SN74LS155A SN74LS156 SN74LS157 SN74LS158 SN74LS161A SN74LS163A SN74LS164 SN74LS165A SN74LS166A SN74LS169B SN74LS170 SN74LS173A SN74LS174 SN74LS175 SN74LS181 SN74LS191 SN74LS193 SN74LS194A SN74LS221 SN74LS240 SN74LS241 SN74LS243 SN74LS244 SN74LS245 SN74LS247 SN74LS251 SN74LS253 SN74LS257B NO. PINS 16 14 16 16 14 16 14 14 14 14 16 16 16 16 16 16 16 16 16 16 16 16 14 16 16 16 16 16 16 16 24 16 16 16 16 20 20 14 20 20 16 16 16 16 5-Bit Shift Registers Dual Negative-Edge-Triggered J-K Flip-Flops with Reset Dual Positive-Edge-Triggered J-K Flip Flops with Set and Reset Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset Retriggerable Monostable Multivibrators Dual Retriggerable Monostable Multivibrators with Reset Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Quad 2-Input NAND Gates with Schmitt-Trigger Inputs Quad Exclusive-OR Gates with Open-Collector Outputs 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers BCD-to-Decimal Decoders/Driver 8-to-3 Line Priority Encoders 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Dual 2-to-4 Line Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers with Open-Collector Outputs Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Synchronous 4-Bit Binary Counters 8-Bit Serial-In, Parallel-Out Shift Registers 8-Bit Parallel-In, Serial-Out Shift Registers 8-Bit Parallel-Load Shift Registers Synchronous 4-Bit Up/Down Binary Counters 4-by-4 Register Files with Open-Collector Outputs Quad D-Type Flip-Flops with 3-State Outputs Hex D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear Arithmetic Logic Units/Function Generators Presettable Synchronous 4-Bit Up/Down Binary Counters Presettable Synchronous 4-Bit Up/Down Binary Counters 4-Bit Bidirectional Universal Shift Registers Dual Monostable Multivibrators with Schmitt-Trigger Inputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Quad Bus-Transceivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs BCD to 7-Segment Decoders/Drivers with Open-Collector Outputs 1-of-8 Data Selectors/Multiplexers with 3-State Outputs Dual 1-of-4 Data Selectors/Multiplexers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDLS946 SDLS036 SDLS037 SDLS011 SDLS043 SDLS043 SDLS044 SDLS044 SDLS047 SDLS048 SDLS014 SDLS013 SDLS051 SDLS053 SDLS054 SDLS055 SDLS057 SDLS057 SDLS058 SDLS058 SDLS060 SDLS060 SDLS061 SDLS062 SDLS063 SDLS134 SDLS065 SDLS067 SDLS068 SDLS068 SDLS136 SDLS072 SDLS074 SDLS075 SDLS213 SDLS144 SDLS144 SDLS145 SDLS144 SDLS146 SDLS083 SDLS085 SDLS147 SDLS148
5107

DEVICE SN74LS258B SN74LS259B SN74LS266 SN74LS273 SN74LS279A SN74LS280 SN74LS283 SN74LS292 SN74LS293 SN74LS294 SN74LS297 SN74LS298 SN74LS299 SN74LS321 SN74LS348 SN74LS365A SN74LS367A SN74LS368A SN74LS373 SN74LS374 SN74LS375 SN74LS377 SN74LS378 SN74LS390 SN74LS393 SN74LS395A SN74LS399 SN74LS423 SN74LS442 SN74LS465 SN74LS540 SN74LS541 SN74LS590 SN74LS592 SN74LS593 SN74LS594 SN74LS595 SN74LS596 SN74LS597 SN74LS598 SN74LS599 SN74LS623 SN74LS624 SN74LS628 NO. PINS 16 16 14 20 16 14 16 16 14 16 16 16 20 16 16 16 16 16 20 20 16 20 16 16 14 16 16 16 20 20 20 20 16 16 20 16 16 16 16 20 16 20 14 14 DESCRIPTION Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs 8-Bit Addressable Latches Quad 2-Input Exclusive-NOR Gates with Open-Collector Outputs Octal D-Type Flip-Flops with Clear Quad S-R Latches 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Binary Full Adders with Fast Carry Programmable Frequency Dividers/Digital Timers 4-Bit Binary Counters Programmable Frequency Dividers/Digital Timers Digital Phase-Locked Loops Quad 2-Input Multiplexers with Storage 8-Bit Universal Shift/Storage Registers Crystal-Controlled Oscillators 8-Line to 3-Line Priority Encoders Hex Buffers/Line Drivers with 3-State Outputs Hex Buffers/Line Drivers with 3-State Outputs Hex Inverting Buffers/Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs 4-Bit Bistable Latches Octal D-Type Flip-Flops with Enable Hex D-Type Flip-Flops with Enable Dual 4-Bit Decade Counters Dual 4-Bit Binary Counters 4-Bit Cascadable Shift Registers with 3-State Outputs Quad 2-Input Multiplexers with Storage Dual Retriggerable Monostable Multivibrators with Reset Quad Tridirectional Bus Transceivers with 3-State Outputs Octal Buffers with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs 8-Bit Binary Counters with 3-State Output Registers 8-Bit Binary Counters with Input Registers 8-Bit Binary Counters with Input Registers and 3-State I/O Ports 8-Bit Shift Registers with Output Registers 8-Bit Shift Registers with 3-State Output Registers 8-Bit Shift Registers with 3-State Output Latches 8-Bit Shift Registers with Input Latches 8-Bit Shift Registers with Input Latches and 3-State I/O Ports 8-Bit Shift Registers with Output Registers Octal Bus Transceivers with 3-State Outputs Single Voltage-Controlled Oscillators Single Voltage-Controlled Oscillators AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDLS148 SDLS086 SDLS151 SDLS090 SDLS093 SDLS152 SDLS095 SDLS153 SDLS097 SDLS153 SDLS155 SDLS098 SDLS156 SDLS158 SDLS161 SDLS102 SDLS102 SDLS102 SDLS165 SDLS165 SDLS166 SDLS167 SDLS167 SDLS107 SDLS107 SDLS172 SDLS174 SDLS175 SDLS176 SDLS179 SDLS180 SDLS180 SDLS003 SDLS004 SDLS004 SDLS005 SDLS006 SDLS006 SDLS007 SDLS007 SDLS005 SDLS185 SDLS186 SDLS186
5108

DEVICE SN74LS629 SN74LS640 SN74LS640-1 SN74LS641 SN74LS641-1 SN74LS642 SN74LS642-1 SN74LS645 SN74LS645-1 SN74LS646 SN74LS648 SN74LS652 SN74LS669 SN74LS670 SN74LS673 SN74LS674 SN74LS682 SN74LS684 SN74LS688 SN74LS697 NO. PINS 16 20 20 20 20 20 20 20 20 24 24 24 16 16 24 24 20 20 20 20 Dual Voltage-Controlled Oscillators Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with Open-Collector Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Synchronous 4-Bit Up/Down Binary Counters 4-by-4 Register Files with 3-State Outputs 16-Bit Serial In/Out with 16-Bit Parallel-Out Storage Registers 16-Bit Serial In/Out with 16-Bit Parallel-Out Storage Registers 8-Bit Magnitude Comparators 8-Bit Magnitude Comparators 8-Bit Magnitude Comparators Synchronous 4-Bit Up/Down Binary Counters with Output Registers and Multiplexed 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC SSOP
LITERATURE REFERENCE SDLS186 SDLS189 SDLS189 SDLS189 SDLS189 SDLS189 SDLS189 SDLS189 SDLS189 SDLS190 SDLS190 SDLS191 SDLS192 SDLS193 SDLS195 SDLS195 SDLS008 SDLS008 SDLS008 SDLS199
5109
5110
LV
Low Voltage CMOS Technology Logic

TIs entire LV family has been redesigned for better flexibility in your 3.3-V or 5-V system. New LV-A devices (e.g., LV00A, LV02A) have improved operating characteristics and new features, such as 5-V tolerance, faster performance, and partial power down. The LV-A series of devices has expanded its voltage operation range (2-V to 5.5-V VCC), while still having a static power consumption of only 20 A for both bus-interface and gate functions. The LV family now has propagation delays of 5.4 ns typical at 3.3 V (SN74LV244A) and provides 8 mA of current drive. With an Ioff specification of only 5 A, these devices have the capability of partially powering down. In addition, the typical output VOH undershoot (VOHV) has been improved to >2.3 V at 3.3-V VCC for quieter operation. New key features:
Support mixed-mode voltage operation on all ports Ioff for partial power down 14 ns maximum at 3.3-V VCC for buffers
The LV family is offered in the octal footprints with advanced packaging, such as small-outline integrated circuit (SOIC), shrink small-outline package (SSOP), and thin shrink small-outline package (TSSOP). See www.ti.com/sc/logic for the most current data sheets.
5111
DEVICE SELECTION GUIDE LV

DEVICE SN74LV00A SN74LV02A SN74LV04A SN74LVU04A SN74LV05A SN74LV08A SN74LV14A SN74LV32A SN74LV74A SN74LV86A SN74LV123A SN74LV125A SN74LV126A SN74LV132A SN74LV138A SN74LV139A SN74LV164A SN74LV165A SN74LV174A SN74LV175A SN74LV221A SN74LV240A SN74LV244A SN74LV245A SN74LV273A SN74LV367A SN74LV373A SN74LV374A SN74LV540A SN74LV541A SN74LV573A SN74LV574A SN74LV594A SN74LV595A SN74LV4040A NO. PINS 14 14 14 14 14 14 14 14 14 14 16 14 14 14 16 16 14 16 16 16 16 20 20 20 20 16 20 20 20 20 20 20 16 16 16 Quad 2-Input NAND Gates Quad 2-Input NOR Gates Hex Inverters Hex Unbuffered Inverters Hex Inverters with Open-Drain Outputs Quad 2-Input AND Gates Hex Schmitt-Trigger Inverters Quad 2-Input OR Gates Dual D-Type Flip-Flops with Set and Reset Quad 2-Input Exclusive-OR Gates Dual Retriggerable Monostable Multivibrators with Reset Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Quad 2-Input NAND Gates with Schmitt-Trigger Inputs 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers 8-Bit Serial-In, Parallel-Out Shift Registers 8-Bit Parallel-In, Serial-Out Shift Registers Hex D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear Dual Monostable Multivibrators with Schmitt-Trigger Inputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal D-Type Flip-Flops with Clear Hex Buffers/Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 8-Bit Shift Registers with Output Registers 8-Bit Shift Registers with 3-State Output Registers 12-Stage Ripple-Carry Binary Counters/Dividers DESCRIPTION AVAILABILITY
PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCLS389 SCLS390 SCLS388 SCES130 SCLS391 SCLS387 SCLS386 SCLS385 SCLS381 SCLS392 SCLS393 SCES124 SCES131 SCLS394 SCLS395 SCLS396 SCLS403 SCLS402 SCLS401 SCLS400 SCLS450 SCLS384 SCLS383 SCLS382 SCLS399 SCLS398 SCLS407 SCLS408 SCLS409 SCLS410 SCLS411 SCLS412 SCLS413 SCLS414 SCES226

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
5112

DEVICE SN74LV4051A SN74LV4052A SN74LV4053A SN74LV4066A SN74LV161284 NO. PINS 16 16 16 14 48 DESCRIPTION 8-Channel Analog Multiplexers/Demultiplexers with Logic Level Conversion Dual 4-Channel Analog Multiplexers/Demultiplexers with Logic Level Conversion Triple 2-Channel Analog Multiplexers/Demultiplexers with Logic Level Conversion Quad Bilateral Switches 19-Bit Bus Interfaces AVAILABILITY
PDIP SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCLS428 SCLS429 SCLS430 SCLS427 SCLS426
5113
5114
LVC
Low Voltage CMOS Technology Logic

TIs LVC products are specially designed for 3-V power supplies. The LVC family is a high-performance version with 0.8- CMOS process technology, 24-mA current drive, and 6.5-ns maximum propagation delays for driver operations. The LVC family includes both bus-interface and gate functions, with 60 different functions planned. The LVC family is offered in the octal and Widebus footprints, with all of the advanced packaging such as small-outline integrated circuit (SOIC), shrink small-outline package (SSOP), thin shrink small-outline package (TSSOP), very small-outline package (TVSOP), and selected devices in MicroStar BGA (LFBGA) packages. All LVC devices are available with 5-V tolerant inputs and outputs. An extensive line of single gates is planned in the LVC family. See www.ti.com/sc/logic for the most current data sheets.
5115
DEVICE SELECTION GUIDE LVC

DEVICE SN74LVC1G00 SN74LVC1G02 SN74LVC1G04 SN74LVC1GU04 SN74LVC1G06 SN74LVC1G07 SN74LVC1G08 SN74LVC1G14 SN74LVC1G32A SN74LVC1G66 SN74LVC1G79 SN74LVC1G80 SN74LVC1G86 SN74LVC1G125 SN74LVC1G126 SN74LVC1G240 SN74LVC00A SN74LVC02A SN74LVC04A SN74LVCU04A SN74LVC06A SN74LVC07A SN74LVC08A SN74LVC10A SN74LVC14A SN74LVC32A SN74LVC74A SN74LVC86A SN74LVC112A SN74LVC125 SN74LVC125A SN74LVC126A SN74LVC138A SN74LVC139A NO. PINS 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 14 14 14 14 14 14 14 14 14 14 14 14 16 14 14 14 16 16 DESCRIPTION Single 2-Input NAND Gates Single-2-Input NOR Gates Single Inverters Single Inverters Single Inverting Buffers/Drivers with Open-Drain Outputs Single Buffers/Drivers with Open-Drain Outputs Single 2-Input AND Gates Single Schmitt-Trigger Inverters Single 2-Input OR Gates Single Bilateral Switches Single Edge-Triggered D-Type Flip-Flops Single Edge-Triggered D-Type Flip-Flops Single 2-Input Exclusive-OR Gates Single Bus Buffers with 3-State Outputs Single Bus Buffers with 3-State Outputs Single Buffers/Drivers with 3-State Outputs Quad 2-Input NAND Gates Quad 2-Input NOR Gates Hex Inverters Hex Unbuffered Inverters Hex Inverter Buffers/Drivers with Open-Drain Outputs Hex Buffers/Drivers with Open-Drain Outputs Quad 2-Input AND Gates Triple 3-Input NAND Gates Hex Schmitt-Trigger Inverters Quad 2-Input OR Gates Dual D-Type Flip-Flops with Set and Reset Quad 2-Input Exclusive-OR Gates Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers ' ' ' ' ' ' ' ' ' ' AVAILABILITY
LFBGA PDIP SOIC SOT SSOP TSSOP TVSOP
LITERATURE REFERENCE SCES212 SCES213 SCES214 SCES215 SCES295 SCES296 SCES217 SCES218 SCES135 SCES323 SCES220 SCES221 SCES222 SCES223 SCES224 SCES305 SCAS279 SCAS280 SCAS281 SCAS282 SCAS596 SCAS595 SCAS283 SCAS284 SCAS285 SCAS286 SCAS287 SCAS288 SCAS289 Call SCAS290 SCAS339 SCAS291 SCAS341
' ' '

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
5116

DEVICE SN74LVC157A SN74LVC240A SN74LVCZ240A SN74LVC244A SN74LVCH244A SN74LVCZ244A SN74LVC245A SN74LVCH245A SN74LVCZ245A SN74LVC257A SN74LVC373A SN74LVC374A SN74LVC540A SN74LVC541A SN74LVC543A SN74LVC573A SN74LVC574A SN74LVC646A SN74LVC652A SN74LVC821A SN74LVC823A SN74LVC827A SN74LVC828A SN74LVC841A SN74LVC861A SN74LVC863A SN74LVC2244A SN74LVCZ2244A SN74LVCR2245A SN74LVCZ2245A SN74LVC2952A SN74LVCC3245A SN74LVC4245A SN74LVCC4245A SN74LVCH16240A SN74LVCZ16240A SN74LVC16244A SN74LVCH16244A SN74LVCZ16244A SN74LVC16245A NO. PINS 16 20 20 20 20 20 20 20 20 16 20 20 20 20 24 20 20 24 24 24 24 24 24 24 24 24 20 20 20 20 24 24 24 24 48 48 48 48 48 48 DESCRIPTION Quad 2-to-4 Line Data Selectors/Multiplexers Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs 10-Bit Bus-Interface Flip-Flops with 3-State Outputs 9-Bit Bus-Interface Flip-Flops with 3-State Outputs 10-Bit Buffers/Drivers with 3-State Outputs 10-Bit Buffers/Drivers with 3-State Outputs 10-Bit Bus-Interface D-Type Latches with 3-State Outputs 10-Bit Transceivers with 3-State Outputs 9-Bit Bus Transceivers with 3-State Outputs Octal Buffers/Line Drivers with Series Damping Resistors and 3-State Outputs Octal Buffers/Line Drivers with 3-State Outputs Octal Bus Transceivers with Series Damping Resistors and 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs Octal Bus Transceivers with Adjustable Output Voltage and 3-State Outputs Octal Bus Transceivers and 3.3-V to 5-V Shifters with 3-State Outputs Octal Dual-Supply Bus Transceivers with Configurable Output Voltage and 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs ' AVAILABILITY
LITERATURE REFERENCE SCAS292 SCAS293 SCES273 SCAS414 SCES009 SCES274 SCAS218 SCES008 SCES275 SCAS294 SCAS295 SCAS296 SCAS297 SCAS298 SCAS299 SCAS300 SCAS301 SCAS302 SCAS303 SCAS304 SCAS305 SCAS306 SCAS347 SCAS307 SCAS309 SCAS310 SCAS572 Call SCAS581 Call SCAS311 SCAS585 SCAS375 SCAS584 SCAS566 SCES276 SCES061 SCAS313 SCES277 SCES062
5117

DEVICE SN74LVCH16245A SN74LVCHR16245A SN74LVCZ16245A SN74LVC16373 SN74LVCH16373A SN74LVC16374 SN74LVCH16374A SN74LVCH16540A SN74LVCH16541A SN74LVCH16543A SN74LVCH16646A SN74LVCH16652A SN74LVCH16901 SN74LVCH16952A SN74LVCH32244A SN74LVCH32245A SN74LVCH32373A SN74LVCH32374A SN74LVC161284 SN74LVCH162244A SN74LVCH162245A SN74LVCR162245 NO. PINS 48 48 48 48 48 48 48 48 48 56 56 56 64 56 96 96 96 96 48 48 48 48 DESCRIPTION 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 18-Bit Universal Bus Transceivers with Parity Generators/Checkers 16-Bit Registered Transceivers with 3-State Outputs 32-Bit Buffers/Drivers with 3-State Outputs 32-Bit Bus Transceivers with 3-State Outputs 32-Bit Transparent D-Type Latches with 3-State Outputs 32-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 19-Bit Bus Interfaces 16-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 16-Bit Bus Transceivers with Series Damping Resistors and 3-State Outputs 16-Bit Bus Transceivers with Series Damping Resistors and 3-State Outputs ' AVAILABILITY
LITERATURE REFERENCE SCES063 SCAS582 SCES278 SCAS315 SCAS568 SCAS316 SCAS565 SCAS569 SCAS567 SCAS317 SCAS318 SCAS319 SCES145 SCAS320 SCAS617 SCAS616 SCAS618 SCAS619 SCAS583 SCAS545 Call SCES047
5118
LVT
Low Voltage BiCMOS Technology Logic

LVT is a 5-V tolerant, 3.3-V product using the latest 0.72- BiCMOS technology with performance specifications ideal for workstation, networking, and telecommunications applications. LVT delivers 3.5-ns propagation delays at 3.3 V (28% faster than ABT at 5 V), current drive of 64 mA, and pin-for-pin compatibility with existing ABT families. LVT operates at LVTTL signal levels in telecom and networking high-performance system point-to-point or distributed backplane applications. LVT is an excellent migration path from ABT. In addition to popular octal and Widebus bus-interface devices, TI also offers the universal bus transceiver (UBT) and selected functions in Widebus+ in this low-voltage family. Performance characteristics of the LVT family are:
3.3-V operation with 5-V tolerant I/Os Permits use in a mixed-voltage environment. Speed Provides high-performance with maximum propagation delays of 3.5 ns at 3.3 V for buffers. Drive Provides up to 64 mA of drive at 3.3-V VCC, yet consumes less than 330 W of standby power.
Additional features include: Live insertion LVT devices incorporate Ioff and power-up 3-state (PU3S) circuitry to protect the devices in live-insertion applications and make them ideally suited for hot-insertion applications. Ioff prevents the devices from being damaged during partial power down, and PU3S forces the outputs to the high-impedance state during power up and power down. Bus hold Eliminates floating inputs by holding them at the last valid logic state. This eliminates the need for external pullup and pulldown resistors. Damping-resistor option TI implements series damping resistors on selected devices, which not only reduces overshoot and undershoot, but also matches the line impedance, minimizing ringing. Packaging LVT devices are available in small-outline integrated circuit (SOIC), shrink small-outline package (SSOP), thin shrink small-outline package (TSSOP), thin very small-outline package (TVSOP) (select devices), and selected devices in MicroStar BGA (LFBGA) package.
5119
DEVICE SELECTION GUIDE LVT

MIL LFBGA SOIC SSOP TSSOP TVSOP
LVT Octals (SN74LVTxxx, SN74LVTHxxx) SN74LVTH125 SN74LVTH126 SN74LVT240A SN74LVTH240 SN74LVTH241 SN74LVT244B SN74LVTH244A SN74LVT245B SN74LVTH245A SN74LVTH273 SN74LVTH373 SN74LVTH374 SN74LVTH540 SN74LVTH541 SN74LVTH543 SN74LVTH573 SN74LVTH574 SN74LVTH646 SN74LVTH652 14 14 20 20 20 20 20 20 20 20 20 20 20 20 24 20 20 24 24 Quad Bus Buffers with 3-State Outputs Quad Bus Buffers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal Bus Transceivers with 3-State Outputs Octal D-Type Flip-Flops with Clear Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Inverting Octal Buffers and Line Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Octal Registered Transceivers with 3-State Outputs Octal Transparent D-Type Latches with 3-State Outputs Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs Octal Registered Bus Transceivers with 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs ' ' ' ' SCBS703 SCBS746 SCBS134 SCBS679 SCAS352 SCAS354 SCAS586 SCES004 SCBS130 SCBS136 SCBS689 SCBS683 SCBS681 SCBS682 SCBS704 SCBS687 SCBS688 SCBS705 SCBS706

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
5120

LVT Widebus (SN74LVTH16xxx) SN74LVT16240 SN74LVTH16240 SN74LVTH16241 SN74LVT16244B SN74LVTH16244A SN74LVT16245B SN74LVTH16245A SN74LVTH16373 SN74LVTH16374 SN74LVTH16500 SN74LVTH16501 SN74LVTH16541 SN74LVTH16543 SN74LVTH16646 SN74LVTH16652 SN74LVTH16835 SN74LVTH16952 48 48 48 48 48 48 48 48 48 56 56 48 56 56 56 56 56 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Bus Transceivers with 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Output 18-Bit Universal Bus Transceivers with 3-State Outputs 18-Bit Universal Bus Transceivers with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 16-Bit Bus Transceivers and Registers with 3-State Outputs 18-Bit Universal Bus Drivers with 3-State Outputs 16-Bit Registered Transceivers with 3-State Outputs ' ' ' ' ' ' ' ' ' ' ' ' ' ' SCBS717 SCBS684 SCBS693 SCBS716 SCBS142 SCBS715 SCBS143 SCBS144 SCBS145 SCBS701 SCBS700 SCBS691 SCBS699 SCBS698 SCBS150 SCBS713 SCBS697
LVT Widebus' (SN74LVTH32xxx) SN74LVT32244 SN74LVTH32244 SN74LVT32245 SN74LVTH32245 SN74LVTH32373 SN74LVTH32374 SN74LVTH32501 96 96 96 96 96 96 114 32-Bit Buffers/Drivers with 3-State Outputs 32-Bit Buffers/Drivers with 3-State Outputs 32-Bit Bus Transceivers with 3-State Outputs 32-Bit Bus Transceivers with 3-State Outputs 32-Bit Transparent D-Type Latches with 3-State Outputs 32-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 32-Bit Universal Bus Transceivers with 3-State Outputs Call Call Call Call Call Call Call
5121

LVT Octals/Widebus With Series Damping Resistors (SN74LVTH2xxx, SN74LVTH162xxx) SN74LVTH2245 SN74LVTH2952 SN74LVT162240 SN74LVTH162240 SN74LVTH162241 SN74LVT162244A SN74LVTH162244 SN74LVT162245A SN74LVTH162245 SN74LVTH162373 SN74LVTH162374 SN74LVTH162541 20 24 48 48 48 48 48 48 48 48 48 48 Octal Bus Transceivers with Series Damping Resistors and 3-State Outputs Octal Bus Transceivers and Registers with 3-State Outputs 16-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 16-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 16-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 16-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 16-Bit Buffers/Drivers with Series Damping Resistors and 3-State Outputs 16-Bit Bus Transceivers with Series Damping Resistors and 3-State Outputs 16-Bit Bus Transceivers with Series Damping Resistors and 3-State Outputs 16-Bit Transparent D-Type Latches with 3-State Outputs 16-Bit Edge-Triggered D-Type Flip-Flops with 3-State Outputs 16-Bit Buffers/Drivers with 3-State Outputs ' ' ' ' ' ' ' SCBS707 SCBS710 SCBS719 SCBS685 SCBS692 SCBS718 SCBS258 SCBS714 SCBS260 SCBS261 SCBS262 SCBS690
5122
I2C Inter Integrated Circuit Applications

The I2C bus is a bidirectional two-wire bus for communicating between integrated circuits. The PCA and future PCF devices offered by TI are general-purpose logic to be used with the I2C or system management (SM) bus protocols.
PCA
5123
DEVICE SELECTION GUIDE PCA

DEVICE PCA8550 NO. PINS 16 Nonvolatile 5-Bit Registers with I2C Interface DESCRIPTION AVAILABILITY
SOIC SSOP TSSOP
LITERATURE REFERENCE SCPS050

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
5124
Schottky Logic
With a wide array of functions, TIs S family continues to offer replacement alternatives for mature systems. This classic line of devices was at the cutting edge of performance when introduced, and it continues to deliver excellent value for many of todays designs. As the world leader in logic products, TI is committed to being the last major supplier at every price-performance node. See www.ti.com/sc/logic for the most current data sheets.
5125
DEVICE SELECTION GUIDE S

DEVICE SN74S00 SN74S02 SN74S04 SN74S05 SN74S08 SN74S09 SN74S10 SN74S20 SN74S32 SN74S37 SN74S38 SN74S51 SN74S74 SN74S85 SN74S86 SN74S112A SN74S124 SN74S132 SN74S133 SN74S138A SN74S139A SN74S140 SN74S151 SN74S153 SN74S157 SN74S158 SN74S163 SN74S174 SN74S175 SN74S182 SN74S195 SN74S240 SN74S241 SN74S244 SN74S257 NO. PINS 14 14 14 14 14 14 14 14 14 14 14 14 14 16 14 16 16 14 16 16 16 14 16 16 16 16 16 16 16 16 16 20 20 20 16 Quad 2-Input NAND Gates Quad 2-Input NOR Gates Hex Inverters Hex Inverters with Open-Collector Outputs Quad 2-Input AND Gates Quad 2-Input AND Gates with Open-Collector Outputs Triple 3-Input NAND Gates Dual 4-Input NAND Gates Quad 2-Input OR Gates Quad 2-Input NAND Gates Quad 2-Input NAND Gates Dual 2-Wide 2-Input AND-OR-Invert Gates Dual D-Type Flip-Flops with Set and Reset 4-Bit Magnitude Comparators Quad 2-Input Exclusive-OR Gates Dual Negative-Edge-Triggered J-K Flip-Flops with Set and Reset Dual Voltage Controlled Oscillators Quad 2-Input NAND Gates with Schmitt-Trigger Inputs 13-Input NAND Gates 3-to-8 Line Inverting Decoders/Demultiplexers Dual 2-to-4 Line Decoders/Demultiplexers Dual 4-Input Positive-NAND 50- Line Drivers 1-of-8 Data Selectors/Multiplexers Dual 1-of-4 Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Quad 2-to-4 Line Data Selectors/Multiplexers Synchronous 4-Bit Binary Counters Hex D-Type Flip-Flops with Clear Quad D-Type Flip-Flops with Clear Look-Ahead Carry Generators 4-Bit Parallel Access Shift Registers Octal Buffers/Drivers with 3-State Outputs Octal Buffers/Drivers with 3-State Outputs Octal Buffers and Line Drivers with 3-State Outputs Quad 1-of-2 Data Selectors/Multiplexers with 3-State Outputs DESCRIPTION AVAILABILITY

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
5126

DEVICE SN74S260 SN74S280 SN74S283 SN74S373 SN74S374 SN74S381 SN74S1050 SN74S1051 SN74S1052 SN74S1053 SN74S1056 NO. PINS 14 14 16 20 20 20 16 16 20 20 10 Dual 5-Input NOR Gates 9-Bit Odd/Even Parity Generators/Checkers 9-Bit Binary Full Adders with Fast Carry Octal Transparent D-Type Latches with 3-State Outputs Octal D-Type Edge-Triggered Flip-Flops with 3-State Outputs Arithmetic Logic Units/Function Generators 12-Bit Schottky Barrier Diode Bus-Termination Arrays 12-Bit Schottky Barrier Diode Bus-Termination Arrays 16-Bit Schottky Barrier Diode Bus-Termination Arrays 16-Bit Schottky Barrier Diode Bus-Termination Arrays 8-Bit Schottky Barrier Diode Bus-Termination Arrays DESCRIPTION AVAILABILITY
LITERATURE REFERENCE SDLS208 SDLS152 SDLS095 SDLS165 SDLS165 SDLS168 SDLS015 SDLS018 SDLS016 SDLS017 SDLS019
5127
5128
SSTL/SSTV
Stub Series Terminated Logic
The SSTL interface is the computer industrys leading choice for next-generation technology in high-speed memory subsystems, adopted by JESD8-8 and JESD8-9 and endorsed by major memory-module, workstation, and PC manufacturers. TIs SSTL family is optimized for 3.3-V VCC operation. The SSTV family is optimized for 2.5-V VCC operation. The devices offered in the SSTL/SSTV families are ideal solutions for address/control bus buffering in high-performance double-data-rate (DDR) memory systems.
HSTL
High Speed Transceiver Logic
One of TIs low-voltage interface solutions is HSTL. HSTL devices accept a minimal differential input swing from 0.65 V to 0.85 V (nominally) with the outputs driving LVTTL levels. HSTL is ideally suited for driving an address bus to two banks of memory. The HSTL input levels follow JESD8-6. See www.ti.com/sc/logic for the most current data sheets.
5129
SSTL/SSTV/HSTL
DEVICE SSTL SN74SSTL16837A SN74SSTL16847 SN74SSTL16857 SSTV SN74SSTV16857 SN74SSTV16859 HSTL SN74HSTL16918 SN74HSTL162822
NO. PINS
DESCRIPTION
AVAILABILITY
SSOP TSSOP TVSOP
64 64 48
20-Bit SSTL_3 Interface Universal Bus Drivers with 3-State Outputs 20-Bit SSTL_3 Interface Buffers with 3-State Outputs 14-Bit SSTL_2 Registered Buffers ' '
SCBS675 SCBS709 SCAS625
48 64
14-Bit Registered Buffers with SSTL_2 Inputs and Outputs 13-Bit to 26-Bit Registered Buffers with SSTL_2 Inputs and Outputs
Call SCES297
48 64
9-Bit to 18-Bit HSTL-to-LVTTL Memory Address Latches 14-Bit to 28-Bit HSTL-to-LVTTL Memory Address Latches
SCES096 SCES091
DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
5130
TTL
Transistor Transistor Logic

With a wide array of functions, TIs TTL family continues to offer replacement alternatives for mature systems. This classic line of devices was at the cutting edge of performance when introduced, and it continues to deliver excellent value for many of todays designs. As the world leader in logic products, TI is committed to being the last major supplier at every price-performance node. See www.ti.com/sc/logic for the most current data sheets.
5131
DEVICE SELECTION GUIDE TTL

DEVICE SN7400 SN7402 SN7404 SN7405 SN7406 SN7407 SN7410 SN7414 SN7416 SN7417 SN7425 SN7432 SN7437 SN7438 SN7445 SN7447A SN7474 SN7497 SN74107 SN74121 SN74123 SN74128 SN74132 SN74145 SN74148 SN74150 SN74154 SN74159 SN74175 SN74193 SN74221 SN74265 SN74273 SN74276 SN74367A NO. PINS 14 14 14 14 14 14 14 14 14 14 14 14 14 14 16 16 14 16 14 14 16 14 14 16 16 24 24 24 16 16 16 16 20 20 16 Quad 2-Input NAND Gates Quad 2-Input NOR Gates Hex Inverters Hex Inverters with Open-Collector Outputs Hex Inverter Buffers/Drivers with Open-Collector Outputs Hex Buffers/Drivers with Open-Collector Outputs Triple 3-Input NAND Gates Hex Schmitt-Trigger Inverters Hex Inverter Buffer/Drivers with Open-Collector Outputs Hex Buffers/Drivers with Open-Collector Outputs Dual 4-Input NOR Gates with Strobe Quad 2-Input OR Gates Quad 2-Input NAND Gates Quad 2-Input NAND Gates BCD-to-Decimal Decoders/Drivers BCD to 7-Segment Decoders/Drivers Dual D-Type Flip-Flops with Set and Reset Synchronous 6-Bit Binary Rate Multipliers Dual Negative-Edge-Triggered J-K Flip-Flops with Reset Monostable Multivibrators with Schmitt-Trigger Inputs Dual Retriggerable Monostable Multivibrators with Reset Hex OR-Gate Line Drivers Quad 2-Input NAND Gates with Schmitt-Trigger Inputs BCD-to-Decimal Decoders/Drivers 8-to-3 Line Priority Encoders 1-of-16 Data Selectors/Multiplexers 4-to-16 Line Decoders/Demultiplexers 4-to-16 Line Decoders/Demultiplexers with Open-Collector Outputs Quad D-Type Flip-Flops with Clear Presettable Synchronous 4-Bit Up/Down Binary Counters Dual Monostable Multivibrators with Schmitt-Trigger Inputs Quad Complementary-Output Elements Octal D-Type Flip-Flops with Clear Quad J-K Flip-Flops Hex Buffers/Line Drivers with 3-State Outputs DESCRIPTION AVAILABILITY
MIL PDIP SOIC

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
5132

DEVICE SN74368A SN74393 NO. PINS 16 14 DESCRIPTION Hex Inverting Buffers/Line Drivers with 3-State Outputs Dual 4-Bit Binary Counters AVAILABILITY
MIL PDIP SOIC
LITERATURE REFERENCE SDLS102 SDLS107
5133
5134
TVC
Translation Voltage Clamp Logic

TVC products are designed to protect components sensitive to high-state voltage-level overshoots. New designs for PCs and other bus-oriented products require faster and lower-power devices built with advanced submicron semiconductor processes. Often, the I/Os of these devices are intolerant of high-state voltage levels on the communication buses used. The need for I/O protection became apparent for devices communicating with legacy buses, and the TVC family fills this need. TVC devices offer an array of n-type metal-oxide semiconductor (NMOS) field-effect transistors (FETs) with the gates cascaded to a common gate input. TVC devices can be used as voltage limiters by connecting one of the FETs as a voltage reference transistor and the remainder as pass transistors. The low-voltage side of each pass transistor is limited to the voltage set by the reference transistor. All of the FETs in the array have essentially the same characteristics, so any one can be used as the reference transistor. Because the fabrication of the FETs is symmetrical, either port connection for each bit can be used as the low-voltage side, and the I/O signals are bidirectional through each FET. Key features:
No logic supply voltage required (no internal control logic) Used as voltage translators or voltage clamps 7- on-state resistance with gate at 3.3 V Any FET can be used as the reference transistor. Direct interface with GTL+ levels Accept any I/O voltage from 0 to 5.5 V Flow-through pinout for ease of printed circuit board layout Minimum fabrication process transistor characteristic variations
5135
DEVICE SELECTION GUIDE TVC

DEVICE SN74TVC3010 SN74TVC16222 NO. PINS 24 48 10-Bit Translation Voltage Clamps 22-Bit Translation Voltage Clamps FUNCTION AVAILABILITY
SOIC SSOP TSSOP TVSOP
LITERATURE REFERENCE SCDS088 SCDS087

DBQ = 16/20/24 pins

PW = 8/14/16/20/24/28 pins DGG = 48/56/64 pins

DGV = 14/16/20/24/48/56 pins DBB = 80 pins


FN = 20/28/44/68/84 pins
schedule
= Now ' = Planned
5136
LOGIC OVERVIEW
FUNCTIONAL INDEX
A1
A2
APPENDIX A PACKAGING AND SYMBOLIZATION INFORMATION
CONTENTS
Device Names and Package Designators for TI Logic Products . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A5 Device Names and Package Designators for Logic Products Formerly Offered by Cypress Semiconductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A6 Device Names and Package Designators for Logic Products Formerly Offered by Harris Semiconductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A7 Logic Symbolization Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A9 Moisture Sensitivity by Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A15 Packaging Cross-Reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A17
A3
A4
DEVICE NAMES AND PACKAGE DESIGNATORS FOR TI LOGIC PRODUCTS

Example:
SN
74
LVC
3
H
4
16
5
244
A
8
DGG
9
R
10
1 2 1 Standard Prefix
Examples:
6 7 6 Options
Examples:
SN Standard Prefix SNJ Conforms to MIL-PRF-38535 (QML)
2 Temperature Range
Examples:
Blank = No Options 2 Series Damping Resistor on Outputs 4 Level Shifter 25 25- Line Driver
3 Family
Examples:
54 Military 74 Commercial
7 Function
Examples: 244 Noninverting Buffer/Driver 374 D-Type Flip-Flop 573 D-Type Transparent Latch 640 Inverting Transceiver
Blank Transistor-Transistor Logic ABT Advanced BiCMOS Technology ABTE/ETL Advanced BiCMOS Technology/ Enhanced Transceiver Logic AC/ACT Advanced CMOS Logic AHC/AHCT Advanced High-Speed CMOS Logic ALB Advanced Low-Voltage BiCMOS ALS Advanced Low-Power Schottky Logic ALVC Advanced Low-Voltage CMOS Technology AS Advanced Schottky Logic AVC Advanced Very Low-Voltage CMOS Logic BCT BiCMOS Bus-Interface Technology CBT Crossbar Technology CBTLV Low-Voltage Crossbar Technology CD4000 CMOS B-Series Integrated Circuits F F Logic FB Backplane Transceiver Logic/Futurebus+ FCT Fast CMOS TTL Logic GTL Gunning Transceiver Logic HC/HCT High-Speed CMOS Logic HSTL High-Speed Transceiver Logic LS Low-Power Schottky Logic LV Low-Voltage CMOS Technology LVC Low-Voltage CMOS Technology LVT Low-Voltage BiCMOS Technology PCA I2C Inter-Integrated Circuit Applications S Schottky Logic SSTL/SSTV Stub Series-Terminated Logic TVC Translation Voltage Clamp Logic
8 Device Revision
Examples: Blank = No Revision Letter Designator AZ
9 Packages
Commercial: D, DW Small-Outline Integrated Circuit (SOIC) DB, DL Shrink Small-Outline Package (SSOP) DBB, DGV Thin Very Small-Outline Package (TVSOP) DBQ Quarter-Size Outline Package (QSOP) DBV, DCK Small-Outline Transistor Package (SOT) DGG, PW Thin Shrink Small-Outline Package (TSSOP) FN Plastic Leaded Chip Carrier (PLCC) GKE, GKF, GQL MicroStar BGA Low-Profile Fine-Pitch Ball Grid Array (LFBGA) N, NP, NT Plastic Dual-In-Line Package (PDIP) NS, PS Small-Outline Package (SOP) PAG, PAH, PCA, PCB, PM, PN, PZ Thin Quad Flatpack (TQFP) PH, PQ, RC Quad Flatpack (QFP) Military: FK Leadless Ceramic Chip Carrier (LCCC) GB Ceramic Pin Grid Array (CPGA) HFP, HS, HT, HV Ceramic Quad Flatpack (CQFP) J, JT Ceramic Dual-In-Line Package (CDIP) W, WA, WD Ceramic Flatpack (CFP)
4 Special Features
Examples: Blank = No Special Features C Configurable VCC (LVCC) D Level-Shifting Diode (CBTD) H Bus Hold (ALVCH) K Undershoot-Protection Circuitry (CBTK) R Damping Resistor on Inputs/Outputs (LVCR) S Schottky Clamping Diode (CBTS) Z Power-Up 3-State (LVCZ)
10 Tape and Reel

Devices in the DB and PW package types include the R designation for reeled product. Existing product inventory designated LE may remain, but all products are being converted to the R designation. Examples: Old Nomenclature SN74LVTxxxDBLE New Nomenclature SN74LVTxxxADBR LE Left Embossed (valid for DB and PW packages only) R Standard (valid for all surface-mount packages) There is no functional difference between LE and R designated products, with respect to the carrier tape, cover tape, or reels used.
5 Bit Width
Examples: Blank = Gates, MSI, and Octals 1G Single Gate 8 Octal IEEE 1149.1 (JTAG) 16 Widebus (16, 18, and 20 bit) 18 Widebus IEEE 1149.1 (JTAG) 32 Widebus+ (32 and 36 bit)
A5
DEVICE NAMES AND PACKAGE DESIGNATORS FOR LOGIC PRODUCTS FORMERLY OFFERED BY CYPRESS SEMICONDUCTOR
CYFCT Nomenclature
Example:
CY
1 1
74
2
FCT
3
162
4
H
5
245
6 7
A
7
T
8
PV
9
C
10
T
11
Prefix Designation for Acquired Cypress FCT Logic Temperature Range

54 Military (55C to 125C) 74 Commercial/Industrial (40C to 85C) 29 Commercial/Industrial or Military (see data sheet)
Speed Grade
Blank = No Speed Grade A B C D E
Examples:
May be blank to accommodate 18-character limitation
Examples:
TTL or CMOS Outputs

Blank = CMOS Outputs T TTL Outputs
Family
FCT FAST CMOS TTL Logic
Examples:
Example:
16 or Greater Bit Width With Balanced Drive or 3.3-V Operation

Blank 16x 16 or Greater Bit Width With Balanced Drive or 3.3-V Operation 162 Balanced Drive (series output resistors) 163 3.3 V
Packages
P Plastic Dual-In-Line Package (PDIP) (N) PA Thin Shrink Small-Outline Package (TSSOP) (DGG/G) PV Shrink Small-Outline Package (SSOP) (DL) Q Quarter-Size Outline Package (QSOP) (DBQ) SO Small-Outline Integrated Circuit (SOIC) (DL)
Examples:
Examples:
Bus Hold
Blank = No Bus Hold H Bus Hold (present only when preceded by 16x see item 4)
10 Processing
Example: C Commercial Processing
Examples:
11 Tape and Reel

Example: T Tape and Reel Packing
Type Designation
Up to Five Digits Examples: 245 1652 16245
FAST is a trademark of Fairchild Semiconductor. A6
DEVICE NAMES AND PACKAGE DESIGNATORS FOR LOGIC PRODUCTS FORMERLY OFFERED BY HARRIS SEMICONDUCTOR
CD4000 Nomenclature
Example
CD 4011 B E XX
1 1 2 3
3 4
4 Packages
Prefix Designation for Acquired Harris Digital Logic Type Designation Supply Voltage
A 12 V Maximum B 18 V Maximum UB 18 V Maximum, Unbuffered
Examples:
Up to Five Digits
Examples:
D Ceramic Side-Brazed Dual-In-Line Package (DIP) E Plastic DIP F Ceramic DIP K Ceramic Flatpack M Plastic Surface-Mount Small-Outline Integrated Circuit (SOIC) SM Plastic Shrink SOIC (SSOP) M96 Reeled Plastic Surface-Mount SOIC SM96 Reeled Plastic Shrink SOIC (SSOP)
High-Reliability Screening
3 Noncompliant With MIL-STD-883, Class B 3A Fully Compliant With MIL-STD-883, Class B
Military Products Only Examples:
CDAC/CDACT Advanced CMOS and CDHC/CDHCT/CDHCU High Speed CMOS Nomenclature
Example
CD 74 ACT 245 E XX
1 1 2
4 4 5
Prefix Designation for Acquired Harris Digital Logic Temperature Range

54 Military (55C to 125C) 74 Commercial (0C to 70C)
Type Designation Packages

E Plastic Dual-In-Line Package (DIP) EN Plastic Slim-Line 24-Lead DIP F Ceramic DIP M Plastic Surface-Mount Small-Outline Integrated Circuit (SOIC) SM Plastic Shrink SOIC (SSOP) M96 Reeled Plastic Surface-Mount SOIC SM96 Reeled Plastic Shrink SOIC (SSOP)
Up to Five Digits
Examples:
Examples:
Family
AC Advanced CMOS Logic, CMOS Input Levels ACT Advanced CMOS Logic, TTL Input Levels HC High-Speed CMOS Logic, CMOS Input Levels HCT High-Speed CMOS Logic, TTL Input Levels HCU High-Speed CMOS Logic, CMOS Input Levels, Unbuffered
Examples:
High-Reliability Screening
3A Fully Compliant With MIL-STD-883
Military Products Only Example:
A7
DEVICE NAMES AND PACKAGE DESIGNATORS FOR LOGIC PRODUCTS FORMERLY OFFERED BY HARRIS SEMICONDUCTOR
CDFCT Nomenclature
Example
CD
1
74
2
FCT
3
245
4
Example:
A
5
E
6
1 Prefix Designation for Acquired Harris Digital Logic 2 Temperature Range

Examples: 54 Military (55C to 125C) 74 Commercial (0C to 70C)
5 Speed Grade
Blank or A Standard Equivalent to FAST
6 Packages
Examples: E Plastic Dual-In-Line Package (DIP) EN Plastic Slim-Line 24-Lead DIP F Ceramic DIP M Plastic Surface-Mount Small-Outline Integrated Circuit (SOIC) SM Plastic Shrink SOIC (SSOP) M96 Reeled Plastic Surface-Mount SOIC SM96 Reeled Plastic Shrink SOIC (SSOP)
3 Family
Example: FCT Bus Interface, TTL Input Levels
4 Type Designation
Up to Five Digits
FAST is a trademark of Fairchild Semiconductor. A8
LOGIC SYMBOLIZATION GUIDELINES

In the past, logic products had the complete device name on the package. It has become necessary to reduce the character count, as package types have become smaller and logic names longer. Information in the following tables is intended to help interpret TIs logic symbolization. Table A-1 defines a name rule (A, B, or C) based on the type of package for a specific device. Each name rule differs in the number of characters that are symbolized on the package. Name rule A uses the complete, or fully qualified, device name. Name rules B and C include fewer characters, respectively. Table A-2 is a listing of the various logic products by name rule. Example: Assume a 48-pin TVSOP with the symbolization VH***. Locate the 48-pin TVSOP (DGV) package in Table A-1, and find the name rule used (C). Proceed to Table A-2, and find VH*** in the Name Rule C column. The most complete device number, SN74ALVCH16***, is located in the Name Rule A column. See the following information and Tables A-3 and A-4 for little-logic (PicoGate Logic and Microgate Logic) packages.
A9
Table A 1.
Name Rule Decision Tree
PACKAGE LFBGA
NO. PINS 96 114 8
NAME RULE C C A A A A B A B C B B B A A C B C B C B C B B B B B B C
PACKAGE DESIGNATOR GKE GKF P N NP, NT FN FN FN DBQ D D DW RC PH PQ PS NS DB DL PW DGG DGV DBB PAH PAG, PM PN PZ, PCA PCB GQL
PDIP
14, 16, 20 24, 28 28
PLCC
44 68
QSOP
16, 20, 24 8
SOIC
14, 16 16, 20, 24, 28 52
QFP
80 100, 132
SOP
8 14, 16, 20, 24 14, 16, 20, 24, 28, 30, 38 28, 48, 56 8, 14, 16, 20, 24, 28 48, 56, 64 14, 16, 20, 24, 48, 56 80 52 64
SSOP
TSSOP
TVSOP
TQFP
80 100 120
VFBGA
56
A10
Table A 2.
Typical Logic Package Symbolization Guidelines
NAME RULE A 74AC*** 74AC11*** 74ACT*** 74ACT1*** 74ACT11*** CD74HC*** CD74HCT*** CD74AC*** CD74ACT*** SN64BCT*** SN64BCT2*** SN64BCT25*** SN64BCT29*** SN74ABT*** SN74ABT***-S SN74ABT16*** SN74ABT162*** SN74ABT18*** SN74ABT2*** SN74ABT5*** SN74ABT8*** SN74ABTE16*** SN74ABTH*** SN74ABTH16*** SN74ABTH162*** SN74ABTH18*** SN74ABTR2*** SN74AHC*** SN74AHC16*** SN74AHCH16*** SN74AHCT*** SN74AHCT16*** SN74AHCTH16*** SN74AHCU*** SN74ALB16*** SN74ALS*** SN74ALVC*** SN74ALVC16*** SN74ALVC162*** SN74ALVCH*** For NS package only
NAME RULE B AC*** AC11*** ACT*** ACT1*** ACT11*** HC***M HCT***M AC***M ACT***M DCT*** DCT2*** DCT25*** DCT29*** ABT*** ABT***-S ABT16*** ABT162*** ABT18*** ABT2*** ABT5*** ABT8*** ABTE16*** ABTH*** ABTH16*** ABTH162*** ABTH18*** ABTR2*** AHC*** AHC16*** AHCH16*** AHCT*** AHCT16*** AHCTH16*** AHCU*** ALB16*** ALS*** ALVC*** ALVC16*** ALVC162*** ALVCH***
NAME RULE C AC*** AE*** AD*** AU*** AT*** HJ*** HK*** HL*** HM*** DT*** DA*** DC*** DD*** AB*** AB***-S AH*** AH2*** AJ*** AA*** AF*** AG*** AN*** AK*** AM*** AM2*** AL*** AR*** HA*** HE*** HH*** HB*** HF*** HG*** HD*** AV*** G*** VA*** VC*** VC2*** VB***
NAME RULE A SN74ALVCH16*** SN74ALVCH162*** SN74ALVCH32*** SN74ALVCHG16*** SN74ALVCHG162*** SN74ALVCHR16*** SN74ALVCHR162*** SN74ALVCHS162*** SN74ALVTH16*** SN74ALVTH162*** SN74ALVTH32*** SN74AS*** SN74AS*** SN74AVC*** SN74AVC16*** SN74AVC32*** SN74AVCH16*** SN74BCT*** SN74BCT11*** SN74BCT2*** SN74BCT25*** SN74BCT29*** SN74BCT8*** SN74CBT*** SN74CBT16*** SN74CBT3*** SN74CBT6*** SN74CBTD*** SN74CBTD16*** SN74CBTD3*** SN74CBTH16*** SN74CBTLV16*** SN74CBTLV3*** SN74CBTS*** SN74CBTS16*** SN74CBTS3*** SN74F*** SN74F*** SN74HC*** SN74HCT***
NAME RULE B ALVCH16*** ALVCH162*** ALVCH32*** ALVCHG16*** ALVCHG162*** ALVCHR16*** ALVCHR162*** ALVCHS162*** ALVTH16*** ALVTH162*** ALVTH32*** AS*** 74AS*** AVC*** AVC16*** AVC32*** AVCH16*** BCT*** BCT11*** BCT2*** BCT25*** BCT29*** BCT8*** CBT*** CBT16*** CBT3*** CBT6*** CBTD*** CBTD16*** CBTD3*** CBTH16*** CBTLV16*** CBTLV3*** CBTS*** CBTS16*** CBTS3*** F*** 74F*** HC*** HCT***
NAME RULE C VH*** VH2*** ACH*** VG*** VG2*** VR*** VR2*** VS2*** VT*** VT2*** VL*** AS*** AS*** AVC*** CVA*** ACV*** CVH*** BT*** BB*** BA*** BC*** BD*** BG*** CT*** CY*** CU*** CT6*** CD*** CYD*** CC*** CYH*** CN*** CL*** CS*** CYS*** CR*** F*** F*** HC*** HT***
A11
Table A 2.
Typical Logic Package Symbolization Guidelines (continued)
NAME RULE A SN74HCU*** SN74LS*** SN74LS*** SN74LV*** SN74LV*** SN74LVC*** SN74LVC16*** SN74LVC2*** SN74LVC4*** SN74LVC8*** SN74LVCC3*** SN74LVCC4*** SN74LVCH*** SN74LVCH16*** SN74LVCH162*** SN74LVCH32*** SN74LVCHR162*** SN74LVCR2*** For NS package only
NAME RULE B HCU*** LS*** 74LS*** LV*** 74LV*** LVC*** LVC16*** LVC2*** LVC4*** LVC8*** LVCC3*** LVCC4*** LVCH*** LVCH16*** LVCH162*** LVCH32*** LVCHR162*** LVCR2***
NAME RULE C HU*** LS*** LS*** LV*** LV*** LC*** LD*** LE*** LJ*** LC8*** LH*** LG*** LCH*** LDH*** LN2*** CH*** LR2*** LER***
NAME RULE A SN74LVCU*** SN74LVCZ*** SN74LVCZ16*** SN74LVT*** SN74LVT***-S SN74LVT162*** SN74LVT18*** SN74LVT2*** SN74LVTH*** SN74LVTH16*** SN74LVTH162*** SN74LVTH2*** SN74LVTR*** SN74LVTT*** SN74LVTZ*** SN74LVU*** SN74S*** SN74S***
NAME RULE B LVCU*** LVCZ*** LVCZ16*** LVT*** LVT***-S LVT162*** LVT18*** LVT2*** LVTH*** LVTH16*** LVTH162*** LVTH2*** LVTR*** LVTT*** LVTZ*** LVU*** S*** 74S***
NAME RULE C LCU*** CV*** CW*** LX*** LX***-S LZ*** T18*** LY*** LXH*** LL*** LL2*** LK*** LXR*** LXT*** LXZ*** LU*** S*** S***
A12

DCK and DBV 5 Pin SOT Packages
The DCK (PicoGate Logic) and DBV (Microgate Logic) 5-pin packages are very small and have space for only three or four symbolization characters. The format of the characters is 1, 2, 4, or 1, 2, 3, 4 where:
PACKAGE Device technology Device function Wafer fabrication/assembly test site code DCK 1 2 3 DBV 1 2, 3 4 TABLE See Table A-3 See Table A-4
Tables A-3 and A-4 list the possible device technology and function codes for the 5-pin packages. In some cases, the tables may list a device technology or function that is not yet available. The wafer fabrication and assembly-test site is coded into the final character for both packages. Additional tracking information is coded into dots or marks adjacent to the device pins. For further information about a specific device, please contact your local field sales office or the TI Product Information Center.
PicoGate Logic
PicoGate Logic uses a three-character name rule. The first character denotes the technology family, the second character denotes device function, and the third character denotes a wafer fabrication and assembly-test facility combination (for internal tracking, here denoted by x). Example: A PicoGate Logic device with a package code of BAx is an SN74AHCT1G00DBV.
Microgate Logic
Microgate Logic uses a four-character name rule. The first character denotes the technology family, the second and third characters denote device function, and the fourth character denotes a wafer fabrication and assembly-test facility combination (for internal tracking, here denoted by x). Example: A Microgate Logic device with a package code of A02x is an SN74AHC1G02DCK.
A13
Table A 3.
Device Technology Codes
TECHNOLOGY AHC AHCT ALVC CBT CBTD LVC1G**A LVC1G**B CBTLV1G

Table A 4.
CODE A B G S P L C V
Device Function Codes
FUNCTION 00 02 04 05 06 07 08 125 126 132 14 157 240 241 245 32 79 80 86 4066 U04
DCK A B C 5 T V E M N Y F K
DBV 00 02 04 05 06 07 08 25 26 3B 14 57 40 41 45
G R X H L D
32 79 80 86 U4
A14
MOISTURE SENSITIVITY BY PACKAGE
Table A-5 lists the moisture sensitivity of TI packages by level. Some packages differ in level by pin count. Where no pin count is shown, all packages of that type used in the assembly of logic products have the same moisture-sensitivity level.
Table A 5. Package Moisture Sensitivity by Levels
PACKAGE PLCC SOT SOP SOIC
LEVEL 1 FN (20/28) DBV (5) DCK (5) NS (14/16/20) PS (8) D (8/14/16) DW (16/20/24/28) DB (14/16/20/24/28/30/38) DBQ (16/20/24) DL (28/48/56) DGG (48/56/64) PW (8/14/16/20/24) DBB (80) DGV (14/16/20/24/48/56)
LEVEL 2
LEVEL 2A
LEVEL 3 FN (44/68)
LEVEL 4
SSOP
TSSOP TVSOP QFP
RC (52) PAG (64) PCA (100) PN (80) PZ (100) GKE (96) GKF (114) GQL (56)
TQFP
PM (64)
MicroStar BGA MicroStar Junior BGA
NOTES: 1. No current device packages are moisture-sensitivity levels 5 or 6. 2. Some device types in these packages may have different moisture-sensitivity levels than shown.
TIs through-hole packages (N, NT) have not been tested per the JESD22-A112A/JESD22-A113A standards. Due to the nature of the through-hole PCB soldering process, the component package is shielded from the solder wave by the PC board and is not subjected to the higher reflow temperatures experienced by surface-mount components. TIs through-hole component packages are classified as not moisture sensitive.
A15
MOISTURE SENSITIVITY BY PACKAGE
The information in Table A-6 was derived using the test procedures in JESD22-A112A and JESD22-A113A. The Floor Life column lists the time that products can be exposed to the open air while in inventory or on the manufacturing floor. The worst-case environmental conditions are given. The Soak Requirements column lists the preconditioning, or soak, conditions used when testing to determine the floor-life exposure time.
Table A 6. Moisture Sensitivity Levels
(JESD22 A112A/JESD22 A113A)
FLOOR LIFE LEVEL 1 2 2A 3 4 5 6 CONDITIONS 30C/90% RH 30C/60% RH 30C/60% RH 30C/60% RH 30C/60% RH 30C/60% RH 30C/60% RH TIME (hours) Unlimited 1 year 4 weeks 168 72 24 6
SOAK REQUIREMENTS CONDITIONS 85C/85% RH 85C/60% RH 30C/60% RH 30C/60% RH 30C/60% RH 30C/60% RH 30C/60% RH TIME (hours) 168 168 696 X + Y = Z 24 + 168 = 192 24 + 72 = 96 24 + 24 = 48 0+6=6
RH = Relative humidity X + Y = Z, where: X = Default value of time between bake and bag. If the actual time exceeds this value, use the actual time and adjust the soak time (Z). For levels 36, X can be standardized at 24 hours as long as the actual time does not exceed this value. Y = Floor life of package after it is removed from dry-pack bag Z = Total soak time for the evaluation
For more information, see:
Packaging Material Standards for Moisture-Sensitive Items, EIA Std EIA-583 Symbol and Labels for Moisture-Sensitive Devices, EIA/JEDEC Engineering Publication EIA/JEP113-B, May 1999 Guidelines for the Packing, Handling, and Repacking of Moisture-Sensitive Components, EIA/JEDEC Publication EIA/JEP124, December 1995
A16
PACKAGING CROSS REFERENCE
Table A-7 is a packaging cross-reference for TI and other semiconductor manufacturing companies. If a specific alternate source agreement exists between TI and a particular company, the cell is shaded.
Table A 7. Logic Package Competitive Cross Reference
PACKAGE PACKAGE TYPE NO. PINS 96 114 14 16 PDIP 20 24 28 14 16 SOIC 16 20 24 28 14 16 16 20 20 24 SSOP 24 28 30 38 28 48 56 14 16 20 TSSOP 24 28 48 56 64
TI TIACQUIRED HARRIS TIACQUIRED CYPRESS FAIRCHILD HITACHI IDT IDTACQUIRED QUALITY ON (formerly Motorola) PERICOM PHILIPS TOSHIBA
LFBGA
GKE GKF N N N NT NT D D DW DW DW DW DB DB DBQ DB DBQ DB DBQ DB DB DB DL DL DL PW PW PW PW PW DGG DGG DGG
E E E EN M M M M SM SM SM
P P P P P S0 S0 S0 S0 S0 S0 Q Q Q Q PV PV PA PA
N,P P P SP M,S M,S WM WM SJ SJ MSA QSC MSA MEA MEA MTC MTC MTC MTC MTD MTD
DP DP DP DP DP FP FP FP FP FP TTP TTP TTP TTP TTP TTP TTP TTP
BF BF P P P PT PT DC DC SO SO SO SO Q PY Q PY Q PY PV PV PG PG PG PA PA
P P S1 S1 S0 S0 S0 S0 Q Q Q PV PV PA PA PA
N N N N D D DW DW DW SD SD SD SD DT DT DT DT
NB P P P P P W W S S S S H H Q H Q H Q H V V L L L L L A A
GKE GKF N N N N2 D D DW DW DW DB DB DB DB DB DL DL PW/DH PW/DH PW/DH PW/DH DGG DGG
P FN FN FW FS FS FS FS FS FS FT FT
A17
Table A 7.
Logic Package Competitive Cross Reference (continued)
PACKAGE C G PACKAGE TYPE O NO. PINS 14 16 20 TVSOP 24 48 56 80 VFBGA Single g Gate Dual Gate Tape and Reel 56 5 5 8 8
TI TIACQUIRED HARRIS TIACQUIRED CYPRESS FAIRCHILD HITACHI IDT IDTACQUIRED QUALITY ON (formerly Motorola) PERICOM PHILIPS TOSHIBA
DGV DGV DGV DGV DGV DGV DBB GQL DBV DCK DCT DCU R#||
P5
TTP MPAK CMPAK SSOP-8
PF PF
Q1
T1, T3, T4, R1, R2, RL
K K6
DGV DCK
F FU FU FK
96
T/R
EL
IDT has a TSSOP with similar specifications and lead pitch to TIs TVSOP package. Quality Semiconductors QVSOP package has the same pitch but slightly different footprint than TIs TVSOP package. Pericom has a QVSOP with similar specifications and lead pitch to TIs TVSOP package. Tape and reel packaging is valid for surface-mount packages only. All orders must be for whole reels. # LE = Left-embossed tape and reel may be seen with some DB and PW packages, however, the nomenclature is transitioning to R. || R = Standard tape and reel (required for DBB, DBV, and DGG; optional for D, DL, and DW packages) LEGEND: TI and this company have an alternate source agreement.
A18
Logic Devices
Tables A-8 through A-11 list the standard pack quantities, by package type, for tubes, reels, boxes, and trays, respectively.
Table A 8. Tube Quantities
PIN COUNT 8 DIP PLCC SOIC SSOP 50 N/A 75 N/A 14 25 N/A 50 N/A 16 25 N/A 40 NS 20 20 46 25 N/A 24 15 N/A 25 N/A 28 13 37 20 40 44 N/A 26 N/A N/A 48 N/A N/A N/A 25 56 N/A N/A N/A 20 68 N/A 18 N/A N/A
NOTE 1: QSOP (DBQ) and EIAJ devices (DB, NS, PS, and PW packages) are not available in tubes.
Table A 9. Reel Quantities
PACKAGE DESIGNATOR EIAJ surface mount LFBGA PLCC QSOP SSOP 96/114 pin 28 pin 44 pin 16/20/24 pin 48/56 pin 14/16 pin SOIC/SOP Widebody 16 pin 20/24 pin 28 pin TQFP TSSOP
Table A 10.
UNITS PER REEL 2000 1000 750 500 2500 1000 2500 2000 2000 1000 1000 2000
DBR/DBLE, NSR/NSLE, PWR/PWLE GKE, GKF FNR FNR DBQR DLR DR DWR DWR DWR PMR DGGR
Box Quantities
64 pin
PACKAGE DESIGNATOR N DIP SOIC SSOP 48/56 pin NT NP D, DW DL
UNITS PER BOX 1000 750 700 1000 1000
A19
Table A 11.
Tray Quantities
PACKAGE DESIGNATOR TQFP 64 pin PM
UNITS PER TRAY 160
A20
LOGIC OVERVIEW
FUNCTIONAL INDEX
B1
B2
Tables B-1 through B-4 list equivalent or similar product types for most logic families available in the industry, separated by voltage node and specialty logic. As the world leader in logic products, TI offers the broadest logic portfolio to meet your design needs. Alternate sourcing agreements between TI and other companies are shown with shaded table cells. Crosshatched cells are used where the products are identical (or nearly identical). Cells with no background are used where the products are similar.
Table B 1. 5 V Logic
TI ABT AC ACT AHC AHCT AHC1G AHCT1G ALS AS BCT CBT/BUS CD4000 F FCT HC HCT LS S TTL LEGEND:
FAIRCHILD ABT AC
HITACHI ABT AC
IDT
ON AC
PERICOM
PHILIPS ABT
TOSHIBA
ACT
ACT
ACT
VHC
VHC
AHC AHCT HC1G ALS
VHCT NC7S ALS AS
VHCT
BCT FST F
BC
FST, QS
PI5C
CD4000
MC14000 F
FCT
FCT
HC LS S
HC
HC LS
HC
HCT
HCT
HCT
HCT
TTL
TI and this company have an alternate source agreement.
Same product but no alternate source agreement Similar product and technology
NAME
Cypress = Cypress Semiconductor, Fairchild = Fairchild Semiconductor, Hitachi = Hitachi Semiconductor (America), Inc., IDT = Integrated Device Technology, Inc., ON = ON Semiconductor, Pericom = Pericom Semiconductor Corporation, Philips = Philips Semiconductors, Toshiba = Toshiba America Electronic Components, Inc. B3

ABT AC ACT 7SHU BC HC HCT
Table B 2.
3.3 V Logic
TI ALB ALVC CBTLV LV LVC LVT LEGEND:
FAIRCHILD VCX LVQ/LVX LCX
HITACHI ALVC LV LVC LVT
IDT ALVC QS3VH LVC/ LCX
ON VCX
PERICOM ALVC P13B
PHILIPS ALVC LV LVC LVT
TOSHIBA VCX LVQ/LVX LCX
LVQ/LVX LCX
LVT
Table B 3. 2.5 V Logic
NAME
ALVT AVC LEGEND:
Table B 4. Specialty Logic
NAME
TI ABTE FB GTL GTLP HSTL JTAG TVC PCA SSTL
FAIRCHILD ETL/VME DS GTLP SCAN
HITACHI
SSTL
LEGEND: TI and this company have an alternate source agreement.
NAME
B4
TI
PERICOM ALVT AVC
PHILIPS ALVT AVC
IDT
QS3J PCA

LCX/LPT PERICOM GTLP
PHILIPS FB GTL

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T H E

Logic Selection Guide

FOCUS ON CBT AND CBTLV PRODUCTS

FUNCTIONAL CROSS REFERENCE

DEVICE SELECTION GUIDE

PACKAGING AND SYMBOLIZATION INFORMATION

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

LOGIC SELECTION GUIDE

Copyright 2000, Texas Instruments Incorporated

TI LOGIC HOME PAGE

TI MILITARY SEMICONDUCTOR HOME PAGE

PRODUCT INFORMATION CENTER

CURRENT TI LOGIC TECHNICAL DOCUMENTATION

SECTION 1 - LOGIC OVERVIEW . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

SECTION 2 - FOCUS ON CBT AND CBTLV PRODUCTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

SECTION 3 - FUNCTIONAL INDEX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

TABLE OF CONTENTS (continued)

SECTION 4 - FUNCTIONAL CROSS REFERENCE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

SECTION 5 - DEVICE SELECTION GUIDE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

APPENDIX A - PACKAGING AND SYMBOLIZATION INFORMATION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . A-1

APPENDIX B - LOGIC PURCHASING TOOL/ALTERNATE SOURCES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . B-1

FOCUS ON CBT AND CBTLV PRODUCTS

FUNCTIONAL CROSS REFERENCE

DEVICE SELECTION GUIDE

PACKAGING AND SYMBOLIZATION INFORMATION

LOGIC PURCHASING TOOL/ALTERNATE SOURCES

SECTION 1 LOGIC OVERVIEW

Welcome to the World of TI Logic

S AHC/ AHCT BCT

Selecting a Logic Family...

highest interest first

Low Power - Migrate to Lower-Voltage Families

CBT, CBTLV, LVC, AHC, ALVC, LV, AVC, ALVT, LVT

products with DOC increase dynamic drive during switching

Product Life Cycle

IOL Drive (mA)

Family Performance Positioning

ALB ALVC ALVT

Logic Vendor Partnerships

LVT ALVC LVC LV LV

VCX LCX LVQ

LVT VCX LCX LVQ LVX

VCX LCX LVQ LVX

Complete Low-Voltage Market Coverage and Standardization

ABT LVT ALVC ALVC ALVC

AVC AVC AVC

3- and 5-V TTL and CMOS Specifications

CMOS Levels Low-Voltage Levels

VIH = 2.0 V VTH = 1.5 V VIL = 0.8 V

Interfacing Mixed Voltages

Phantom links on output side can reduce component count.

For the LVC07 function

Special Dual-Supply Level Shifters

4245 pinning VCCA DIR A1 . . . . . A8 GND GND

245 pinning VCCB VCCB OE

LVCC3245 LVCC4245 devices This pin is NC

Bus-Hold Input Characteristics

Bus Hold current

Inactive System Part

Circuit Implementation/ Modification for IOFF Circuit

When VCC = 0, IPIN = 0 for VPIN = min to max.

Power-Up 3-State/Hot Insertion