VEHICLE DRIVING SYSTEM USING TOUCH SCREEN,

INDEX CONTENTS 1. Introduction 2. Block Diagram 3. Block Diagram Description 4. Schematic 5. Schematic Description 6. Hardware Components a. Micro Controllers b. Power Supply c. RF Transmitter d. RF Receiver e. Touch screen f. Motor diver g. Motors h. LCD 7. Circuit Description 8. Software components a. About Kiel b. Embedded C 9. KEIL procedure description 10. 11. 12. Conclusion (or) Synopsis Future Aspects Bibliography

INTRODUCTION EMBEDDED SYSTEM: An embedded system is a special-purpose system in which the computer is completely encapsulated by or dedicated to the device or system it controls. Unl ike a general-purpose computer, such as a personal computer, an embedded system performs one or a few predefined tasks, usually with very specific requirements. Since the system is dedicated to specific tasks, design engineers can optimize it, reducing the size and cost of the product. Embedded systems are often mass-p roduced, benefiting from economies of scale. Personal digital assistants (PDAs) or handheld computers are generally c onsidered embedded devices because of the nature of their hardware design, even though they are more expandable in software terms. This line of definition conti nues to blur as devices expand. With the introduction of the OQO Model 2 with th e Windows XP operating system and ports such as a USB port both features usually belong to "general purpose computers", the line of nomenclature blurs even more . Physically, embedded systems ranges from portable devices such as digita l watches and MP3 players, to large stationary installations like traffic lights , factory controllers, or the systems controlling nuclear power plants. In terms of complexity embedded systems can range from very simple with a single microcontroller chip, to very complex with multiple units, peripherals and networks mounted inside a large chassis or enclosure.

Examples of Embedded Systems: Avionics, such as inertial guidance systems, flight control hardware/software an d other integrated systems in aircraft and missiles Cellular telephones and telephone switches Engine controllers and antilock brake controllers for automobiles Home automation products, such as thermostats, air conditioners, sprinklers, and security monitoring systems Handheld calculators Handheld computers Household appliances, including microwave ovens, washing machines, television se ts, DVD players and recorders Medical equipment Personal digital assistant Videogame consoles Computer peripherals such as routers and printers.

BLOCK DIAGRAM:

TRANSMITTER SECTION:

RECEIVER SECTION:

POWER SUPPLY:

DESCRIPTION: In this project, there are two sections (transmi tter & receiver) as shown in the block diagrams. The instructions such as Left, Right etc are processed and are given by the person by operating touch screen. S o based upon input of touch screen the following output will be seen i.e. left o r right. In Transmitter Section, the instructions are delivered through touch sc reen from microcontroller which is given to the RF transmitter. This informatio n is processed and is sent to the receiver section via wireless. In Receiver Section, the signals from the transmitter section are received by the RF receiver and send to the controller input and in the cont roller it will control the Vehicle direction according to the instruction which is being given at the transmitter section. Then the vehicle will move in that pa rticular direction for the given instruction. TECHNOLOGY: Every system is automated in order to face new challenges in the present day sit uation. Automated systems have less manual operations, so that the flexibility, reliabilities are high and accurate. Hence every field prefers automated control systems. Especially in the field of electronics automated systems are doing bet

ter performance. Any automated system will work effectively if it access wireles sly. Here in this project we are going to use RF communication for remote access ing of automated system. Probably the most useful thing to know about the RF com munication is that it is an international standard communication. RF communication works by creating electromagnetic waves at a source and being a ble to pick up those electromagnetic waves at a particular destination. These el ectromagnetic waves travel through the air at near the speed of light. The wavel ength of an electromagnetic signal is inversely proportional to the frequency; t he higher the frequency, the shorter the wavelength.

SOFTWARE USED: 1. Embedded C 2. Keil IDE 3. Uc-Flash HARDWARE USED: 1. Micro Controllers 2. Power Supply 3. ZIGBEE Transceivers 4. Sensors 5. Keypad 6. LCD 7. Buzzer 8. Motors BLOCK DIAGRAM EXPLANATION: MICRO CONTROLLER: In this project work the micro-controller is plays major role. Micro-controllers were originally used as components in complicated process-control systems. Ho wever, because of their small size and low price, Micro-controllers are now also being used in regulators for individual control loops. In several areas Micro -controllers are now outperforming their analog counterparts and are cheaper as well. POWER SUPPLY All digital circuits require regulated power supply. In this article we are goin g to learn how to get a regulated positive supply from the mains supply. Figure 1 shows the basic block diagram of a fixed regulated power supply. Let us go through each block. TRANSFORMER A transformer consists of two coils also called as WINDINGS namely PRIMARY & SECON DARY. They are linked together through inductively coupled electrical conductors also called as CORE. A changing current in the primary causes a change in the Magneti c Field in the core & this in turn induces an alternating voltage in the seconda ry coil. If load is applied to the secondary then an alternating current will fl ow through the load. If we consider an ideal condition then all the energy from the primary circuit will be transferred to the secondary circuit through the mag

netic field. So The secondary voltage of the transformer depends on the number of turns in the P rimary as well as in the secondary.

Rectifier A rectifier is a device that converts an AC signal into DC signal. For rectifica tion purpose we use a diode, a diode is a device that allows current to pass onl y in one direction i.e. when the anode of the diode is positive with respect to the cathode also called as forward biased condition & blocks current in the reve rsed biased condition. Rectifier can be classified as follows: 1) Half Wave rectifier. This is the simplest type of rectifier as you can see in the diagram a half wave rectifier consists of only one diode. When an AC signal is applied to it during the positive half cycle the diode is forward biased & current flows through it. But during the negative half cycle diode is reverse biased & no current flows t hrough it. Since only one half of the input reaches the output, it is very ineff icient to be used in power supplies.

2) Full wave rectifier. Half wave rectifier is quite simple but it is very inefficient, for greater effi ciency we would like to use both the half cycles of the AC signal. This can be a chieved by using a center tapped transformer i.e. we would have to double the si ze of secondary winding & provide connection to the center. So during the positi ve half cycle diode D1 conducts & D2 is in reverse biased condition. During the negative half cycle diode D2 conducts & D1 is reverse biased. Thus we get both t he half cycles across the load. One of the disadvantages of Full Wave Rectifier design is the necessity of using a center tapped transformer, thus increasing the size & cost of the circuit. Th is can be avoided by using the Full Wave Bridge Rectifier.

3) BridgeRectifier. As the name suggests it converts the full wave i.e. both the positive & the nega

tive half cycle into DC thus it is much more efficient than Half Wave Rectifier & that too without using a center tapped transformer thus much more cost effecti ve than Full Wave Rectifier. Full Bridge Wave Rectifier consists of four diodes namely D1, D2, D3 and D4. Dur ing the positive half cycle diodes D1 & D4 conduct whereas in the negative half cycle diodes D2 & D3 conduct thus the diodes keep switching the transformer conn ections so we get positive half cycles in the output. If we use a center tapped transformer for a bridge rectifier we can get both pos itive & negative half cycles which can thus be used for generating fixed positiv e & fixed negative voltages. 2.2.3 FILTER CAPACITOR Even though half wave & full wave rectifier give DC output, none of them provide s a constant output voltage. For this we require to smoothen the waveform receiv ed from the rectifier. This can be done by using a capacitor at the output of th e rectifier this capacitor is also called as FILTER CAPACITOR or SMOOTHING CAPACITO R or RESERVOIR CAPACITOR. Even after using this capacitor a small amount of ripple will remain. We place the Filter Capacitor at the output of the rectifier the capacitor will charge to the peak voltage during each half cycle then will discharge its stored energy slowly through the load while the rectified voltage drops to zero, thus trying to keep the voltage as constant as possible If we go on increasing the value of the filter capacitor then the Ripple will de crease. But then the costing will increase. The value of the Filter capacitor de pends on the current consumed by the circuit, the frequency of the waveform & th e accepted ripple.

Where, Vr= accepted ripple I= current consumed F= frequency of the le so F=25hz Whereas a full wave

voltage.( should not be more than 10% of the voltage) by the circuit in Amperes. waveform. A half wave rectifier has only one peak in one cyc rectifier has Two peaks in one cycle so F=100hz.

VOLTAGE REGULATOR A Voltage regulator is a device which converts varying input voltage into a cons tant regulated output voltage. Voltage regulator can be of two types 1) Linear Voltage Regulator Also called as Resistive Voltage regulator because they dissipate the exce ssive voltage resistively as heat. 2) Switching Regulators. They regulate the output voltage by switching the Current ON/OFF very rapi dly. Since their output is either ON or OFF it dissipates very low power thus ac hieving higher efficiency as compared to linear voltage regulators. But they are more complex & generate high noise due to their switching action. For low level of output power switching regulators tend to be costly but for higher output wa ttage they are much cheaper than linear regulators. The most commonly available Linear Positive Voltage Regulators are the 78XX seri es where the XX indicates the output voltage. And 79XX series is for Negative Vo

ltage Regulators.

After filtering the rectifier output the signal is given to a voltage regulator . The maximum input voltage that can be applied at the input is 35V.Normally the re is a 2-3 Volts drop across the regulator so the input voltage should be at le ast 2-3 Volts higher than the output voltage. If the input voltage gets below th e Vmin of the regulator due to the ripple voltage or due to any other reason the voltage regulator will not be able to produce the correct regulated voltage. Circuit diagram: Fig 2.3. Circuit Diagram of power supply IC 7805: 7805 is an integrated three-terminal positive fixed linear voltage regulator. It supports an input voltage of 10 volts to 35 volts and output voltage of 5 volts . It has a current rating of 1 amp although lower current models are available. Its output voltage is fixed at 5.0V. The 7805 also has a built-in current limite r as a safety feature. 7805 is manufactured by many companies, including Nationa l Semiconductors and Fairchild Semiconductors. The 7805 will automatically reduce output current if it gets too hot.The last tw o digits represent the voltage; for instance, the 7812 is a 12-volt regulator. T he 78xx series of regulators is designed to work in complement with the 79xx ser ies of negative voltage regulators in systems that provide both positive and neg ative regulated voltages, since the 78xx series can t regulate negative voltages in such a system. The 7805 & 78 is one of the most common and well-known of the 78xx series regula tors, as it s small component count and medium-power regulated 5V make it useful for powering TTL devices.

Specifications of IC7805 SPECIFICATIONS IC 7805 Vout 5V Vein - Vout Difference 5V - 20V Operation Ambient Temp 0 - 125C Output Imax 1A

LCD MODULE To display interactive messages we are using LCD Module. We examine an intellige nt LCD display of two lines,16 characters per line that is interfaced to the con trollers. The protocol (handshaking) for the display is as shown. Whereas D0 to D7th bit is the Data lines, RS, RW and EN pins are the control pins and remainin g pins are +5V, -5V and GND to provide supply. Where RS is the Register Select, RW is the Read Write and EN is the Enable pin. The display contains two internal byte-wide registers, one for commands (RS=0) and the second for characters to be displayed (RS=1). It also contains a user-pr ogrammed RAM area (the character RAM) that can be programmed to generate any des ired character that can be formed using a dot matrix. To distinguish between the se two data areas, the hex command byte 80 will be used to signify that the disp lay RAM address 00h will be chosen.Port1 is used to furnish the command or data type, and ports 3.2 to3.4 furnish register select and read/write levels. The display takes varying amounts of time to accomplish the functions as listed. LCD bit 7 is monitored for logic high (busy) to ensure the display is overwritt en. Liquid Crystal Display also called as LCD is very helpful in providing user inte rface as well as for debugging purpose. The most common type of LCD controller i s HITACHI 44780 which provides a simple interface between the controller & an LC D. These LCD s are very simple to interface with the controller as well as are c ost effective. 2x16 Line Alphanumeric LCD Display The most commonly used ALPHANUMERIC displays are 1x16 (Single Line & 16 characte rs), 2x16 (Double Line & 16 character per line) & 4x20 (four lines & Twenty char acters per line). The LCD requires 3 control lines (RS, R/W & EN) & 8 (or 4) data lines. The numbe r on data lines depends on the mode of operation. If operated in 8-bit mode then 8 data lines + 3 control lines i.e. total 11 lines are required. And if operate d in 4-bit mode then 4 data lines + 3 control lines i.e. 7 lines are required. H ow do we decide which mode to use? Its simple if you have sufficient data lines you can go for 8 bit mode & if there is a time constrain i.e. display should be faster then we have to use 8-bit mod e because basically 4-bit mode takes twice as more time as compared to 8-bit mod e. Pin Symbol Function 1 Vss Ground 2 Vdd Supply Voltage 3 Vo Contrast Setting 4 RS Register Select 5 R/W Read/Write Select 6 En Chip Enable Signal 7-14 DB0-DB7 Data Lines 15 A/Vee Gnd for the backlight 16 K Vcc for backlight When RS is low (0), the data is to be treated as a command. When RS is high (1), the data being sent is considered as text data which should be displayed on the screen.

When R/W is low (0), the information on the data bus is being written to the LCD . When RW is high (1), the program is effectively reading from the LCD. Most of the times there is no need to read from the LCD so this line can directly be con nected to Gnd thus saving one controller line. The ENABLE pin is used to latch the data present on the data pins. A HIGH - LOW signal is required to latch the data. The LCD interprets and executes our comman d at the instant the EN line is brought low. If you never bring EN low, your ins truction will never be executed. COMMANDS USED IN LCD 433 MHZ RF TRANSMITTER STT-433 Overview The STT-433 is ideal for remote control applications where low cost and longer r ange is required. The transmitter operates from a1.5-12V supply, making it ideal for battery-powered applications. The transmitter employs a SAW-stabilized osci llator, ensuring accurate frequency control for best range performance. Output p ower and harmonic emissions are easy to control, making FCC and ETSI compliance easy. The manufacturing-friendly SIP style package and low-cost make the STT-433 suitable for high volume applications. Features 433.92 MHz Frequency Low Cost 1.5-12V operation 11mA current consumption at 3V Small size 4 dBm output power at 3V 3. Applications Remote Keyless Entry (RKE) Remote Lighting Controls On-Site Paging Asset Tracking Wireless Alarm and Security Systems Long Range RFID Automated Resource Management

OPERATION Theory OOK(On Off Keying) modulation is a binary form of amplitude modulation. When a l ogical 0 (data line low) is being sent, the transmitter is off, fully suppressin g the carrier. In this state, the transmitter current is very low, less than 1mA . When a logical 1 is being sent, the carrier is fully on. In this state, the mo dule current consumption is at its highest, about 11mA with a 3V power supply. OOK is the modulation method of choice for remote control applications where pow er consumption and cost are the primary factors. Because OOK transmitters draw n o power when they transmit a 0, they exhibit significantly better power consumpt ion than FSK transmitters. OOK data rate is limited by the start-up time of the oscillator. High-Q oscillators which have very stable center frequencies take lo nger to start-up than low-Q oscillators. The start-up time of the oscillator det ermines the maximum data rate that the transmitter can send. Data Rate The oscillator start-up time is on the order of 40uSec, which limits the maximum

data rate to 4.8 kbit/sec. SAW stabilized oscillator The transmitter is basically a negative resistance LC oscillator whose center fr equency is tightly controlled by a SAW resonator. SAW (Surface Acoustic Wave) re sonators are fundamental frequency devices that resonate at frequencies much hig her than crystals. 433 MHZ RF RECEIVER STR-433 Overview The STR-433 is ideal for short-range remote control applications where cost is a primary concern. The receiver module requires no external RF componen ts except for the antenna. It generates virtually no emissions, making FCC and E TSI approvals easy. The super-regenerative design exhibits exceptional sensitivi ty at a very low cost. The manufacturing-friendly SIP style package and low-cost make the STR-433 suitable for high volume applications.

Features Low Cost 5V operation 3.5mA current drain No External Parts are required Receiver Frequency: 433.92 MHZ Typical sensitivity: -105dBm IF Frequency: 1MHz Applications Car security system Sensor reporting Automation system Remote Keyless Entry (RKE) Remote Lighting Controls On-Site Paging Asset Tracking Wireless Alarm and Security Systems Long Range RFID Automated Resource Management

OPERATION Super-Regenerative AM Detection The STR-433 uses a super-regenerative AM detector to demodulate t he incoming AM carrier. A super regenerative detector is a gain stage with posit ive feedback greater than unity so that it oscillates. An RC-time constant is in cluded in the gain stage so that when the gain stage oscillates, the gain will b e lowered over time proportional to the RC time constant until the oscillation e ventually dies. When the oscillation dies, the current draw of the gain stage de creases, charging the RC circuit, increasing the gain, and ultimately the oscill ation starts again. In this way, the oscillation of the gain stage is turned on and off at a rate set by the RC time constant. This rate is chosen to be super-a udible but much lower than the main oscillation rate. Detection is accomplished by measuring the emitter current of the gain stage. Any RF input signal at the f requency of the main oscillation will aid the main oscillation in Restarting. If the amplitude of the RF input increases, the main oscillation wil l stay on for a longer period of time, and the emitter current will be higher. T herefore, we can detect the original base-band signal by simply low-pass filteri ng the emitter current.

The average emitter current is not very linear as a function of the RF input level. It exhibits a 1/ln response because of the exponentially rising nature of oscillator start-up. The steep slope of a logarithm near zero results in high sensitivity to small input signals. Data Slicer The data slicer converts the base-band analog signal from the su per-regenerative detector to a CMOS/TTL compatible output. Because the data slic er is AC coupled to the audio output, there is a minimum data rate. AC coupling also limits the minimum and maximum pulse width. Typically, data is encoded on the transmit side using pulse-width modulation (PWM) or non-return-to -zero (NRZ). The most common source for NRZ data is from a UART embedded in a mi cro-controller. Applications that use NRZ data encoding typically involve microc ontrollers. The most common source for PWM data is from a remote control IC such as the HC-12E from Holtek Data is sent as a constant rate square-wave. The duty cycle of that squar e wave will generally be either 33% (a zero) or 66% (a one). The data slicer on the STR-433 is optimized for use with PWM encoded data, though it will work with NRZ data if certain encoding rules are followed. Power Supply The STR-433 is designed to operate from a 5V power supply. It is crucial that th is power supply be very quiet. The power supply should be bypassed using a 0.1uF low-ESR ceramic capacitor and a 4.7Uf tantalum capacitor. These capacitors shou ld be placed as close to the power pins as possible. The STR- 433 is designed fo r continuous duty operation. From the time power is applied, it can take up to 7 50mSec for the data output to become valid. Antenna Input It will support most antenna types, including printed antennas integrated direct ly onto the PCB and simple single core wire of about 17cm. The performance of th e different antennas varies. Any time a trace is longer than 1/8th the wavelengt h of the frequency it is carrying, it should be a 50 ohm microstrip. Typical Application Remark: Antenna length about: 17cm for 433MHz TOUCHPAD

5.6Cms 7.6Cms Technology Details Resistive touchscreens are used in more applications than any other touch techno logyVfor example, PDAs, point-of-sale, industrial, medical, and office automatio n, as well as consumer electronics. All variations of resistive touchscreens hav e some things in common: The IntelliTouch surface wave is the optical standard of touch. Its pure glass c onstruction provides superior optical performance and makes it the most scratchresistant technology available. It s nearly impossible to physically "wear out" this touchscreen. IntelliTouch is widely used in kiosk, gaming, and office autom ation applications and is available for both flat panel and CRT solutions. They are all constructed similarly in layers-a back layer such as glass with a u niform resistive coating plus a polyester coversheet, with the layers separated by tiny insulating dots. When the screen is touched, it pushes the conductive co ating on the coversheet against the coating on the glass, making electrical cont act. The voltages produced are the analog representation of the position touched

. An electronic controller converts these voltages into digital X and Y coordina tes which are then transmitted to the host computer. Because resistive touchscreens are force activated, all kinds of touch input dev ices can activate the screen, including fingers, fingernails, styluses, gloved h ands, and credit cards. All have similar optical properties, resistance to chemicals and abuse. Both the touchscreen and its electronics are simple to integrate into imbedded s ystems, thereby providing one of the most practical and cost-effective touchscre en solutions. Four-Wire Resistive Four-wire resistive technology is the simplest to understand and manufacture. It uses both the upper and lower layers in the touchscreen "sandwich" to determine the X and Y coordinates. Typically constructed with uniform resistive coatings of indium tin oxide (ITO on the inner sides of the layers and silver buss bars a long the edges, the combination sets up lines of equal potential in both X and Y . In the illustration below, the controller first applies 5V to the back layer. Up on touch, it probes the analog voltage with the coversheet, reading 2.5V, which represents a left-right position or X axis. It then flips the process, applying 5V to the coversheet, and probes from the ba ck layer to calculate an up-down position or Y axis. At any time, only three of the four wires are in use (5V, ground, probe).

The primary drawback of four-wire technology is that one coordinate axis (usuall y the Y axis), uses the outer layer, the flexible coversheet, as a uniform volta ge gradient. The constant flexing that occurs on the outer coversheet with use w ill eventually cause microscopic cracks in the ITO coating, changing its electri cal characteristics (resistance), degrading the linearity and accuracy of this a xis. Unsurprisingly, four-wire touchscreens are not known for their durability. Typic ally, they test only to about 1 million touches with a finger-far less when acti vated by a pointed stylus which speeds the degradation process. Some four-wire p roducts even specify 100,000 activations within a rather large, 20 mm x 20 mm ar ea. In the real world of point-of-sale applications, a level of 100,000 activati ons with hard, pointed styluses (including fingernails, credit cards, ballpoint pens, etc.) is considered normal usage in just a few months time. Also, accuracy can drift with environmental changes. The polyester coversh eet expands and contracts with temperature and humidity changes, thereby causing long-term degradation to the coatings as well as drift in the touch location. While all of these drawbacks can be insignificant in smaller sizes, they become increasingly apparent the larger the touchscreen. Therefore, Elo normally recomm ends four-wire touchscreens in applications with a display size of 6.4" or small er.? However, the relative low cost, inherent low power consumption, and common avail ability of chipset controllers with support from imbedded operating systems, mak es Elo AT4 four-wire touchscreens ideal for hand-held devices such as PDAs, wear able computers, and many consumer devices. Eight-Wire Variation Eight-wire resistive touchscreens are a variation of four-wire construction. The

primary difference is the addition of four sensing points, which are used to st abilize the system and reduce the drift caused by environmental changes. Eight-w ire systems are usually seen in sizes of 10.4" or larger where the drift can be significant. As in four-wire technology, the major drawback is that one coordinate axis uses the outer, flexible coversheet as a uniform voltage gradient, while the inner or bottom layer acts as the voltage probe. The constant flexing that occurs on the outer coversheet will change its resistance with usage, degrading the linearity and accuracy of this axis. Although the added four sensing points helps stabilize the system against drift, they do not improve the durability or life expectancy of the screen. Therefore, Elo does not recommend eight-wire touchscreen solutions. Five-Wire Resistive As we have seen, four- and eight-wire touchscreens, while having a simple and el egant design, have a major drawback in terms of durability in that the flexing c oversheet is used to determine one of the axes. Field usage proves that the othe r axis rarely fails. Could it be possible to construct a touchscreen where all t he position sensing was on the stable glass layer? Then the coversheet would ser ve only as a voltage probe for X and Y. Microscopic cracks in the coversheet coa ting might still occur, but they would no longer cause non-linearities. The simp le buss bar design is not sufficient and a more complex linearization pattern on the edges is required. In the five-wire design, one wire goes to the coversheet (E) which serves as the voltage probe for X and Y. Four wires go to corners of the back glass layer (A, B, C, and D). The controller first applies 5V to corners A and B and grounds C and D, causing voltage to flow uniformly across the screen from the top to the b ottom. Upon touch, it reads the Y voltage from the coversheet at E. Then the con troller applies 5V to corners A and C and grounds B and D, and reads the X volta ge from E again. So, a five-wire touchscreen uses the stable bottom layer for both X- and Y-ax is measurements. The flexible coversheet acts only as a voltage-measuring probe. This means the touchscreen continues working properly even with non-uniformity in the coversheet s conductive coating. The result is an accurate, durable and m ore reliable touchscreen over four- and eight-wire designs. Six- and Seven-Wir e Variations There are some manufacturers who claim improved performance over five-wire resis tive with additional wires. The six-wire variation adds an extra ground layer to the back of the glass. It i s not needed for improved performance, and in some cases is not even connected t o the companion controller. The seven-wire variation adds two sense lines, like with the eight-wire design, to decrease drift due to environmental changes. Elo s patented AccuTouch "Z bord er" electrode pattern is a better solution to prevent drift. MOTOR DRIVER: L293D is a dual H-bridge motor driver integrated circuit (IC). Motor drivers act as current amplifiers since they take a low-current control signal and provide a higher-current signal. This higher current signal is used to drive the motors. L293D contains two inbuilt H-bridge driver circuits. In its common mode of opera tion, two DC motors can be driven simultaneously, both in forward and reverse di rection. The motor operations of two motors can be controlled by input logic at pins 2 & 7 and 10 & 15. Input logic 00 or 11 will stop the corresponding motor. Logic 01 and 10 will rotate it in clockwise and anticlockwise directions, respec tively.

Enable pins 1 and 9 (corresponding to the two motors) must be high for motors to start operating. When an enable input is high, the associated driver gets enabl ed. As a result, the outputs become active and work in phase with their inputs. Similarly, when the enable input is low, that driver is disabled, and their outp uts are off and in the high-impedance state. Pin Diagram: Pin Description: Pin No Function Name 1 Enable pin for Motor 1; active high Enable 1,2 2 Input 1 for Motor 1 Input 1 3 Output 1 for Motor 1 Output 1 4 Ground (0V) Ground 5 Ground (0V) Ground 6 Output 2 for Motor 1 Output 2 7 Input 2 for Motor 1 Input 2 8 Supply voltage for Motors; 9-12V (up to 36V) Vcc 2 9 Enable pin for Motor 2; active high Enable 3,4 10 Input 1 for Motor 1 Input 3 11 Output 1 for Motor 1 Output 3 12 Ground (0V) Ground 13 Ground (0V) Ground 14 Output 2 for Motor 1 Output 4 15 Input2 for Motor 1 Input 4 16 Supply voltage; 5V (up to 36V) Vcc 1

DC MOTOR DC motors are configured in many types and sizes, including brush less, servo, a nd gear motor types. A motor consists of a rotor and a permanent magnetic field stator. The magnetic field is maintained using either permanent magnets or elect romagnetic windings. DC motors are most commonly used in variable speed and torq ue. Motion and controls cover a wide range of components th at in some way are used to generate and/or control motion. Areas within this cat egory include bearings and bushings, clutches and brakes, controls and drives, d rive components, encoders and resolves, Integrated motion control, limit switche s, linear actuators, linear and rotary motion components, linear position sensin

g, motors (both AC and DC motors), orientation position sensing, pneumatics and pneumatic components, positioning stages, slides and guides, power transmission (mechanical), seals, slip rings, solenoids, springs. Motors are the devices that provide the actual speed and torque in a drive syste m. This family includes AC motor types (single and multiphase motors, universal , servo motors, induction, synchronous, and gear motor) and DC motors (brush les s, servo motor, and gear motor) as well as linear, stepper and air motors, and m otor contactors and starters. In any electric motor, operation is based on simple electromagnetism. A currentcarrying conductor generates a magnetic field; when this is then placed in an ex ternal magnetic field, it will experience a force proportional to the current in the conductor, and to the strength of the external magnetic field. As you are w ell aware of from playing with magnets as a kid, opposite (North and South) pola rities attract, while like polarities (North and North, South and South) repel. The internal configuration of a DC motor is designed to harness the magnetic int eraction between a current-carrying conductor and an external magnetic field to generate rotational motion.

Every DC motor has six basic parts -- axle, rotor (a.k.a., armature), stator, co mmutator, field magnet(s), and brushes. In most common DC motors (and all that B eamers will see), the external magnetic field is produced by high-strength perma nent magnets1. The stator is the stationary part of the motor -- this includes t he motor casing, as well as two or more permanent magnet pole pieces. The rotor (together with the axle and attached commutator) rotates with respect to the sta tor. The rotor consists of windings (generally on a core), the windings being el ectrically connected to the commutator. The above diagram shows a common motor l ayout -- with the rotor inside the stator (field) magnets. The geometry of the brushes, commutator contacts, and rotor windings are such th at when power is applied, the polarities of the energized winding and the stator magnet(s) are misaligned, and the rotor will rotate until it is almost aligned with the stator s field magnets. As the rotor reaches alignment, the brushes mov e to the next commutator contacts, and energize the next winding. Given our exam ple two-pole motor, the rotation reverses the direction of current through the r otor winding, leading to a "flip" of the rotor s magnetic field, and driving it to continue rotating. In real life, though, DC motors will always have more than two poles (three is a very common number). In particular, this avoids "dead spots" in the commutator. You can imagine how with our example two-pole motor, if the rotor is exactly at the middle of its rotation (perfectly aligned with the field magnets), it will get "stuck" there. Meanwhile, with a two-pole motor, there is a moment where the commutator shorts out the power supply (i.e., both brushes touch both commutato r contacts simultaneously). This would be bad for the power supply, waste energy , and damage motor components as well. Yet another disadvantage of such a simple motor is that it would exhibit a high amount of torque ripple" (the amount of to rque it could produce is cyclic with the position of the rotor). So since most small DC motors are of a three-pole design, let s tinker with the workings of one via an interactive animation (JavaScript required):

Let s start by looking at a simple 2-pole DC electric motor (here red represents a magnet or winding with a "North" polarization, while green represents a magne t or winding with a "South" polarization).

MICRO CONTROLLER 89C51 Introduction A Micro controller consists of a powerful CPU tightly coupled with memor y, various I/O interfaces such as serial port, parallel port timer or counter, i nterrupt controller, data acquisition interfaces-Analog to Digital converter, Di gital to Analog converter, integrated on to a single silicon chip. If a system is developed with a microprocessor, the designer has to go f or external memory such as RAM, ROM, EPROM and peripherals. But controller is pr ovided all these facilities on a single chip. Development of a Micro controller reduces PCB size and cost of design. One of the major differences between a Microprocessor and a Micro controller is that a controller often deals with bits not bytes as in the real world applicati on. Intel has introduced a family of Micro controllers called the MCS-51. The Major Features: Compatible with MCS-51 products 4k Bytes of in-system Reprogrammable flash memory Fully static operation: 0HZ to 24MHZ Three level programmable clock 128 * 8 bit timer/counters Six interrupt sources Programmable serial channel Low power idle power-down modes

Why AT 89C51 The system requirements and control specifications clearly rule out the use of 16, 32 or 64 bit micro controllers or microprocessors. Systems using thes e may be earlier to implement due to large number of internal features. They are also faster and more reliable but, 8-bit micro controller satisfactorily serves the above application. Using an inexpensive 8-bit Microcontroller will doom the 32-bit product failure in any competitive market place. Coming to the question of why to use AT89C51 of all the 8-bit microcontr oller available in the market the main answer would be because it has 4 Kb on ch ip flash memory which is just sufficient for our application. The on-chip Flash ROM allows the program memory to be reprogrammed in system or by conventional no n-volatile memory Programmer. Moreover ATMEL is the leader in flash technology i n todays market place and hence using AT 89C51 is the optimal solution.

You ll notice a few things from this -- namely, one pole is fully energized at a time (but two others are "partially" energized). As each brush transitions from one commutator contact to the next, one coil s field will rapidly collapse, as the next coil s field will rapidly charge up (this occurs within a few microseco nd). We ll see more about the effects of this later, but in the meantime you can see that this is a direct result of the coil windings series wiring:

AT89C51 MICROCONTROLLER ARCHITECTURE The 89C51 architecture consists of these specific features: 1. 2. 3. Eight bit CPU with registers A (the accumulator) and B Sixteen-bit program counter (PC) and data pointer (DPTR) Eight- bit stack pointer (PSW) Eight-bit stack pointer (Sp) Internal ROM or EPROM (8751) of 0(8031) to 4K (89C51) Internal RAM of 128 bytes: Four register banks, each containing eight registers Sixteen bytes, which maybe addressed at the bit level Eighty bytes of general- purpose data memory Thirty two input/output pins arranged as four 8-bit ports:p0-p3 Two 16-bit timer/counters: T0 and T1 Full duplex serial data receiver/transmitter: SBUF Control registers: TCON, TMOD, SCON, PCON, IP, and IE Two external and three internal interrupts sources. Oscillator and clock circuits. Functional block diagram of micro controller

The 89C51 oscillator and clock: The heart of the 89C51 circuitry that generates the clock pulses by which all th e internal all internal operations are synchronized. Pins XTAL1 And XTAL2 is pro vided for connecting a resonant network to form an oscillator. Typically a quart z crystal and capacitors are employed. The crystal frequency is the basic intern al clock frequency of the microcontroller. The manufacturers make 89C51 designs that run at specific minimum and maximum frequencies typically 1 to 16 MHz. Fig 3.7.2: - Oscillator and timing circuit

Types of memory: The 89C51 have three general types of memory. They are on-chip memory, external Code memory and external Ram. On-Chip memory refers to physically existing memor y on the micro controller itself. External code memory is the code memory that r esides off chip. This is often in the form of an external EPROM. External RAM is the Ram that resides off chip. This often is in the form of standard static RAM or flash RAM. a) Code memory Code memory is the memory that holds the actual 89C51 programs that is to be run . This memory is limited to 64K. Code memory may be found on-chip or off-chip. I t is possible to have 4K of code memory on-chip and 60K off chip memory simultan eously. If only off-chip memory is available then there can be 64K of off chip R OM. This is controlled by pin provided as EA b) Internal RAM

The 89C51 have a bank of 128 of internal RAM. The internal RAM is found on-chip. So it is the fastest Ram available. And also it is most flexible in ter ms of reading and writing. Internal Ram is volatile, so when 89C51 is reset, thi s memory is cleared. 128 bytes of internal memory are subdivided. The first 32 b ytes are divided into 4 register banks. Each bank contains 8 registers. Internal RAM also contains 128 bits, which are addressed from 20h to 2Fh. These bits are bit addressed i.e. each individual bit of a byte can be addressed by the user. They are numbered 00h to 7Fh. The user may make use of these variables with comm ands such as SETB and CLR. FLASH MEMORY: Flash memory (sometimes called "flash RAM") is a type of constantly-powe red non volatile that can be erased and reprogrammed in units of memory called b locks. It is a variation of electrically erasable programmable read-only memory (EEPROM) which, unlike flash memory, is erased and rewritten at the byte level, which is slower than flash memory updating. Flash memory is often used to hold c ontrol code such as the basic input/output system (BIOS) in a personal computer. When BIOS needs to be changed (rewritten), the flash memory can be written to i n block (rather than byte) sizes, making it easy to update. On the other hand, f lash memory is not useful as random access memory (RAM) because RAM needs to be addressable at the byte (not the block) level. Flash memory gets its name because the microchip is organized so that a section of memory cells are erased in a single action or "flash." The erasure is caused by Fowler-Nordheim tunneling in which electrons pierce through a thin di electric material to remove an electronic charge from a floating gate associated with each memory cell. Intel offers a form of flash memory that holds two bits (rather than one) in each memory cell, thus doubling the capacity of memory with out a corresponding increase in price. Flash memory is used in digital cellular phones, digital cameras, LAN sw itches, PC Cards for notebook computers, digital set-up boxes, embedded controll ers, and other devices.

Memory Type Features FLASH Low-cost, high-density, high-speed architecture; low power; high reliabi lity ROM Read-Only Memory Mature, high-density, reliable, low cost; time-consuming mask required, suitable for high production with stable code SRAM Static Random-Access Memory Highest speed, high-power, low-density memory; l imited density drives up cost EPROM Electrically Programmable Read-Only Memory High-density memory; must be exp osed to ultraviolet light for erasure EEPROMorE2PROM Electrically Erasable Programmable Read-Only Memory Electrically byte-erasab le; lower reliability, higher cost, lowest density DRAM Dynamic Random Access Memory High-density, low-cost, high-speed, high-power Technical Overview of Flash Memory

Flash memory is a nonvolatile memory using NOR technology, which allows the user to electrically program and erase information. Intel Flash memory uses memory ce lls similar to an EPROM, but with a much thinner, precisely grown oxide between the floating gate and the source (see Figure 2). Flash programming occurs when e lectrons are placed on the floating gate. The charge is stored on the floating g ate, with the oxide layer allowing the cell to be electrically erased through th e source. Intel Flash memory is an extremely reliable nonvolatile memory archite cture.

Fig 3.7.3: - Pin diagram of AT89C51

Pin Description: VCC: Supply voltage. GND: Ground. Port 0: Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port , each pin can sink eight TTL inputs. When ones are written to port 0 pins, the p ins can be used as high impedance inputs. Port 0 may also be configured to be th e multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pull-ups. Port 0 also receives the co de bytes during Flash programming, and outputs the code bytes during program ver ification. External pull-ups are required during program verification. Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The P ort 1 output buffers can sink/source four TTL inputs. When 1s are written to Por t 1 pins they are pulled high by the internal pull-ups and can be used as inputs . As inputs, Port 1 pins that are externally being pulled low will source curren t (IIL) because of the internal pull-ups. Port 1 also receives the low-order add ress bytes during Flash programming and verification. Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The P ort 2 output buffers can sink/source four TTL inputs. When 1s are written to Por t 2 pins they are pulled high by the internal pull-ups and can be used as inputs . As inputs, Port 2 pins that are externally being pulled low will source curren t (IIL) because of the internal pull-ups. Port 2 emits the high-order address by te during fetches from external program memory and during accesses to external d ata memories that use 16-bit addresses (MOVX @DPTR). In this application, it use s strong internal pull-ups when emitting 1s. During accesses to external data me mories that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification. Port 3: Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The P ort 3 output buffers can sink/source four TTL inputs. When 1s are written to Por t 3 pins they are pulled high by the internal pull-ups and can be used as inputs . As inputs, Port 3 pins that are externally being pulled low will source curren t (IIL) because of the pull-ups. Port 3 also serves the functions of various special features of the AT89C51 as l isted below: Port 3 also receives some control signals for Flash programming and verification

Tab 6.2.1 Port pins and their alternate functions RST: Reset input. A high on this pin for two machine cycles while the oscilla tor is running resets the device. ALE/PROG: Address Latch Enable output pulse for latching the low byte of the addre ss during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constan t rate of 1/6the oscillator frequency, and may be used for external timing or cl ocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwis e, the pin is pulled high. Setting the ALE-disable bit has no effect if the micr ocontroller is in external execution mode. PSEN: Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated t wice each machine cycle, except that two PSEN activations are skipped during eac h access to external data memory. EA/VPP: External Access Enable EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H u p to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally l atched on reset. EA should be strapped to VCC for internal program executions. This pin also rece ives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP. XTAL1: Input to the inverting oscillator amplifier and input to the internal cl ock operating circuit. XTAL2: It is the Output from the inverting oscillator amplifier. Oscillator Characteristics: XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figs 6.2.3. Either a quartz crystal or ceramic resonator may be used. To drive t he device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 6.2.4.There are no requirements on the duty c ycle of the external clock signal, since the input to the internal clocking circ uitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Fig 6.2.3 Oscillator Connections on Notes: 1. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Fig 6.2.4 External Clock Drive Configurati

 Maximum IOL per port pin: 10 mA Maximum IOL per 8-bit port: Port 0: 26 mA Ports 1, 2, 3: 15 mA Maximum total IOL for all output pins: 71 mA If IOL exceeds the test condition, VOL may exceed the related specification. Pin s are not guaranteed to sink current greater than the listed test conditions. 2. Minimum VCC for Power-down is 2V. REGISTERS: In the CPU, registers are used to store information temporarily. That i nformation could be a byte of data to be processed, or an address pointing to th e data to be fetched. The vast majority of 8051 registers are 8bit registers. I n the 8051 there is only one data type: 8bits. The 8bits of a register are show n in the diagram from the MSB (most significant bit) D7 to the LSB (least signif icant bit) D0. With an 8-bit data type, any data larger than 8bits must be brok en into 8-bit chunks before it is processed. Since there are a large number of registers in the 8051, we will concentrate on some of the widely used general-pu rpose registers and cover special registers in future chapters. D7 D6 D5 D4 D3 D2 D1 D0

The most widely used registers of the 8051 are A (accumulator), B, R0, R 1, R2, R3, R4, R5, R6, R7, DPTR (data pointer), and PC (program counter). All o f the above registers are 8-bits, except DPTR and the program counter. The accu mulator, register A, is used for all arithmetic and logic instructions. SFRs (Special Function Registers) Among the registers R0-R7 is part of the 128 bytes of RAM memory. What about registers A, B, PSW, and DPTR? Do they also have addresses? The answer is yes. In the 8051, registers A, B, PSW and DPTR are part of the group of regist ers commonly referred to as SFR (special function registers). There are many sp ecial function registers and they are widely used. The SFR can be accessed by t he names (which is much easier) or by their addresses. For example, register A has address E0h, and register B has been ignited the address F0H, as shown in ta ble. The following two points should noted about the SFR addresses. 1. The Special function registers have addresses between 80H and FFH. Thes e addresses are above 80H, since the addresses 00 to 7FH are addresses of RAM me mory inside the 8051. 2. Not all the address space of 80H to FFH is used by the SFR. The unused locations 80H to FFH are reserved and must not be used by the 8051 programmer. Regarding direct addressing mode, notice the following two points: (a) the addre ss value is limited to one byte, 00-FFH, which means this addressing mode is lim ited to accessing RAM locations and registers located inside the 8051. (b) If y ou examine the l st file for an assembly language program, you will see that the SFR registers names are replaced with their addresses as listed in table. Symbol Name Address ACC Accumulator 0E0H B B register 0F0H PSW Program status word 0D0H SP Stack pointer 81H DPTR Data pointer 2 bytes DPL Low byte 82H DPH High byte 83H P0 Port0 80H P1 Port1 90H P2 Port2 0A0H P3 Port3 0B0H IP Interrupt priority control 0B8H IE Interrupt enable control 0A8H

TMOD TCON T2CON T2MOD TH0 TL0 TH1 TL1 TH2 TL2 RCAP2H RCAP2L SCON SBUF PCON

Timer/counter mode control 89H Timer/counter control 88H Timer/counter 2 control 0C8H Timer/counter mode2 control 0C9H Timer/counter 0high byte 8CH Timer/counter 0 low byte 8AH Timer/counter 1 high byte 8DH Timer/counter 1 low byte 8BH Timer/counter 2 high byte 0CDH Timer/counter 2 low byte 0CCH T/C 2 capture register high byte T/C 2 capture register low byte 0CAH Serial control 98H Serial data buffer 99H Power control 87H

0CBH

Table: 8051 Special function register Address A Register (Accumulator) This is a general-purpose register which serves for storing intermediate results during operating. A number (an operand) should be added to the accumulator prio r to execute an instruction upon it. Once an arithmetical operation is preformed by the ALU, the result is placed into the accumulator. If a data should be tran sferred from one register to another, it must go through accumulator. For such u niversal purpose, this is the most commonly used register that none microcontrol ler can be imagined without (more than a half 8051 microcontroller s instruction s used use the accumulator in some way). B Register B register is used during multiply and divide operations which can be performed only upon numbers stored in the A and B registers. All other instructions in the program can use this register as a spare accumulator (A). During programming, each of registers is called by name so that their ex act address is not so important for the user. During compiling into machine code (series of hexadecimal numbers recognized as instructions by the microcontrolle r), PC will automatically, instead of registers name, write necessary addresses i nto the microcontroller. R Registers (R0-R7) This is a common name for the total 8 general purpose registers (R0, R1, and R2 ...R7). Even they are not true SFRs, they deserve to be discussed here because o f their purpose. The bank is active when the R registers it includes are in use. Similar to the accumulator, they are used for temporary storing variables and i ntermediate results. Which of the banks will be active depends on two bits inclu ded in the PSW Register. These registers are stored in four banks in the scope o f RAM. The following example best illustrates the useful purpose of these registers. Su ppose that mathematical operations on numbers previously stored in the R registe rs should be performed: (R1+R2) - (R3+R4). Obviously, a register for temporary storing results of addition is needed. Every thing is quite simple and the program is as follows: MOV ADD or) MOV MOV ADD A, R3; Means: move number from R3 into accumulator A, R4; Means: add number from R4 to accumulator (result remains in accumulat R5, A; Means: temporarily moves the result from accumulator into R5 A, R1; Means: move number from R1 into accumulator A, R2; Means: add number from R2 to accumulator

SUBB A, R5; Means: subtract number from R5 (there are R3+R4) 8051 Register Banks and Stack RAM memory space allocation in the 8051 There are 128 bytes of RAM in the 8051. The 128 bytes of RAM inside the 8051 are assigned addresses 00 to7FH. These 128 bytes are divided into three d ifferent groups as follows: 1. A total of 32 bytes from locations 00 to 1FH hex are set aside for regis ter banks and the stack. 2. A total of 16 bytes from locations 20 to 2FH hex are set aside for bit-a ddressable read/write memory. 3. A total of 80 bytes from locations 30H to 7FH are used for read and writ e storage, or what is normally called Scratch pad. These 80 locations of RAM ar e widely used for the purpose of storing data and parameters nu 8051 programmers .

Register banks in the 8051 A total of 32bytes of RAM are set aside for the register banks and stack . These 32 bytes are divided into 4 banks of registers in which each bank has r egisters, R0-R7. RAM locations 0 to 7 are set aside for bank 0 of R0-R7 where R 0 is RAM location 0, R1 is RAM location 1, and R2 is location 2, and so on, unti l memory location7, which belongs to R7 of bank0. The second bank of registers R0-R7 starts at RAM location 08 and goes to location 0FH. The third bank of R0R7 starts at memory location 10H and goes to location 17H. Finally, RAM locatio ns 18H to 1FH are set aside for the fourth bank of R0-R7. Fig shows how the 32 b ytes are allocated into 4 banks. As we can see from fig 1, the bank 1 uses the same RAM space as the stac k. This is a major problem in programming the 8051. we must either not use reg ister bank1, or allocate another area of RAM for the stack. Default register bank If RAM locations 00-1F are set aside for the four register banks, which register bank of R0-R7 do we have access to when the 8051 is powered up? The ans wer is register bank 0; that is , RAM locations 0, 1,2,3,4,5,6, and 7 are access ed with the names R0, R1, R2, R3, R4, R5, R6, and R7 when programming the 8051. It is much easier to refer to these RAM locations with names such as R0, R1 and so on, than by their memory locations as shown in fig 2. The register banks are switched by using the D3 & D4 bits of register PS W. FIG: RAM Allocation in the 8051 Fig: 8051 Register Banks and their RAM Addresses PSW Register (Program Status Word) This is one of the most important SFRs. The Program Status Word (PSW) contains s everal status bits that reflect the current state of the CPU. This register cont ains: Carry bit, Auxiliary Carry, two register bank select bits, Overflow flag, parity bit, and user-definable status flag. The ALU automatically changes some o f registers bits, which is usually used in regulation of the program performing. P - Parity bit. If a number in accumulator is even then this bit will be automat ically set (1), otherwise it will be cleared (0). It is mainly used during data transmission and receiving via serial communication. - Bit 1. This bit is intended for the future versions of the microcontrollers, s

o it is not supposed to be here. OV Overflow occurs when the result of arithmetical operation is greater than 255 (decimal), so that it can not be stored in one register. In that case, this bit will be set (1). If there is no overflow, this bit will be cleared (0).

RS0, RS1 - Register bank selects bits. These two bits are used to select one of the four register banks in RAM. By writing zeroes and ones to these bits, a grou p of registers R0-R7 is stored in one of four banks in RAM. RS1 RS2 Space in RAM 0 0 Bank0 00h-07h 0 1 Bank1 08h-0Fh 1 0 Bank2 10h-17h 1 1 Bank3 18h-1Fh F0 - Flag 0. This is a general-purpose bit available to the user. AC - Auxiliary Carry Flag is used for BCD operations only. CY - Carry Flag is the (ninth) auxiliary bit used for all arithmetical operation s and shift instructions. DPTR Register (Data Pointer) These registers are not true ones because they do not physically exist. They con sist of two separate registers: DPH (Data Pointer High) and (Data Pointer Low). Their 16 bits are used for external memory addressing. They may be handled as a 16-bit register or as two independent 8-bit registers. Besides, the DPTR Registe r is usually used for storing data and intermediate results which have nothing t o do with memory locations. SP Register (Stack Pointer) The stack is a section of RAM used by the CPU to store information tempo rarily. This information could be data or an address. The CPU needs this stora ge area since there are only a limited number of registers. How stacks are accessed in the 8051 If the stack is a section of RAM, there must be registers inside the CPU to point to it. The register used to access the stack is called the SP (Stack point) Register. The stack pointer in the 8051 is only 8 bits wide; which means that it can take values of 00 to FFH. When the 8051 is powered up, the SP regi ster contains value 07. This means that RAM location 08 is the first location u sed for the stack by the 8051. The storing of a CPU register in the stack is ca lled a PUSH, and pulling the contents off the stack back into a CPU register is called a POP. In other words, a register is pushed onto the stack to save it an d popped off the stack to retrieve it. The job of the SP is very critical when push and pop actions are performed. Pushing onto the stack In the 8051 the stack pointer (SP) points to the last used location of the stack . As we push data onto the stack, the stack pointer is incremented by one. Not ice that this different from many microprocessors, notably x86 processors in whi ch the SP is decremented when data is pushed onto the stack. As each PUSH is ex ecuted, the contents of the register are saved on the stack and SP is incremente d by 1. Notice that for every byte of data saved on the stack and then SP is in cremented only once. Notice also that to push the registers onto the stack we m ust use their RAM addresses. For example, the instruction PUSH pushes register R1 onto the stack. Popping from the stack Popping the contents of the stack back into a given register is the opposite pro cess of pushing. With every pop, the top byte of the stack is copied to the reg ister specified by the instruction and the stack pointer is decremented once.

The upper limit of the stack As, mentioned earlier, locations 08 to 1FH in the 8051 RAM can be used for the s tack. This is because locations 20-2FH of RAM are reserved for bit-addressable memory and must not be used by the stack. If in a program we need more than 24 bytes (08 to 1FH=24bytes) of stack, we can change the SP to point to RAM locatio ns 30-7FH. This is done with the instruction MOV SP, #XX. P0, P1, P2, P3 - Input/Output Registers

In case that external memory and serial communication system are not in use then , 4 ports with in total of 32 input-output lines are available to the user for c onnection to peripheral environment. Each bit inside these ports corresponds to the appropriate pin on the microcontroller. This means that logic state written to these ports appears as a voltage on the pin (0 or 5 V). Naturally, while read ing, the opposite occurs voltage on some input pins is reflected in the appropri ate port bit. The state of a port bit, besides being reflected in the pin, determines at the s ame time whether it will be configured as input or output. If a bit is cleared ( 0), the pin will be configured as output. In the same manner, if a bit is set to 1 the pin will be configured as input. After reset, as well as when turning the microcontroller ON, all bits on these ports are set to one (1). This means that the appropriate pins will be configured as inputs. Program counter: The important register in the 8051 is the PC (Program counter). The pro gram counter points to the address of the next instruction to be executed. As t he CPU fetches the OPCODE from the program ROM, the program counter is increment ed to point to the next instruction. The program counter in the 8051 is 16bits wide. This means that the 8051 can access program addresses 0000 to FFFFH, a to tal of 64k bytes of code. However, not all members of the 8051 have the entire 64K bytes of on-chip ROM installed, as we will see soon. Types of instructions Depending on operation they perform, all instructions are divided in several gro ups: Arithmetic Instructions Branch Instructions Data Transfer Instructions Logical Instructions Logical Instructions with bits The first part of each instruction, called MNEMONIC refers to the operation an i nstruction performs (copying, addition, logical operation etc.). Mnemonics commo nly are shortened form of name of operation being executed. For example: INC R1; Increment R1 (increment register R1) LJMP LAB5 ;Long Jump LAB5 (long jump to address specified as LAB5) JNZ LOOP ;Jump if Not Zero LOOP (if the number in the accumulator is not 0, jum p to address specified as LOOP) Another part of instruction, called OPERAND is separated from mnemonic at least by one empty space and defines data being processed by instructions. Some instru ctions have no operand; some have one, two or three. If there is more than one o perand in instruction, they are separated by comma. For example: RET - (return from sub-routine) JZ TEMP - (if the number in the accumulator is not 0, jump to address specified as TEMP) ADD A,R3 - (add R3 and accumulator) CJNE A,#20,LOOP - (compare accumulator with 20. If they are not equal, jump to a ddress specified as LOOP) Arithmetic instructions These instructions perform several basic operations (addition, subtraction, divi sion, multiplication etc.) After execution, the result is stored in the first op

erand. For example: ADD A, R1 - The result of addition (A+R1) will be stored in the accumulator.

Arithmetical Instructions Mnemonic Description Byte Number Oscillator Period ADD A,Rn Add R Register to accumulator 1 1 ADD A,Rx Add directly addressed Rx Register to accumulator 2 ADD A,@Ri Add indirectly addressed Register to accumulator 1 ADD A,#X Add number X to accumulator 2 2 ADDC A,Rn Add R Register with Carry bit to accumulator 1

2 1 1

Branch Instructions There are two kinds of these instructions: Unconditional jump instructions: After their execution a jump to a new location from where the program continues execution is executed. Conditional jump instructions: If some condition is met - a jump is executed. Ot herwise, the program normally proceeds with the next instruction.

Branch Instruction Mnemonic Description Byte Number Oscillator Period ACALL adr11 Call subroutine located at address within 2 K byte Program Memor y space 2 3 LCALL adr16 Call subroutine located at any address within 64 K byte Program Memory space 3 4 RET Return from subroutine 1 4 RETI Return from interrupt routine 1 4 AJMP adr11 Jump to address located within 2 K byte Program Memory space 2 3 LJMP adr16 Jump to any address located within 64 K byte Program Memory spac e 3 4

Data Transfer Instructions These instructions move the content of one register to another one. The register which content is moved remains unchanged. If they have the suffix X (MOVX), the d ata is exchanged with external memory. Data Transfer Instruction Mnemonic Description Byte Number Cycle Number MOV A,Rn Move R register to accumulator 1 1 MOV A,Rx Move directly addressed Rx register to accumulator 2 2 MOV A,@Ri Move indirectly addressed register to accumulator 1 1 MOV A,#X Move number X to accumulator 2 2

Logical Instructions These instructions perform logical operations between corresponding bits of two registers. After execution, the result is stored in the first operand. Logical Instructions Mnemonic Description ANL A,Rn Logical AND ANL A,Rx Logical AND Rx 2 2 ANL A,@Ri Logical AND r 1 1 ANL A,#X Logical AND Byte Number Cycle Number between accumulator and R register 1 1 between accumulator and directly addressed register between accumulator and indirectly addressed registe between accumulator and number X 2 2

Logical Operations on Bits Similar to logical instructions, these instructions perform logical operations. The difference is that these operations are performed on single bits. Logical operations on bits Mnemonic Description Byte Number Cycle Number CLR C Clear Carry bit 1 1 CLR bit Clear directly addressed bit 2 2 SETB C Set Carry bit 1 1 SETB bit Set directly addressed bit 2 2 CPL C Complement Carry bit 1 1 CPL bit Complement directly addressed bit 2 2

TIMERS On-chip timing/counting facility has proved the capabilities of the microcontrol ler for implementing the real time application. These includes pulse counting, f requency measurement, pulse width measurement, baud rate generation, etc,. Havin g sufficient number of timer/counters may be a need in a certain design applicat ion. The 8051 has two timers/counters. They can be used either as timers to gene rate a time delay or as counters to count events happening outside the microcont roller. Let discuss how these timers are used to generate time delays and we wil l also discuss how they are been used as event counters. PROGRAMMING 8051 TIMERS The 8051 has timers: Timer 0 and Timer1.they can be used either as timer

s or as event counters. Let us first discuss about the timers registers and how t o program the timers to generate time delays. BASIC RIGISTERS OF THE TIMER Both Timer 0 and Timer 1 are 16 bits wide. Since the 8051 has an 8-b it architecture, each 16-bit timer is accessed as two separate registers of low byte and high byte.

TIMER 0 REGISTERS The 16-bit register of Timer 0 is accessed as low byte and high byte. the low byte register is called TL0(Timer 0 low byte)and the high byte reg ister is referred to as TH0(Timer 0 high byte).These register can be accessed li ke any other register, such as A,B,R0,R1,R2,etc.for example, the instruction MOV TL0, #4Fmoves the value 4FH into TL0,the low byte of Timer 0.These registers can also be read like any other register.

TIMER 1 REGISTERS Timer 1 is also 16-bit register is split into two bytes, referre d to as TL1 (Timer 1 low byte) and TH1 (Timer 1 high byte).these registers are a ccessible n the same way as the register of Timer 0. TMOD (timer mode) REGISTER Both timers TIMER 0 and TIMER 1 use the same register, called TMOD, to set arious timer operation modes. TMOD is an 8-bit register in which the lower s are set aside for Timer 0 and the upper 4 bits for Timer 1.in each case; ower 2 bits are used to set the timer mode and the upper 2 bits to specify peration.

the v 4 bit the l the o

MODES: M1, M0: M0 and M1 are used to select the timer mode. There are three modes: 0, 1, 2.Mode 0 is a 13-bit timer, mode 1 is a 16-bit timer, and mode 2 is an 8-bit timer. We will concentrate on modes 1 and 2 since they are the ones used most widely. We will soon describe the characteristics of these modes, after describing the rese t of the TMOD register. GATE Gate control when set. The timer/co unter is enabled only While the INTx pin is high and the TRx control pin is. Set. When cleared, the ti mer is enabled. C/T red for timer operation m clock).set for counter Operation (input TX input Timer or counter selected clea (Input from internal syste

pin). M 1 M0 M1 0 timer mode M0 0 MODE 0

Mode bit 1 Mode bit 0 Operating Mode 13-bit 8-b

it timer/counter THx with TLx as 5 Bit pre-scaler. 0 timer mode 1 1 16-bit 16-bi t timer/counters THx with TLx are Casca ded; there is no prescaler 1 0 to reload auto reload timer/counter;THx Holds a value that is to be reloaded into TLx each time it overflows. 1 1 er mode. C/T (clock/timer) This bit in the TMOD register is used to decide whether the timer is used as a delay generator or an event counter. If C/T=0, it is used as a timer for time delay generation. The clock source for the time delay is the crystal frequency o f the 8051. This section is concerned with this choice. The timers use as an even t counter is discussed in the next section. 3 Split tim 2 8-bit au 8-bit

Serial Communication: Computers can transfer data in two ways: parallel and serial. In parallel data transfers, often 8 or more lines (wire conductors) are used to transfer data to a device that is only a few feet away. Examples of parallel data transfer are p rinters and hard disks; each uses cables with many wire strips. Although in suc h cases a lot of data can be transferred in a short amount of time by using many wires in parallel, the distance cannot be great. To transfer to a device locat ed many meters away, the serial method is used. In serial communication, the da ta is sent one bit at a time, in contrast to parallel communication, in which th e data is sent a byte or more at a time. Serial communication of the 8051 is th e topic of this chapter. The 8051 has serial communication capability built int o it, there by making possible fast data transfer using only a few wires. If data is to be transferred on the telephone line, it must be converted from 0s and 1s to audio tones, which are sinusoidal-shaped signals. A peripher al device called a modem, which stands for modulator/demodulator, performs this co nversion. Serial data communication uses two methods, asynchronous and synchronous . The synchronous method transfers a block of data at a time, while the asynchr onous method transfers a single byte at a time. In data transmission if the data can be transmitted and received, it is a duplex transmission. This is in contrast to simplex transmissions such as wit h printers, in which the computer only sends data. Duplex transmissions can be

half or full duplex, depending on whether or not the data transfer can be simult aneous. If data is transmitted one way at a time, it is referred to as half dup lex. If the data can go both ways at the same time, it is full duplex. Of cour se, full duplex requires two wire conductors for the data lines, one for transmi ssion and one for reception, in order to transfer and receive data simultaneousl y.

Asynchronous serial communication and data framing The data coming in at the receiving end of the data line in a serial dat a transfer is all 0s and 1s; it is difficult to make sense of the data unless th e sender and receiver agree on a set of rules, a protocol, on how the data is pa cked, how many bits constitute a character, and when the data begins and ends. Start and stop bits Asynchronous serial data communication is widely used for character-orie nted transmissions, while block-oriented data transfers use the synchronous meth od. In the asynchronous method, each character is placed between start and stop bits. This is called framing. In the data framing for asynchronous communicati ons, the data, such as ASCII characters, are packed between a start bit and a st op bit. The start bit is always one bit, but the stop bit can be one or two bits . The start bit is always a 0 (low) and the stop bit (s) is 1 (high). Data transfer rate The rate of data transfer in serial data communication is stated in bps (bits per second). Another widely used terminology for bps is baud rate. Howev er, the baud and bps rates are not necessarily equal. This is due to the fact t hat baud rate is the modem terminology and is defined as the number of signal ch anges per second. In modems a single change of signal, sometimes transfers seve ral bits of data. As far as the conductor wire is concerned, the baud rate and bps are the same, and for this reason we use the bps and baud interchangeably. The data transfer rate of given computer system depends on communication ports incorporated into that system. For example, the early IBMPC/XT could tra nsfer data at the rate of 100 to 9600 bps. In recent years, however, Pentium ba sed PCS transfer data at rates as high as 56K bps. It must be noted that in asy nchronous serial data communication, the baud rate is generally limited to 100,0 00bps.

RS232 Standards To allow compatibility among data communication equipment made by variou s manufacturers, an interfacing standard called RS232 was set by the Electronics Industries Association (EIA) in 1960. In 1963 it was modified and called RS232 A. RS232B AND RS232C were issued in 1965 and 1969, respectively. Today, RS232 i s the most widely used serial I/O interfacing standard. This standard is used i n PCs and numerous types of equipment. However, since the standard was set long before the advert of the TTL logic family, its input and output voltage levels are not TTL compatible. In RS232, a 1 is represented by -3 to -25V, while a 0 b it is +3 to +25V, making -3 to +3 undefined. For this reason, to connect any RS 232 to a microcontroller system we must use voltage converters such as MAX232 to convert the TTL logic levels to the RS232 voltage levels, and vice versa. MAX2 32 IC chips are commonly referred to as line drivers. RS232 pins RS232 cable is commonly referred to as the DB-25 connector. In labeling, DB-25P refers to the plug connector (male) and DB-25S is for the socket connector (fem ale). Since not all the pins are used in PC cables, IBM introduced the DB-9 Ve rsion of the serial I/O standard, which uses 9 pins only, as shown in table. DB-9 pin connector 1 2 3 4 5

6 7 8 9 (Out of computer and exposed end of cable)

Pin Functions: Pin Description 1 Data carrier detect (DCD) 2 Received data (RXD) 3 Transmitted data (TXD) 4 Data terminal ready(DTR) 5 Signal ground (GND) 6 Data set ready (DSR) 7 Request to send (RTS) 8 Clear to send (CTS) 9 Ring indicator (RI) Note: DCD, DSR, RTS and CTS are active low pins. The method used by RS-232 for communication allows for a simple connection of t hree lines: Tx, Rx, and Ground. The three essential signals for 2-way RS-232 Communications are these: TXD: carries data from DTE to the DCE. RXD: carries data from DCE to the DTE SG: signal ground 8051 connection to RS232 The RS232 standard is not TTL compatible; therefore, it requires a line driver such as the MAX232 chip to convert RS232 voltage levels to TTL levels, an d vice versa. The interfacing of 8051 with RS232 connectors via the MAX232 chip is the main topic. The 8051 has two pins that are used specifically for transferring and receiving data serially. These two pins are called TXD and RXD and a part of the port 3 group (P3.0 and P3.1). Pin 11 of the 8051 is assigned t o TXD and pin 10 is designated as RXD. These pins are TTL compatible; therefore , they require a line driver to make them RS232 compatible. One such line driver is the MAX232 chip. MAX232 converts from RS232 voltage level s to TTL voltage levels, and vice versa. One advantage of the MAX232 chip is th at it uses a +5V power source which, is the same as the source voltage for the 8 051. In the other words, with a single +5V power supply we can power both the 8 051 and MAX232, with no need for the power supplies that are common in many olde r systems. The MAX232 has two sets of line drivers for transferring and receivi ng data. The line drivers used for TXD are called T1 and T2, while the line dri vers for RXD are designated as R1 and R2. In many applications only one of each is used. CONNECTING C to PC using MAX 232

INTERRUPTS A single microcontroller can serve several devices. There are two ways to do tha

t: INTERRUPTS or POLLING. POLLING: In polling the microcontroller continuously monitors the status of a given devic e; when the status condition is met, it performs the service .After that, it mov es on to monitor the next device until each one is serviced. Although polling ca n monitor the status of several devices and serve each of them as certain condit ion are met. INTERRUPTS: In the interrupts method, whenever any devic e needs its service, the device notifies the microcontroller by sending it an in terrupts signal. Upon receiving an interrupt signal, the microcontroller interru pts whatever it is doing and serves the device. The program associated with the interrupts is called the interrupt service routine (ISR).or interrupt handler. INTERRUPTS Vs POLLING: The advantage of interrupts is that the microcontroller can serve many devices (not all the same time, of course); each device can get the attention of the mi crocontroller based on the priority assigned to it. The polling method cannot as sign priority since it checks all devices in round-robin fashion. More important ly, in the interrupt method the microcontroller can also ignore (mask) a device request for service. This is again not possible with the polling method. The mos t important reason that the interrupt method is preferable is that the polling m ethod wastes much of the microcontrollers time by polling devices that do not nee d service. So, in order to avoid tying down the microcontroller, interrupts are used. INTERRUPT SERVICE ROUTINE For every interrupt, there must be an interrupt servic e routine (ISR), or interrupt handler. When an interrupt is invoked, the microco ntroller runs the interrupts service routine. For every interrupt, there is a fi xed location in memory that holds the address of its ISR. The group of memory lo cation set aside to hold the addresses of ISR and is called the Interrupt Vector Table. Shown below: Interrupt Vector Table for the 8051: S.No. INTERRUPT ROM LOCATION (HEX) PIN FLAG CLEARING 1. Reset 0000 9 Auto

2. External hardware Interrupt 0 0003 P3.2 (12) Auto 3. Timers 0 interrupt (TF0) 000B 4. External hardware Interrupt 1(INT1) 0013 P3.3 (13) Auto 5. Timers 1 interrupt (TF1) 001B 6. Serial COM (RI and TI) 0023 Six Interrupts in the 8051:

Auto Auto Programmer clears it

In reality, only five interrupts are available to the user in the 8051, but many manufacturers data sheets state that there are six interrupts since they include reset .the six interrupts in the 8051 are allocated as above. 1. Reset. When the reset pin is activated, the 8051 jumps to address locati on 0000.this is the power-up reset. 2. Two interrupts are set aside for the timers: one for Timer 0 and one for Timer 1.Memory location 000BH and 001BH in the interrupt vector table belong to Timer 0 and Timer 1, respectively. 3. Two interrupts are set aside for hardware external harder interrupts. Pi n number 12(P3.2) and 13(P3.3) in port 3 are for the external hardware interrupt s INT0 and INT1,respectively.These external interrupts are also referred to as E X1 and EX2.Memory location 0003H and 0013H in the interrupt vector table are as

signed to INT0 and INT1, respectively. 4. Serial communication has a single interrupt that belongs to both receive and transmit. The interrupt vector table location 0023H belongs to this interru pt. Notice that a limited number of bytes are set aside for each interrupt. For exam ple, a total of 8 bytes from location 0003 to 000A is set aside for INT0, extern al hardware interrupt 0.similarly,a total of 8 bytes from location 00BH to 0012H is reserved for TF0, Timer 0 interrupt. If the service routine for a given inte rrupt is short enough to fit in the memory space allocated to it, it is placed i n the vector table; otherwise, and an LJMP instruction is placed in the vector t able to point to the address of the ISR. In that rest of the bytes allocated to that interrupt are unusedFrom the above table also notice that only three bytes of ROM space are assigned to the reset pin. they are ROM address location 0,1 a nd2.address location 3 belongs to external hardware interrupt 0.for this reason, in our program we put the LJMP as the first instruction and redirect the proc essor away from the interrupt vector table, as shown below Steps in executing an interrupt Upon activation of an interrupt, the microcontroller goes through the follow ing steps. 1. It finishes the instruction it is executing and saves the address of the next instruction (PC) on the stack. 2. It also saves the current status of all the interrupts internally (i.e., not on the stack). 3. It jumps to a fixed location in memory called the interrupt vector table that holds the address of the interrupts service routine. 4. The microcontroller gets the address of the ISR from the interrupt vecto r table and jumps to it. It starts to execute the interrupt service subroutine u ntil it reaches the last instruction of the subroutine, which is RETI (return fr om interrupt). 5. Upon executing the RETI instruction, the microcontroller returns to the place where it was interrupted. First, it gets the program counter (PC) address from the stack by popping the top two bytes of the stack into the PC. Then it st arts to execute from that address. Notice from step 5 the critical role of the stack. For this reason, we must be careful in manipulating the stack contents in the ISR. Specifically, in the I SR, just as in any CALL subroutine, the number of pushes and pops must be equal.

Enabling and disabling an interrupt: Upon reset, all interrupt are disabled (masked), meaning that none will be respo nded to by the microcontroller if they are activated. The interrupt must be enab led by software in order for the microcontroller to respond to them. There is a register called IE (interrupt enable) that is responsible for enabling (unmaskin g) and disabling (masking) the interrupts. Notice that IE is a bit-addressable register. Steps in enabling an interrupt: To enable an interrupt, we take the following steps:

1. Bit D7 of the IE register (EA) must be set to high to allow the reset to take effect. If EA=1, interrupts are enabled and will be responded to if their corresponding bit in IE are high. If EA=0, no interrupt will be responded to, even if the asso ciated bit in the IE register is high.

Interrupt Enable Register D7 EA IE.7 cknowledged. nabled disabled -ET2 rrupt (8052 ES ET1 EX1 ET0 EX0 IE.6 IE.5 IE.4 IE.3 IE.2 IE.1 IE.0 By setting or clearing its enable bit. Not implemented, reserved for future use.* Enables or disables Timer 2 overflow or capture inte Only) Enables or disables the serial port interrupts. Enables or disables Timers 1 overflow interrupt Enables or disables external interrupt 1. Enables or disables Timer 0 overflow interrupt. Enables or disables external interrupt. D6 D5 D4 D3 D2 D1 D0

disables all interrupts. If EA=0, no interrupts is a If EA=1, each interrupt source is individually e

SOFTWARE DESCRIPTION ABOUT SOFTWARE Software used: *Keil software for c programming ABOUT KEIL SOFTWARE: It is possible to create the source files in a text editor such as Notepad, run the Compiler on each C source file, specifying a list of controls, run the Assem bler on each Assembler source file, specifying another list of controls, run eit her the Library Manager or Linker (again specifying a list of controls) and fina lly running the Object-HEX Converter to convert the Linker output file to an Int el Hex File. Once that has been completed the Hex File can be downloaded to the target hardware and debugged. Alternatively KEIL can be used to create source fi les; automatically compile, link and covert using options set with an easy to us e user interface and finally simulate or perform debugging on the hardware with access to C variables and memory. Unless you have to use the tolls on the comman d line, the choice is clear. KEIL Greatly simplifies the process of creating and testing an embedded application. Projects:

The user of KEIL centers on projects. A project is a list of all the sourc e files required to build a single application, all the tool options which speci fy exactly how to build the application, and if required how the application sho uld be simulated. A project contains enough information to take a set of source files and generate exactly the binary code required for the application. Because of the high degree of flexibility required from the tools, there are many optio ns that can be set to configure the tools to operate in a specific manner. It wo uld be tedious to have to set these options up every time the application is bei ng built; therefore they are stored in a project file. Loading the project file into KEIL informs KEIL which source files are required, where they are, and how to configure the tools in the correct way. KEIL can then execute each tool with the correct options. It is also possible to create new projects in KEIL. Source files are added to the project and the tool options are set as required. The pro ject can then be saved to preserve the settings. The project is reloaded and the simulator or debugger started, all the desired windows are opened. KEIL project files have the extension Simulator/Debugger: The simulator/ debugger in KEIL can perform a very detailed simulation o f a micro controller along with external signals. It is possible to view the pre cise execution time of a single assembly instruction, or a single line of C code , all the way up to the entire application, simply by entering the crystal frequ ency. A window can be opened for each peripheral on the device, showing the stat e of the peripheral. This enables quick trouble shooting of mis-configured perip herals. Breakpoints may be set on either assembly instructions or lines of C cod e, and execution may be stepped through one instruction or C line at a time. The contents of all the memory areas may be viewed along with ability to find speci fic variables. In addition the registers may be viewed allowing a detailed view of what the microcontroller is doing at any point in time. The Keil Software 8051 development tools listed below are the programs y ou use to compile your C code, assemble your assembler source files, link your p rogram together, create HEX files, and debug your target program. Vision2 for Windows Integrated Development Environment: combines Project Management, Source C ode Editing, and Program Debugging in one powerful environment. C51 ANSI Optimizing C Cross Compiler: creates relocatable object modules from yo ur C source code, A51 Macro Assembler: creates relocatable object modules from you r 8051 assembler source code, BL51 Linker/Locator: combines relocatable object modules created by the compil er and assembler into the final absolute object module, LIB51 Library Manager: combines object modules into a library, which may be used by the linker, OH51 Object-HEX Converter: creates Intel HEX files from absolute object modules. What s New in Vision3? Vision3 adds many new features to the Editor like Text Templates, Quick Function Navigation, and Syntax Coloring with brace high lighting Configuration Wizard fo r dialog based startup and debugger setup. Vision3 is fully compatible to Vision2 and can be used in parallel with Vision2.

What is Vision3? Vision3 is an IDE (Integrated Development Environment) that helps you write, comp ile, and debug embedded programs. It encapsulates the following components: A project manager. A make facility. Tool configuration. Editor. A powerful debugger. To help you get started, several example programs (located in the \C51\Examples,

\C251\Examples, \C166\Examples, and \ARM\...\Examples) are provided. HELLO is a simple program that prints the string "Hello World" using the Serial Interface. MEASURE is a data acquisition system for analog and digital systems. TRAFFIC is a traffic light controller with the RTX Tiny operating system. SIEVE is the SIEVE Benchmark. DHRY is the Dhrystone Benchmark. WHETS is the Single-Precision Whetstone Benchmark. Additional example programs not listed here are provided for each device archite cture. Building an Application in Vision2 To build (compile, assemble, and link) an application in Vision2, you must: 1. Select Project -(forexample,166\EXAMPLES\HELLO\HELLO.UV2). 2. Select Project - Rebuild all target files or Build target. Vision2 compiles, assembles, and links the files in your project Creating Your Own Application in Vision2 To create a new project in Vision2, you must: 1. Select Project - New Project. 2. Select a directory and enter the name of the project file. 3. Select Project - Select Device and select an 8051, 251, or C16x/ST10 dev ice from the Device Database. 4. Create source files to add to the project. 5. Select Project - Targets, Groups, Files. Add/Files, select Source Group1 , and add the source files to the project. 6. Select Project - Options and set the tool options. Note when you select the target device from the Device Database all special options are set automatica lly. You typically only need to configure the memory map of your target hardware . Default memory model settings are optimal for most applications. 7. Select Project - Rebuild all target files or Build target. Debugging an Application in Vision2 To debug an application created using Vision2, you must: 1. Select Debug - Start/Stop Debug Session. 2. Use the Step toolbar buttons to single-step through your program. You ma y enter G, main in the Output Window to execute to the main C function. 3. Open the Serial Window using the Serial #1 button on the toolbar. Debug your program using standard options like Step, Go, Break, and so on. Starting Vision2 and Creating a Project Vision2 is a standard Windows application and started by clicking on the program icon. To create a new project file select from the Vision2 menu Project New Project. This opens a standard Windows dialog that asks you for the new project file name. We suggest that you use a separate folder for each project. You can simply use the icon Create New Folder in this dialog to get a new empty folder. Then select this folder and enter the file name for the new project, i.e. Project1. Vision2 creates a new project file with the name PROJECT1.UV2 which contains a default target and file group name. You can see these names in the Project Window Files. Now use from the menu Project Select Device for Target and select a CPU for your project. The Select Device dialog box shows the Vision2 device database. Just select the micro controller you use. We are using for our example s the Philips 80C51RD+ CPU. This selection sets necessary tool options for the 80C51RD+ device and simplifies in this way the tool Configuratio n

Building Projects and Creating a HEX Files Typical, the tool settings under Options Target are all you need to start a new

application. You may translate all source files and line the application with a click on the Build Target toolbar icon. When you build an application with syntax errors, Vision2 will display errors and warning messages in the Output Window Build page. A double click on a message line opens the source file on the correct location in a Vision2 editor window. Once you have successfully generated your application you can start debugging. After you have tested your application, it is required to create an Intel HEX fi le to download the software into an EPROM programmer or simulator. Vision2 create s HEX files with each build process when Create HEX files under Options for Targ et Output is enabled. You may start your PROM programming utility after the make process when you specify the program under the option Run User Program #1. CPU Simulation: Vision2 simulates up to 16 Mbytes of memory from which areas can be mapped for read, write, or code execution access. The Vision2 simulator traps and reports illegal memory accesses. In addition to memory mapping, the simulator also provides support for the Integrated peripherals of the various 8051 derivatives. The on-chip peripherals of the CPU you have selected are configured from the Device. Database selection: you have made when you create your project target. Refer to page 58 for more Information about selecting a device. You may select and display the on-chip per ipheral components using the Debug menu. You can also change the aspects of each peripheral using the controls in the dialog boxes. Start Debugging: You start the debug mode of Vision2 with the Debug Start/Stop Debug Session command. Depending on the Options for Target Debug Configuration, Vision2 will load the application program and run the startup code Vision2 saves the editor screen layout and restores the screen layout of the last debug session. If the program execution stops, Vision2 opens an editor window with the source text or shows CPU instructions in the disassembly window. The next executable statement is marked with a yellow arrow. During debu gging, most editor features are still available. For example, you can use the find command or correct program errors. Program sou rce text of your application is shown in the same windows. The Vision2 debug mode differs from the edit mode in the following aspects: _ The Debug Menu and Debug Commands described on page 28 are Available. The additional debug windows are discussed in the following. _ The project structure or tool parameters cannot be modified. All build Commands are disabled. Disassembly Window The Disassembly window shows your target program as mixed source and assembly pr ogram or just assembly code. A trace history of previously executed instructions may be displayed with Debug View Trace Records. To enable the trace history, se t Debug Enable/Disable Trace Recording. If you select the Disassembly Window as the active window all program step comma nds work on CPU instruction level rather than program source lines. You can sele ct a text line and set or modify code breakpoints using toolbar buttons or the c ontext menu commands. You may use the dialog Debug Inline Assembly to modify the CPU in structions. That allows you to correct mistakes or to make temporary changes to the target program you are debugging.

SOFTWARE COMPONENTS About Keil

1. 2.

Click on the Keil u Vision Icon on Desktop The following fig will appear

3.

Click on the Project menu from the title bar

4.

Then Click on New Project

5. Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\

6. 7. 8.

Then Click on Save button above. Select the component for u r project. i.e. Atmel Click on the + Symbol beside of Atmel

9.

Select AT89C51 as shown below

10. 11.

Then Click on OK The Following fig will appear

12.

Then Click either YES or NOmostly NO

13. Now your project is ready to USE 14. Now double click on the Target1, you would get another option Source grou p 1 as shown in next page.

15.

Click on the file option from menu bar and select new

16. The next screen will be as shown in next page, and just maximize it by d ouble clicking on its blue boarder. 17. Now start writing program in either in C or ASM 18. For a program written in Assembly, then save it with extension . asm and for C based program save it with extension .C

19.

Now right click on Source group 1 and click on Add files to Group Source

20.

Now you will get another window, on which by default C files will appear.

21. 22. 23. .

Now select as per your file extension given while saving the file Click only one time on option ADD Now Press function key F7 to compile. Any error will appear if so happen

24. 25.

If the file contains no error, then press Control+F5 simultaneously. The new window is as follows

26.

Then Click OK

27. Now Click on the Peripherals from menu bar, and check your required port as shown in fig below 28. Drag the port a side and click in the program file.

29. 30.

Now keep Pressing function key F11 slowly and observe. You are running your program successfully

Embedded C: What is an embedded system? An embedded system is an application that contains at least one programmable com puter and which is used by individuals who are, in the main, unaware that the sy stem is computer-based. Which programming language should you use? Having decided to use an 8051 processor as the basis of your embedded system, th e next key decision that needs to be made is the choice of programming language. In order to identify a suitable language for embedded systems, we might begin b y making the following observations: Computers (such as microcontroller, microprocessor or DSP chips) only accept ins tructions in machine code (object codes). Machine code is, by definition, in the lan guage of the computer, rather than that of the programmer. Interpretation of the code by the programmer is difficult and error prone. All software, whether in assembly, C, C++, Java or Ada must ultimately be transl ated into machine code in order to be executed by the computer. Embedded processors like the 8051 have limited processor power and very limited memory available: the language used must be efficient. The language chosen should be in common use.

Summary of C language Features: It is mid-level, with high-level features (such as support for functions and modules ), and low-level features (such as good access to hardware via pointers). It is very efficient. It is popular and well understood. Even desktop developers who have used only Java or C++ can soon understand C syn tax. Good, well-proven compilers are available for every embedded processor (8-bit to 32-bit or more). Basic C program structure: //- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - //Basic blank C program that does nothing // Includes //- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - #include <reg51.h> // SFR declarations Void main (void) { While (1);

{ Body of the loop // Infinite loop } } // match the braces RESULT: According to this project we can implement a system in which a vehicle direction can be controlled wirelessly with respect to the commands given by th e user through touch screen using RF technology.

BIBLIOGRAPHY NAME OF THE SITES 1. WWW.MITEL.DATABOOK.COM 2. WWW.ATMEL.DATABOOK.COM 3. WWW.FRANKLIN.COM 4. WWW.KEIL.COM REFERENCES 1. 8051-MICROCONTROLLER AND EMBEDDED SYSTEM. Mohd. Mazidi.

VEHICLE DRIVING SYSTEM USING TOUCH SCREEN,

INDEX CONTENTS 1. Introduction 2. Block Diagram 3. Block Diagram Description 4. Schematic 5. Schematic Description 6. Hardware Components a. Micro Controllers b. Power Supply c. RF Transmitter d. RF Receiver e. Touch screen f. Motor diver g. Motors h. LCD 7. Circuit Description 8. Software components

a. b. 9. 10. 11. 12.

About Kiel Embedded C KEIL procedure description Conclusion (or) Synopsis Future Aspects Bibliography

INTRODUCTION EMBEDDED SYSTEM: An embedded system is a special-purpose system in which the computer is completely encapsulated by or dedicated to the device or system it controls. Unl ike a general-purpose computer, such as a personal computer, an embedded system performs one or a few predefined tasks, usually with very specific requirements. Since the system is dedicated to specific tasks, design engineers can optimize it, reducing the size and cost of the product. Embedded systems are often mass-p roduced, benefiting from economies of scale. Personal digital assistants (PDAs) or handheld computers are generally c onsidered embedded devices because of the nature of their hardware design, even though they are more expandable in software terms. This line of definition conti nues to blur as devices expand. With the introduction of the OQO Model 2 with th e Windows XP operating system and ports such as a USB port both features usually belong to "general purpose computers", the line of nomenclature blurs even more . Physically, embedded systems ranges from portable devices such as digita l watches and MP3 players, to large stationary installations like traffic lights , factory controllers, or the systems controlling nuclear power plants. In terms of complexity embedded systems can range from very simple with a single microcontroller chip, to very complex with multiple units, peripherals and networks mounted inside a large chassis or enclosure.

Examples of Embedded Systems: Avionics, such as inertial guidance systems, flight control hardware/software an d other integrated systems in aircraft and missiles Cellular telephones and telephone switches Engine controllers and antilock brake controllers for automobiles Home automation products, such as thermostats, air conditioners, sprinklers, and security monitoring systems

 Handheld calculators Handheld computers Household appliances, including microwave ovens, washing machines, television se ts, DVD players and recorders Medical equipment Personal digital assistant Videogame consoles Computer peripherals such as routers and printers.

BLOCK DIAGRAM:

TRANSMITTER SECTION:

RECEIVER SECTION:

POWER SUPPLY:

DESCRIPTION: In this project, there are two sections (transmi tter & receiver) as shown in the block diagrams. The instructions such as Left, Right etc are processed and are given by the person by operating touch screen. S o based upon input of touch screen the following output will be seen i.e. left o r right. In Transmitter Section, the instructions are delivered through touch sc reen from microcontroller which is given to the RF transmitter. This informatio n is processed and is sent to the receiver section via wireless.

In Receiver Section, the signals from the transmitter section are received by the RF receiver and send to the controller input and in the cont roller it will control the Vehicle direction according to the instruction which is being given at the transmitter section. Then the vehicle will move in that pa rticular direction for the given instruction. TECHNOLOGY: Every system is automated in order to face new challenges in the present day sit uation. Automated systems have less manual operations, so that the flexibility, reliabilities are high and accurate. Hence every field prefers automated control systems. Especially in the field of electronics automated systems are doing bet ter performance. Any automated system will work effectively if it access wireles sly. Here in this project we are going to use RF communication for remote access ing of automated system. Probably the most useful thing to know about the RF com munication is that it is an international standard communication. RF communication works by creating electromagnetic waves at a source and being a ble to pick up those electromagnetic waves at a particular destination. These el ectromagnetic waves travel through the air at near the speed of light. The wavel ength of an electromagnetic signal is inversely proportional to the frequency; t he higher the frequency, the shorter the wavelength.

SOFTWARE USED: 1. Embedded C 2. Keil IDE 3. Uc-Flash HARDWARE USED: 1. Micro Controllers 2. Power Supply 3. ZIGBEE Transceivers 4. Sensors 5. Keypad 6. LCD 7. Buzzer 8. Motors BLOCK DIAGRAM EXPLANATION: MICRO CONTROLLER: In this project work the micro-controller is plays major role. Micro-controllers were originally used as components in complicated process-control systems. Ho wever, because of their small size and low price, Micro-controllers are now also being used in regulators for individual control loops. In several areas Micro -controllers are now outperforming their analog counterparts and are cheaper as well. POWER SUPPLY All digital circuits require regulated power supply. In this article we are goin g to learn how to get a regulated positive supply from the mains supply. Figure 1 shows the basic block diagram of a fixed regulated power supply. Let us go through each block.

TRANSFORMER A transformer consists of two coils also called as WINDINGS namely PRIMARY & SECON DARY. They are linked together through inductively coupled electrical conductors also called as CORE. A changing current in the primary causes a change in the Magneti c Field in the core & this in turn induces an alternating voltage in the seconda ry coil. If load is applied to the secondary then an alternating current will fl ow through the load. If we consider an ideal condition then all the energy from the primary circuit will be transferred to the secondary circuit through the mag netic field. So The secondary voltage of the transformer depends on the number of turns in the P rimary as well as in the secondary.

Rectifier A rectifier is a device that converts an AC signal into DC signal. For rectifica tion purpose we use a diode, a diode is a device that allows current to pass onl y in one direction i.e. when the anode of the diode is positive with respect to the cathode also called as forward biased condition & blocks current in the reve rsed biased condition. Rectifier can be classified as follows: 1) Half Wave rectifier. This is the simplest type of rectifier as you can see in the diagram a half wave rectifier consists of only one diode. When an AC signal is applied to it during the positive half cycle the diode is forward biased & current flows through it. But during the negative half cycle diode is reverse biased & no current flows t hrough it. Since only one half of the input reaches the output, it is very ineff icient to be used in power supplies.

2) Full wave rectifier. Half wave rectifier is quite simple but it is very inefficient, for greater effi ciency we would like to use both the half cycles of the AC signal. This can be a chieved by using a center tapped transformer i.e. we would have to double the si ze of secondary winding & provide connection to the center. So during the positi ve half cycle diode D1 conducts & D2 is in reverse biased condition. During the negative half cycle diode D2 conducts & D1 is reverse biased. Thus we get both t he half cycles across the load. One of the disadvantages of Full Wave Rectifier design is the necessity of using a center tapped transformer, thus increasing the size & cost of the circuit. Th is can be avoided by using the Full Wave Bridge Rectifier.

3) BridgeRectifier. As the name suggests it converts the full wave i.e. both the positive & the nega tive half cycle into DC thus it is much more efficient than Half Wave Rectifier & that too without using a center tapped transformer thus much more cost effecti ve than Full Wave Rectifier. Full Bridge Wave Rectifier consists of four diodes namely D1, D2, D3 and D4. Dur ing the positive half cycle diodes D1 & D4 conduct whereas in the negative half cycle diodes D2 & D3 conduct thus the diodes keep switching the transformer conn ections so we get positive half cycles in the output. If we use a center tapped transformer for a bridge rectifier we can get both pos itive & negative half cycles which can thus be used for generating fixed positiv e & fixed negative voltages. 2.2.3 FILTER CAPACITOR Even though half wave & full wave rectifier give DC output, none of them provide s a constant output voltage. For this we require to smoothen the waveform receiv ed from the rectifier. This can be done by using a capacitor at the output of th e rectifier this capacitor is also called as FILTER CAPACITOR or SMOOTHING CAPACITO R or RESERVOIR CAPACITOR. Even after using this capacitor a small amount of ripple will remain. We place the Filter Capacitor at the output of the rectifier the capacitor will charge to the peak voltage during each half cycle then will discharge its stored energy slowly through the load while the rectified voltage drops to zero, thus trying to keep the voltage as constant as possible If we go on increasing the value of the filter capacitor then the Ripple will de crease. But then the costing will increase. The value of the Filter capacitor de pends on the current consumed by the circuit, the frequency of the waveform & th e accepted ripple.

Where, Vr= accepted ripple I= current consumed F= frequency of the le so F=25hz Whereas a full wave

voltage.( should not be more than 10% of the voltage) by the circuit in Amperes. waveform. A half wave rectifier has only one peak in one cyc rectifier has Two peaks in one cycle so F=100hz.

VOLTAGE REGULATOR A Voltage regulator is a device which converts varying input voltage into a cons tant regulated output voltage. Voltage regulator can be of two types 1) Linear Voltage Regulator

Also called as Resistive Voltage regulator because they dissipate the exce ssive voltage resistively as heat. 2) Switching Regulators. They regulate the output voltage by switching the Current ON/OFF very rapi dly. Since their output is either ON or OFF it dissipates very low power thus ac hieving higher efficiency as compared to linear voltage regulators. But they are more complex & generate high noise due to their switching action. For low level of output power switching regulators tend to be costly but for higher output wa ttage they are much cheaper than linear regulators. The most commonly available Linear Positive Voltage Regulators are the 78XX seri es where the XX indicates the output voltage. And 79XX series is for Negative Vo ltage Regulators.

After filtering the rectifier output the signal is given to a voltage regulator . The maximum input voltage that can be applied at the input is 35V.Normally the re is a 2-3 Volts drop across the regulator so the input voltage should be at le ast 2-3 Volts higher than the output voltage. If the input voltage gets below th e Vmin of the regulator due to the ripple voltage or due to any other reason the voltage regulator will not be able to produce the correct regulated voltage. Circuit diagram: Fig 2.3. Circuit Diagram of power supply IC 7805: 7805 is an integrated three-terminal positive fixed linear voltage regulator. It supports an input voltage of 10 volts to 35 volts and output voltage of 5 volts . It has a current rating of 1 amp although lower current models are available. Its output voltage is fixed at 5.0V. The 7805 also has a built-in current limite r as a safety feature. 7805 is manufactured by many companies, including Nationa l Semiconductors and Fairchild Semiconductors. The 7805 will automatically reduce output current if it gets too hot.The last tw o digits represent the voltage; for instance, the 7812 is a 12-volt regulator. T he 78xx series of regulators is designed to work in complement with the 79xx ser ies of negative voltage regulators in systems that provide both positive and neg ative regulated voltages, since the 78xx series can t regulate negative voltages in such a system. The 7805 & 78 is one of the most common and well-known of the 78xx series regula tors, as it s small component count and medium-power regulated 5V make it useful for powering TTL devices.

Specifications of IC7805 SPECIFICATIONS IC 7805 Vout 5V Vein - Vout Difference 5V - 20V Operation Ambient Temp 0 - 125C Output Imax 1A

LCD MODULE To display interactive messages we are using LCD Module. We examine an intellige nt LCD display of two lines,16 characters per line that is interfaced to the con trollers. The protocol (handshaking) for the display is as shown. Whereas D0 to D7th bit is the Data lines, RS, RW and EN pins are the control pins and remainin g pins are +5V, -5V and GND to provide supply. Where RS is the Register Select, RW is the Read Write and EN is the Enable pin. The display contains two internal byte-wide registers, one for commands (RS=0) and the second for characters to be displayed (RS=1). It also contains a user-pr ogrammed RAM area (the character RAM) that can be programmed to generate any des ired character that can be formed using a dot matrix. To distinguish between the se two data areas, the hex command byte 80 will be used to signify that the disp lay RAM address 00h will be chosen.Port1 is used to furnish the command or data type, and ports 3.2 to3.4 furnish register select and read/write levels. The display takes varying amounts of time to accomplish the functions as listed. LCD bit 7 is monitored for logic high (busy) to ensure the display is overwritt en. Liquid Crystal Display also called as LCD is very helpful in providing user inte rface as well as for debugging purpose. The most common type of LCD controller i s HITACHI 44780 which provides a simple interface between the controller & an LC D. These LCD s are very simple to interface with the controller as well as are c ost effective. 2x16 Line Alphanumeric LCD Display The most commonly used ALPHANUMERIC displays are 1x16 (Single Line & 16 characte rs), 2x16 (Double Line & 16 character per line) & 4x20 (four lines & Twenty char acters per line). The LCD requires 3 control lines (RS, R/W & EN) & 8 (or 4) data lines. The numbe r on data lines depends on the mode of operation. If operated in 8-bit mode then 8 data lines + 3 control lines i.e. total 11 lines are required. And if operate d in 4-bit mode then 4 data lines + 3 control lines i.e. 7 lines are required. H ow do we decide which mode to use? Its simple if you have sufficient data lines you can go for 8 bit mode & if there is a time constrain i.e. display should be faster then we have to use 8-bit mod e because basically 4-bit mode takes twice as more time as compared to 8-bit mod e. Pin Symbol Function 1 Vss Ground

2 Vdd Supply Voltage 3 Vo Contrast Setting 4 RS Register Select 5 R/W Read/Write Select 6 En Chip Enable Signal 7-14 DB0-DB7 Data Lines 15 A/Vee Gnd for the backlight 16 K Vcc for backlight When RS is low (0), the data is to be treated as a command. When RS is high (1), the data being sent is considered as text data which should be displayed on the screen. When R/W is low (0), the information on the data bus is being written to the LCD . When RW is high (1), the program is effectively reading from the LCD. Most of the times there is no need to read from the LCD so this line can directly be con nected to Gnd thus saving one controller line. The ENABLE pin is used to latch the data present on the data pins. A HIGH - LOW signal is required to latch the data. The LCD interprets and executes our comman d at the instant the EN line is brought low. If you never bring EN low, your ins truction will never be executed. COMMANDS USED IN LCD 433 MHZ RF TRANSMITTER STT-433 Overview The STT-433 is ideal for remote control applications where low cost and longer r ange is required. The transmitter operates from a1.5-12V supply, making it ideal for battery-powered applications. The transmitter employs a SAW-stabilized osci llator, ensuring accurate frequency control for best range performance. Output p ower and harmonic emissions are easy to control, making FCC and ETSI compliance easy. The manufacturing-friendly SIP style package and low-cost make the STT-433 suitable for high volume applications. Features 433.92 MHz Frequency Low Cost 1.5-12V operation 11mA current consumption at 3V Small size 4 dBm output power at 3V 3. Applications Remote Keyless Entry (RKE) Remote Lighting Controls On-Site Paging Asset Tracking Wireless Alarm and Security Systems Long Range RFID Automated Resource Management

OPERATION Theory OOK(On Off Keying) modulation is a binary form of amplitude modulation. When a l ogical 0 (data line low) is being sent, the transmitter is off, fully suppressin g the carrier. In this state, the transmitter current is very low, less than 1mA

. When a logical 1 is being sent, the carrier is fully on. In this state, the mo dule current consumption is at its highest, about 11mA with a 3V power supply. OOK is the modulation method of choice for remote control applications where pow er consumption and cost are the primary factors. Because OOK transmitters draw n o power when they transmit a 0, they exhibit significantly better power consumpt ion than FSK transmitters. OOK data rate is limited by the start-up time of the oscillator. High-Q oscillators which have very stable center frequencies take lo nger to start-up than low-Q oscillators. The start-up time of the oscillator det ermines the maximum data rate that the transmitter can send. Data Rate The oscillator start-up time is on the order of 40uSec, which limits the maximum data rate to 4.8 kbit/sec. SAW stabilized oscillator The transmitter is basically a negative resistance LC oscillator whose center fr equency is tightly controlled by a SAW resonator. SAW (Surface Acoustic Wave) re sonators are fundamental frequency devices that resonate at frequencies much hig her than crystals. 433 MHZ RF RECEIVER STR-433 Overview The STR-433 is ideal for short-range remote control applications where cost is a primary concern. The receiver module requires no external RF componen ts except for the antenna. It generates virtually no emissions, making FCC and E TSI approvals easy. The super-regenerative design exhibits exceptional sensitivi ty at a very low cost. The manufacturing-friendly SIP style package and low-cost make the STR-433 suitable for high volume applications.

Features Low Cost 5V operation 3.5mA current drain No External Parts are required Receiver Frequency: 433.92 MHZ Typical sensitivity: -105dBm IF Frequency: 1MHz Applications Car security system Sensor reporting Automation system Remote Keyless Entry (RKE) Remote Lighting Controls On-Site Paging Asset Tracking Wireless Alarm and Security Systems Long Range RFID Automated Resource Management

OPERATION Super-Regenerative AM Detection The STR-433 uses a super-regenerative AM detector to demodulate t he incoming AM carrier. A super regenerative detector is a gain stage with posit ive feedback greater than unity so that it oscillates. An RC-time constant is in cluded in the gain stage so that when the gain stage oscillates, the gain will b e lowered over time proportional to the RC time constant until the oscillation e

ventually dies. When the oscillation dies, the current draw of the gain stage de creases, charging the RC circuit, increasing the gain, and ultimately the oscill ation starts again. In this way, the oscillation of the gain stage is turned on and off at a rate set by the RC time constant. This rate is chosen to be super-a udible but much lower than the main oscillation rate. Detection is accomplished by measuring the emitter current of the gain stage. Any RF input signal at the f requency of the main oscillation will aid the main oscillation in Restarting. If the amplitude of the RF input increases, the main oscillation wil l stay on for a longer period of time, and the emitter current will be higher. T herefore, we can detect the original base-band signal by simply low-pass filteri ng the emitter current. The average emitter current is not very linear as a function of the RF input level. It exhibits a 1/ln response because of the exponentially rising nature of oscillator start-up. The steep slope of a logarithm near zero results in high sensitivity to small input signals. Data Slicer The data slicer converts the base-band analog signal from the su per-regenerative detector to a CMOS/TTL compatible output. Because the data slic er is AC coupled to the audio output, there is a minimum data rate. AC coupling also limits the minimum and maximum pulse width. Typically, data is encoded on the transmit side using pulse-width modulation (PWM) or non-return-to -zero (NRZ). The most common source for NRZ data is from a UART embedded in a mi cro-controller. Applications that use NRZ data encoding typically involve microc ontrollers. The most common source for PWM data is from a remote control IC such as the HC-12E from Holtek Data is sent as a constant rate square-wave. The duty cycle of that squar e wave will generally be either 33% (a zero) or 66% (a one). The data slicer on the STR-433 is optimized for use with PWM encoded data, though it will work with NRZ data if certain encoding rules are followed. Power Supply The STR-433 is designed to operate from a 5V power supply. It is crucial that th is power supply be very quiet. The power supply should be bypassed using a 0.1uF low-ESR ceramic capacitor and a 4.7Uf tantalum capacitor. These capacitors shou ld be placed as close to the power pins as possible. The STR- 433 is designed fo r continuous duty operation. From the time power is applied, it can take up to 7 50mSec for the data output to become valid. Antenna Input It will support most antenna types, including printed antennas integrated direct ly onto the PCB and simple single core wire of about 17cm. The performance of th e different antennas varies. Any time a trace is longer than 1/8th the wavelengt h of the frequency it is carrying, it should be a 50 ohm microstrip. Typical Application Remark: Antenna length about: 17cm for 433MHz TOUCHPAD

5.6Cms 7.6Cms Technology Details Resistive touchscreens are used in more applications than any other touch techno logyVfor example, PDAs, point-of-sale, industrial, medical, and office automatio n, as well as consumer electronics. All variations of resistive touchscreens hav e some things in common:

The IntelliTouch surface wave is the optical standard of touch. Its pure glass c onstruction provides superior optical performance and makes it the most scratchresistant technology available. It s nearly impossible to physically "wear out" this touchscreen. IntelliTouch is widely used in kiosk, gaming, and office autom ation applications and is available for both flat panel and CRT solutions. They are all constructed similarly in layers-a back layer such as glass with a u niform resistive coating plus a polyester coversheet, with the layers separated by tiny insulating dots. When the screen is touched, it pushes the conductive co ating on the coversheet against the coating on the glass, making electrical cont act. The voltages produced are the analog representation of the position touched . An electronic controller converts these voltages into digital X and Y coordina tes which are then transmitted to the host computer. Because resistive touchscreens are force activated, all kinds of touch input dev ices can activate the screen, including fingers, fingernails, styluses, gloved h ands, and credit cards. All have similar optical properties, resistance to chemicals and abuse. Both the touchscreen and its electronics are simple to integrate into imbedded s ystems, thereby providing one of the most practical and cost-effective touchscre en solutions. Four-Wire Resistive Four-wire resistive technology is the simplest to understand and manufacture. It uses both the upper and lower layers in the touchscreen "sandwich" to determine the X and Y coordinates. Typically constructed with uniform resistive coatings of indium tin oxide (ITO on the inner sides of the layers and silver buss bars a long the edges, the combination sets up lines of equal potential in both X and Y . In the illustration below, the controller first applies 5V to the back layer. Up on touch, it probes the analog voltage with the coversheet, reading 2.5V, which represents a left-right position or X axis. It then flips the process, applying 5V to the coversheet, and probes from the ba ck layer to calculate an up-down position or Y axis. At any time, only three of the four wires are in use (5V, ground, probe).

The primary drawback of four-wire technology is that one coordinate axis (usuall y the Y axis), uses the outer layer, the flexible coversheet, as a uniform volta ge gradient. The constant flexing that occurs on the outer coversheet with use w ill eventually cause microscopic cracks in the ITO coating, changing its electri cal characteristics (resistance), degrading the linearity and accuracy of this a xis. Unsurprisingly, four-wire touchscreens are not known for their durability. Typic ally, they test only to about 1 million touches with a finger-far less when acti vated by a pointed stylus which speeds the degradation process. Some four-wire p roducts even specify 100,000 activations within a rather large, 20 mm x 20 mm ar ea. In the real world of point-of-sale applications, a level of 100,000 activati ons with hard, pointed styluses (including fingernails, credit cards, ballpoint pens, etc.) is considered normal usage in just a few months time. Also, accuracy can drift with environmental changes. The polyester coversh eet expands and contracts with temperature and humidity changes, thereby causing long-term degradation to the coatings as well as drift in the touch location.

While all of these drawbacks can be insignificant in smaller sizes, they become increasingly apparent the larger the touchscreen. Therefore, Elo normally recomm ends four-wire touchscreens in applications with a display size of 6.4" or small er.? However, the relative low cost, inherent low power consumption, and common avail ability of chipset controllers with support from imbedded operating systems, mak es Elo AT4 four-wire touchscreens ideal for hand-held devices such as PDAs, wear able computers, and many consumer devices. Eight-Wire Variation Eight-wire resistive touchscreens are a variation of four-wire construction. The primary difference is the addition of four sensing points, which are used to st abilize the system and reduce the drift caused by environmental changes. Eight-w ire systems are usually seen in sizes of 10.4" or larger where the drift can be significant. As in four-wire technology, the major drawback is that one coordinate axis uses the outer, flexible coversheet as a uniform voltage gradient, while the inner or bottom layer acts as the voltage probe. The constant flexing that occurs on the outer coversheet will change its resistance with usage, degrading the linearity and accuracy of this axis. Although the added four sensing points helps stabilize the system against drift, they do not improve the durability or life expectancy of the screen. Therefore, Elo does not recommend eight-wire touchscreen solutions. Five-Wire Resistive As we have seen, four- and eight-wire touchscreens, while having a simple and el egant design, have a major drawback in terms of durability in that the flexing c oversheet is used to determine one of the axes. Field usage proves that the othe r axis rarely fails. Could it be possible to construct a touchscreen where all t he position sensing was on the stable glass layer? Then the coversheet would ser ve only as a voltage probe for X and Y. Microscopic cracks in the coversheet coa ting might still occur, but they would no longer cause non-linearities. The simp le buss bar design is not sufficient and a more complex linearization pattern on the edges is required. In the five-wire design, one wire goes to the coversheet (E) which serves as the voltage probe for X and Y. Four wires go to corners of the back glass layer (A, B, C, and D). The controller first applies 5V to corners A and B and grounds C and D, causing voltage to flow uniformly across the screen from the top to the b ottom. Upon touch, it reads the Y voltage from the coversheet at E. Then the con troller applies 5V to corners A and C and grounds B and D, and reads the X volta ge from E again. So, a five-wire touchscreen uses the stable bottom layer for both X- and Y-ax is measurements. The flexible coversheet acts only as a voltage-measuring probe. This means the touchscreen continues working properly even with non-uniformity in the coversheet s conductive coating. The result is an accurate, durable and m ore reliable touchscreen over four- and eight-wire designs. Six- and Seven-Wir e Variations There are some manufacturers who claim improved performance over five-wire resis tive with additional wires. The six-wire variation adds an extra ground layer to the back of the glass. It i s not needed for improved performance, and in some cases is not even connected t o the companion controller. The seven-wire variation adds two sense lines, like with the eight-wire design, to decrease drift due to environmental changes. Elo s patented AccuTouch "Z bord er" electrode pattern is a better solution to prevent drift. MOTOR DRIVER:

L293D is a dual H-bridge motor driver integrated circuit (IC). Motor drivers act as current amplifiers since they take a low-current control signal and provide a higher-current signal. This higher current signal is used to drive the motors. L293D contains two inbuilt H-bridge driver circuits. In its common mode of opera tion, two DC motors can be driven simultaneously, both in forward and reverse di rection. The motor operations of two motors can be controlled by input logic at pins 2 & 7 and 10 & 15. Input logic 00 or 11 will stop the corresponding motor. Logic 01 and 10 will rotate it in clockwise and anticlockwise directions, respec tively. Enable pins 1 and 9 (corresponding to the two motors) must be high for motors to start operating. When an enable input is high, the associated driver gets enabl ed. As a result, the outputs become active and work in phase with their inputs. Similarly, when the enable input is low, that driver is disabled, and their outp uts are off and in the high-impedance state. Pin Diagram: Pin Description: Pin No Function Name 1 Enable pin for Motor 1; active high Enable 1,2 2 Input 1 for Motor 1 Input 1 3 Output 1 for Motor 1 Output 1 4 Ground (0V) Ground 5 Ground (0V) Ground 6 Output 2 for Motor 1 Output 2 7 Input 2 for Motor 1 Input 2 8 Supply voltage for Motors; 9-12V (up to 36V) Vcc 2 9 Enable pin for Motor 2; active high Enable 3,4 10 Input 1 for Motor 1 Input 3 11 Output 1 for Motor 1 Output 3 12 Ground (0V) Ground 13 Ground (0V) Ground 14 Output 2 for Motor 1 Output 4 15 Input2 for Motor 1 Input 4 16 Supply voltage; 5V (up to 36V) Vcc 1

DC MOTOR

 DC motors are configured in many types and sizes, including brush less, servo, a nd gear motor types. A motor consists of a rotor and a permanent magnetic field stator. The magnetic field is maintained using either permanent magnets or elect romagnetic windings. DC motors are most commonly used in variable speed and torq ue. Motion and controls cover a wide range of components th at in some way are used to generate and/or control motion. Areas within this cat egory include bearings and bushings, clutches and brakes, controls and drives, d rive components, encoders and resolves, Integrated motion control, limit switche s, linear actuators, linear and rotary motion components, linear position sensin g, motors (both AC and DC motors), orientation position sensing, pneumatics and pneumatic components, positioning stages, slides and guides, power transmission (mechanical), seals, slip rings, solenoids, springs. Motors are the devices that provide the actual speed and torque in a drive syste m. This family includes AC motor types (single and multiphase motors, universal , servo motors, induction, synchronous, and gear motor) and DC motors (brush les s, servo motor, and gear motor) as well as linear, stepper and air motors, and m otor contactors and starters. In any electric motor, operation is based on simple electromagnetism. A currentcarrying conductor generates a magnetic field; when this is then placed in an ex ternal magnetic field, it will experience a force proportional to the current in the conductor, and to the strength of the external magnetic field. As you are w ell aware of from playing with magnets as a kid, opposite (North and South) pola rities attract, while like polarities (North and North, South and South) repel. The internal configuration of a DC motor is designed to harness the magnetic int eraction between a current-carrying conductor and an external magnetic field to generate rotational motion.

Every DC motor has six basic parts -- axle, rotor (a.k.a., armature), stator, co mmutator, field magnet(s), and brushes. In most common DC motors (and all that B eamers will see), the external magnetic field is produced by high-strength perma nent magnets1. The stator is the stationary part of the motor -- this includes t he motor casing, as well as two or more permanent magnet pole pieces. The rotor (together with the axle and attached commutator) rotates with respect to the sta tor. The rotor consists of windings (generally on a core), the windings being el ectrically connected to the commutator. The above diagram shows a common motor l ayout -- with the rotor inside the stator (field) magnets. The geometry of the brushes, commutator contacts, and rotor windings are such th at when power is applied, the polarities of the energized winding and the stator magnet(s) are misaligned, and the rotor will rotate until it is almost aligned with the stator s field magnets. As the rotor reaches alignment, the brushes mov e to the next commutator contacts, and energize the next winding. Given our exam ple two-pole motor, the rotation reverses the direction of current through the r otor winding, leading to a "flip" of the rotor s magnetic field, and driving it to continue rotating. In real life, though, DC motors will always have more than two poles (three is a very common number). In particular, this avoids "dead spots" in the commutator.

Let s start by looking at a simple 2-pole DC electric motor (here red represents a magnet or winding with a "North" polarization, while green represents a magne t or winding with a "South" polarization).

You can imagine how with our example two-pole motor, if the rotor is exactly at the middle of its rotation (perfectly aligned with the field magnets), it will get "stuck" there. Meanwhile, with a two-pole motor, there is a moment where the commutator shorts out the power supply (i.e., both brushes touch both commutato r contacts simultaneously). This would be bad for the power supply, waste energy , and damage motor components as well. Yet another disadvantage of such a simple motor is that it would exhibit a high amount of torque ripple" (the amount of to rque it could produce is cyclic with the position of the rotor). So since most small DC motors are of a three-pole design, let s tinker with the workings of one via an interactive animation (JavaScript required): You ll notice a few things from this -- namely, one pole is fully energized at a time (but two others are "partially" energized). As each brush transitions from one commutator contact to the next, one coil s field will rapidly collapse, as the next coil s field will rapidly charge up (this occurs within a few microseco nd). We ll see more about the effects of this later, but in the meantime you can see that this is a direct result of the coil windings series wiring:

MICRO CONTROLLER 89C51 Introduction A Micro controller consists of a powerful CPU tightly coupled with memor y, various I/O interfaces such as serial port, parallel port timer or counter, i nterrupt controller, data acquisition interfaces-Analog to Digital converter, Di gital to Analog converter, integrated on to a single silicon chip. If a system is developed with a microprocessor, the designer has to go f or external memory such as RAM, ROM, EPROM and peripherals. But controller is pr ovided all these facilities on a single chip. Development of a Micro controller reduces PCB size and cost of design. One of the major differences between a Microprocessor and a Micro controller is that a controller often deals with bits not bytes as in the real world applicati on. Intel has introduced a family of Micro controllers called the MCS-51. The Major Features: Compatible with MCS-51 products 4k Bytes of in-system Reprogrammable flash memory Fully static operation: 0HZ to 24MHZ Three level programmable clock 128 * 8 bit timer/counters Six interrupt sources Programmable serial channel Low power idle power-down modes

Why AT 89C51 The system requirements and control specifications clearly rule out the use of 16, 32 or 64 bit micro controllers or microprocessors. Systems using thes

e may be earlier to implement due to large number of internal features. They are also faster and more reliable but, 8-bit micro controller satisfactorily serves the above application. Using an inexpensive 8-bit Microcontroller will doom the 32-bit product failure in any competitive market place. Coming to the question of why to use AT89C51 of all the 8-bit microcontr oller available in the market the main answer would be because it has 4 Kb on ch ip flash memory which is just sufficient for our application. The on-chip Flash ROM allows the program memory to be reprogrammed in system or by conventional no n-volatile memory Programmer. Moreover ATMEL is the leader in flash technology i n todays market place and hence using AT 89C51 is the optimal solution. AT89C51 MICROCONTROLLER ARCHITECTURE The 89C51 architecture consists of these specific features: 1. 2. 3. Eight bit CPU with registers A (the accumulator) and B Sixteen-bit program counter (PC) and data pointer (DPTR) Eight- bit stack pointer (PSW) Eight-bit stack pointer (Sp) Internal ROM or EPROM (8751) of 0(8031) to 4K (89C51) Internal RAM of 128 bytes: Four register banks, each containing eight registers Sixteen bytes, which maybe addressed at the bit level Eighty bytes of general- purpose data memory Thirty two input/output pins arranged as four 8-bit ports:p0-p3 Two 16-bit timer/counters: T0 and T1 Full duplex serial data receiver/transmitter: SBUF Control registers: TCON, TMOD, SCON, PCON, IP, and IE Two external and three internal interrupts sources. Oscillator and clock circuits. Functional block diagram of micro controller

The 89C51 oscillator and clock: The heart of the 89C51 circuitry that generates the clock pulses by which all th e internal all internal operations are synchronized. Pins XTAL1 And XTAL2 is pro vided for connecting a resonant network to form an oscillator. Typically a quart z crystal and capacitors are employed. The crystal frequency is the basic intern al clock frequency of the microcontroller. The manufacturers make 89C51 designs that run at specific minimum and maximum frequencies typically 1 to 16 MHz. Fig 3.7.2: - Oscillator and timing circuit

Types of memory: The 89C51 have three general types of memory. They are on-chip memory, external Code memory and external Ram. On-Chip memory refers to physically existing memor y on the micro controller itself. External code memory is the code memory that r esides off chip. This is often in the form of an external EPROM. External RAM is the Ram that resides off chip. This often is in the form of standard static RAM

or flash RAM. a) Code memory Code memory is the memory that holds the actual 89C51 programs that is to be run . This memory is limited to 64K. Code memory may be found on-chip or off-chip. I t is possible to have 4K of code memory on-chip and 60K off chip memory simultan eously. If only off-chip memory is available then there can be 64K of off chip R OM. This is controlled by pin provided as EA b) Internal RAM

The 89C51 have a bank of 128 of internal RAM. The internal RAM is found on-chip. So it is the fastest Ram available. And also it is most flexible in ter ms of reading and writing. Internal Ram is volatile, so when 89C51 is reset, thi s memory is cleared. 128 bytes of internal memory are subdivided. The first 32 b ytes are divided into 4 register banks. Each bank contains 8 registers. Internal RAM also contains 128 bits, which are addressed from 20h to 2Fh. These bits are bit addressed i.e. each individual bit of a byte can be addressed by the user. They are numbered 00h to 7Fh. The user may make use of these variables with comm ands such as SETB and CLR. FLASH MEMORY: Flash memory (sometimes called "flash RAM") is a type of constantly-powe red non volatile that can be erased and reprogrammed in units of memory called b locks. It is a variation of electrically erasable programmable read-only memory (EEPROM) which, unlike flash memory, is erased and rewritten at the byte level, which is slower than flash memory updating. Flash memory is often used to hold c ontrol code such as the basic input/output system (BIOS) in a personal computer. When BIOS needs to be changed (rewritten), the flash memory can be written to i n block (rather than byte) sizes, making it easy to update. On the other hand, f lash memory is not useful as random access memory (RAM) because RAM needs to be addressable at the byte (not the block) level. Flash memory gets its name because the microchip is organized so that a section of memory cells are erased in a single action or "flash." The erasure is caused by Fowler-Nordheim tunneling in which electrons pierce through a thin di electric material to remove an electronic charge from a floating gate associated with each memory cell. Intel offers a form of flash memory that holds two bits (rather than one) in each memory cell, thus doubling the capacity of memory with out a corresponding increase in price. Flash memory is used in digital cellular phones, digital cameras, LAN sw itches, PC Cards for notebook computers, digital set-up boxes, embedded controll ers, and other devices.

Memory Type Features FLASH Low-cost, high-density, high-speed architecture; low power; high reliabi lity ROM Read-Only Memory Mature, high-density, reliable, low cost; time-consuming mask required, suitable for high production with stable code SRAM Static Random-Access Memory Highest speed, high-power, low-density memory; l imited density drives up cost

EPROM Electrically Programmable Read-Only Memory High-density memory; must be exp osed to ultraviolet light for erasure EEPROMorE2PROM Electrically Erasable Programmable Read-Only Memory Electrically byte-erasab le; lower reliability, higher cost, lowest density DRAM Dynamic Random Access Memory High-density, low-cost, high-speed, high-power Technical Overview of Flash Memory Flash memory is a nonvolatile memory using NOR technology, which allows the user to electrically program and erase information. Intel Flash memory uses memory ce lls similar to an EPROM, but with a much thinner, precisely grown oxide between the floating gate and the source (see Figure 2). Flash programming occurs when e lectrons are placed on the floating gate. The charge is stored on the floating g ate, with the oxide layer allowing the cell to be electrically erased through th e source. Intel Flash memory is an extremely reliable nonvolatile memory archite cture.

Fig 3.7.3: - Pin diagram of AT89C51

Pin Description: VCC: Supply voltage. GND: Ground. Port 0: Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port , each pin can sink eight TTL inputs. When ones are written to port 0 pins, the p ins can be used as high impedance inputs. Port 0 may also be configured to be th e multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pull-ups. Port 0 also receives the co de bytes during Flash programming, and outputs the code bytes during program ver ification. External pull-ups are required during program verification. Port 1: Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The P ort 1 output buffers can sink/source four TTL inputs. When 1s are written to Por t 1 pins they are pulled high by the internal pull-ups and can be used as inputs . As inputs, Port 1 pins that are externally being pulled low will source curren t (IIL) because of the internal pull-ups. Port 1 also receives the low-order add ress bytes during Flash programming and verification. Port 2: Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The P ort 2 output buffers can sink/source four TTL inputs. When 1s are written to Por t 2 pins they are pulled high by the internal pull-ups and can be used as inputs . As inputs, Port 2 pins that are externally being pulled low will source curren t (IIL) because of the internal pull-ups. Port 2 emits the high-order address by te during fetches from external program memory and during accesses to external d ata memories that use 16-bit addresses (MOVX @DPTR). In this application, it use s strong internal pull-ups when emitting 1s. During accesses to external data me mories that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.

Port 3: Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The P ort 3 output buffers can sink/source four TTL inputs. When 1s are written to Por t 3 pins they are pulled high by the internal pull-ups and can be used as inputs . As inputs, Port 3 pins that are externally being pulled low will source curren t (IIL) because of the pull-ups. Port 3 also serves the functions of various special features of the AT89C51 as l isted below: Port 3 also receives some control signals for Flash programming and verification Tab 6.2.1 Port pins and their alternate functions RST: Reset input. A high on this pin for two machine cycles while the oscilla tor is running resets the device. ALE/PROG: Address Latch Enable output pulse for latching the low byte of the addre ss during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constan t rate of 1/6the oscillator frequency, and may be used for external timing or cl ocking purposes. Note, however, that one ALE pulse is skipped during each access to external Data Memory. If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is active only during a MOVX or MOVC instruction. Otherwis e, the pin is pulled high. Setting the ALE-disable bit has no effect if the micr ocontroller is in external execution mode. PSEN: Program Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated t wice each machine cycle, except that two PSEN activations are skipped during eac h access to external data memory. EA/VPP: External Access Enable EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H u p to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally l atched on reset. EA should be strapped to VCC for internal program executions. This pin also rece ives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP. XTAL1: Input to the inverting oscillator amplifier and input to the internal cl ock operating circuit. XTAL2: It is the Output from the inverting oscillator amplifier. Oscillator Characteristics: XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier which can be configured for use as an on-chip oscillator, as shown in Figs 6.2.3. Either a quartz crystal or ceramic resonator may be used. To drive t he device from an external clock source, XTAL2 should be left unconnected while XTAL1 is driven as shown in Figure 6.2.4.There are no requirements on the duty c ycle of the external clock signal, since the input to the internal clocking circ

uitry is through a divide-by-two flip-flop, but minimum and maximum voltage high and low time specifications must be observed. Fig 6.2.3 Oscillator Connections on Notes: 1. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Maximum IOL per port pin: 10 mA Maximum IOL per 8-bit port: Port 0: 26 mA Ports 1, 2, 3: 15 mA Maximum total IOL for all output pins: 71 mA If IOL exceeds the test condition, VOL may exceed the related specification. Pin s are not guaranteed to sink current greater than the listed test conditions. 2. Minimum VCC for Power-down is 2V. REGISTERS: In the CPU, registers are used to store information temporarily. That i nformation could be a byte of data to be processed, or an address pointing to th e data to be fetched. The vast majority of 8051 registers are 8bit registers. I n the 8051 there is only one data type: 8bits. The 8bits of a register are show n in the diagram from the MSB (most significant bit) D7 to the LSB (least signif icant bit) D0. With an 8-bit data type, any data larger than 8bits must be brok en into 8-bit chunks before it is processed. Since there are a large number of registers in the 8051, we will concentrate on some of the widely used general-pu rpose registers and cover special registers in future chapters. D7 D6 D5 D4 D3 D2 D1 D0 Fig 6.2.4 External Clock Drive Configurati

The most widely used registers of the 8051 are A (accumulator), B, R0, R 1, R2, R3, R4, R5, R6, R7, DPTR (data pointer), and PC (program counter). All o f the above registers are 8-bits, except DPTR and the program counter. The accu mulator, register A, is used for all arithmetic and logic instructions. SFRs (Special Function Registers) Among the registers R0-R7 is part of the 128 bytes of RAM memory. What about registers A, B, PSW, and DPTR? Do they also have addresses? The answer is yes. In the 8051, registers A, B, PSW and DPTR are part of the group of regist ers commonly referred to as SFR (special function registers). There are many sp ecial function registers and they are widely used. The SFR can be accessed by t he names (which is much easier) or by their addresses. For example, register A has address E0h, and register B has been ignited the address F0H, as shown in ta ble. The following two points should noted about the SFR addresses. 1. The Special function registers have addresses between 80H and FFH. Thes e addresses are above 80H, since the addresses 00 to 7FH are addresses of RAM me mory inside the 8051. 2. Not all the address space of 80H to FFH is used by the SFR. The unused locations 80H to FFH are reserved and must not be used by the 8051 programmer. Regarding direct addressing mode, notice the following two points: (a) the addre ss value is limited to one byte, 00-FFH, which means this addressing mode is lim ited to accessing RAM locations and registers located inside the 8051. (b) If y ou examine the l st file for an assembly language program, you will see that the SFR registers names are replaced with their addresses as listed in table. Symbol Name Address ACC Accumulator 0E0H B B register 0F0H

PSW SP DPTR DPL DPH P0 P1 P2 P3 IP IE TMOD TCON T2CON T2MOD TH0 TL0 TH1 TL1 TH2 TL2 RCAP2H RCAP2L SCON SBUF PCON

Program status word 0D0H Stack pointer 81H Data pointer 2 bytes Low byte 82H High byte 83H Port0 80H Port1 90H Port2 0A0H Port3 0B0H Interrupt priority control 0B8H Interrupt enable control 0A8H Timer/counter mode control 89H Timer/counter control 88H Timer/counter 2 control 0C8H Timer/counter mode2 control 0C9H Timer/counter 0high byte 8CH Timer/counter 0 low byte 8AH Timer/counter 1 high byte 8DH Timer/counter 1 low byte 8BH Timer/counter 2 high byte 0CDH Timer/counter 2 low byte 0CCH T/C 2 capture register high byte T/C 2 capture register low byte 0CAH Serial control 98H Serial data buffer 99H Power control 87H

0CBH

Table: 8051 Special function register Address A Register (Accumulator) This is a general-purpose register which serves for storing intermediate results during operating. A number (an operand) should be added to the accumulator prio r to execute an instruction upon it. Once an arithmetical operation is preformed by the ALU, the result is placed into the accumulator. If a data should be tran sferred from one register to another, it must go through accumulator. For such u niversal purpose, this is the most commonly used register that none microcontrol ler can be imagined without (more than a half 8051 microcontroller s instruction s used use the accumulator in some way). B Register B register is used during multiply and divide operations which can be performed only upon numbers stored in the A and B registers. All other instructions in the program can use this register as a spare accumulator (A). During programming, each of registers is called by name so that their ex act address is not so important for the user. During compiling into machine code (series of hexadecimal numbers recognized as instructions by the microcontrolle r), PC will automatically, instead of registers name, write necessary addresses i nto the microcontroller. R Registers (R0-R7) This is a common name for the total 8 general purpose registers (R0, R1, and R2 ...R7). Even they are not true SFRs, they deserve to be discussed here because o f their purpose. The bank is active when the R registers it includes are in use. Similar to the accumulator, they are used for temporary storing variables and i ntermediate results. Which of the banks will be active depends on two bits inclu ded in the PSW Register. These registers are stored in four banks in the scope o f RAM. The following example best illustrates the useful purpose of these registers. Su ppose that mathematical operations on numbers previously stored in the R registe

rs should be performed: (R1+R2) - (R3+R4). Obviously, a register for temporary storing results of addition is needed. Every thing is quite simple and the program is as follows: MOV A, R3; Means: move number from R3 into accumulator ADD A, R4; Means: add number from R4 to accumulator (result remains in accumulat or) MOV R5, A; Means: temporarily moves the result from accumulator into R5 MOV A, R1; Means: move number from R1 into accumulator ADD A, R2; Means: add number from R2 to accumulator SUBB A, R5; Means: subtract number from R5 (there are R3+R4) 8051 Register Banks and Stack RAM memory space allocation in the 8051 There are 128 bytes of RAM in the 8051. The 128 bytes of RAM inside the 8051 are assigned addresses 00 to7FH. These 128 bytes are divided into three d ifferent groups as follows: 1. A total of 32 bytes from locations 00 to 1FH hex are set aside for regis ter banks and the stack. 2. A total of 16 bytes from locations 20 to 2FH hex are set aside for bit-a ddressable read/write memory. 3. A total of 80 bytes from locations 30H to 7FH are used for read and writ e storage, or what is normally called Scratch pad. These 80 locations of RAM ar e widely used for the purpose of storing data and parameters nu 8051 programmers .

Register banks in the 8051 A total of 32bytes of RAM are set aside for the register banks and stack . These 32 bytes are divided into 4 banks of registers in which each bank has r egisters, R0-R7. RAM locations 0 to 7 are set aside for bank 0 of R0-R7 where R 0 is RAM location 0, R1 is RAM location 1, and R2 is location 2, and so on, unti l memory location7, which belongs to R7 of bank0. The second bank of registers R0-R7 starts at RAM location 08 and goes to location 0FH. The third bank of R0R7 starts at memory location 10H and goes to location 17H. Finally, RAM locatio ns 18H to 1FH are set aside for the fourth bank of R0-R7. Fig shows how the 32 b ytes are allocated into 4 banks. As we can see from fig 1, the bank 1 uses the same RAM space as the stac k. This is a major problem in programming the 8051. we must either not use reg ister bank1, or allocate another area of RAM for the stack. Default register bank If RAM locations 00-1F are set aside for the four register banks, which register bank of R0-R7 do we have access to when the 8051 is powered up? The ans wer is register bank 0; that is , RAM locations 0, 1,2,3,4,5,6, and 7 are access ed with the names R0, R1, R2, R3, R4, R5, R6, and R7 when programming the 8051. It is much easier to refer to these RAM locations with names such as R0, R1 and so on, than by their memory locations as shown in fig 2. The register banks are switched by using the D3 & D4 bits of register PS W. FIG: RAM Allocation in the 8051 Fig: 8051 Register Banks and their RAM Addresses PSW Register (Program Status Word)

This is one of the most important SFRs. The Program Status Word (PSW) contains s everal status bits that reflect the current state of the CPU. This register cont ains: Carry bit, Auxiliary Carry, two register bank select bits, Overflow flag, parity bit, and user-definable status flag. The ALU automatically changes some o f registers bits, which is usually used in regulation of the program performing. P - Parity bit. If a number in accumulator is even then this bit will be automat ically set (1), otherwise it will be cleared (0). It is mainly used during data transmission and receiving via serial communication. - Bit 1. This bit is intended for the future versions of the microcontrollers, s o it is not supposed to be here. OV Overflow occurs when the result of arithmetical operation is greater than 255 (decimal), so that it can not be stored in one register. In that case, this bit will be set (1). If there is no overflow, this bit will be cleared (0).

RS0, RS1 - Register bank selects bits. These two bits are used to select one of the four register banks in RAM. By writing zeroes and ones to these bits, a grou p of registers R0-R7 is stored in one of four banks in RAM. RS1 RS2 Space in RAM 0 0 Bank0 00h-07h 0 1 Bank1 08h-0Fh 1 0 Bank2 10h-17h 1 1 Bank3 18h-1Fh F0 - Flag 0. This is a general-purpose bit available to the user. AC - Auxiliary Carry Flag is used for BCD operations only. CY - Carry Flag is the (ninth) auxiliary bit used for all arithmetical operation s and shift instructions. DPTR Register (Data Pointer) These registers are not true ones because they do not physically exist. They con sist of two separate registers: DPH (Data Pointer High) and (Data Pointer Low). Their 16 bits are used for external memory addressing. They may be handled as a 16-bit register or as two independent 8-bit registers. Besides, the DPTR Registe r is usually used for storing data and intermediate results which have nothing t o do with memory locations. SP Register (Stack Pointer) The stack is a section of RAM used by the CPU to store information tempo rarily. This information could be data or an address. The CPU needs this stora ge area since there are only a limited number of registers. How stacks are accessed in the 8051 If the stack is a section of RAM, there must be registers inside the CPU to point to it. The register used to access the stack is called the SP (Stack point) Register. The stack pointer in the 8051 is only 8 bits wide; which means that it can take values of 00 to FFH. When the 8051 is powered up, the SP regi ster contains value 07. This means that RAM location 08 is the first location u sed for the stack by the 8051. The storing of a CPU register in the stack is ca lled a PUSH, and pulling the contents off the stack back into a CPU register is called a POP. In other words, a register is pushed onto the stack to save it an d popped off the stack to retrieve it. The job of the SP is very critical when push and pop actions are performed. Pushing onto the stack In the 8051 the stack pointer (SP) points to the last used location of the stack . As we push data onto the stack, the stack pointer is incremented by one. Not

ice that this different from many microprocessors, notably x86 processors in whi ch the SP is decremented when data is pushed onto the stack. As each PUSH is ex ecuted, the contents of the register are saved on the stack and SP is incremente d by 1. Notice that for every byte of data saved on the stack and then SP is in cremented only once. Notice also that to push the registers onto the stack we m ust use their RAM addresses. For example, the instruction PUSH pushes register R1 onto the stack. Popping from the stack Popping the contents of the stack back into a given register is the opposite pro cess of pushing. With every pop, the top byte of the stack is copied to the reg ister specified by the instruction and the stack pointer is decremented once. The upper limit of the stack As, mentioned earlier, locations 08 to 1FH in the 8051 RAM can be used for the s tack. This is because locations 20-2FH of RAM are reserved for bit-addressable memory and must not be used by the stack. If in a program we need more than 24 bytes (08 to 1FH=24bytes) of stack, we can change the SP to point to RAM locatio ns 30-7FH. This is done with the instruction MOV SP, #XX. P0, P1, P2, P3 - Input/Output Registers

In case that external memory and serial communication system are not in use then , 4 ports with in total of 32 input-output lines are available to the user for c onnection to peripheral environment. Each bit inside these ports corresponds to the appropriate pin on the microcontroller. This means that logic state written to these ports appears as a voltage on the pin (0 or 5 V). Naturally, while read ing, the opposite occurs voltage on some input pins is reflected in the appropri ate port bit. The state of a port bit, besides being reflected in the pin, determines at the s ame time whether it will be configured as input or output. If a bit is cleared ( 0), the pin will be configured as output. In the same manner, if a bit is set to 1 the pin will be configured as input. After reset, as well as when turning the microcontroller ON, all bits on these ports are set to one (1). This means that the appropriate pins will be configured as inputs. Program counter: The important register in the 8051 is the PC (Program counter). The pro gram counter points to the address of the next instruction to be executed. As t he CPU fetches the OPCODE from the program ROM, the program counter is increment ed to point to the next instruction. The program counter in the 8051 is 16bits wide. This means that the 8051 can access program addresses 0000 to FFFFH, a to tal of 64k bytes of code. However, not all members of the 8051 have the entire 64K bytes of on-chip ROM installed, as we will see soon. Types of instructions Depending on operation they perform, all instructions are divided in several gro ups: Arithmetic Instructions Branch Instructions Data Transfer Instructions Logical Instructions Logical Instructions with bits The first part of each instruction, called MNEMONIC refers to the operation an i nstruction performs (copying, addition, logical operation etc.). Mnemonics commo nly are shortened form of name of operation being executed. For example: INC R1; Increment R1 (increment register R1) LJMP LAB5 ;Long Jump LAB5 (long jump to address specified as LAB5) JNZ LOOP ;Jump if Not Zero LOOP (if the number in the accumulator is not 0, jum p to address specified as LOOP) Another part of instruction, called OPERAND is separated from mnemonic at least by one empty space and defines data being processed by instructions. Some instru ctions have no operand; some have one, two or three. If there is more than one o

perand in instruction, they are separated by comma. For example: RET - (return from sub-routine) JZ TEMP - (if the number in the accumulator is not 0, jump to address specified as TEMP) ADD A,R3 - (add R3 and accumulator) CJNE A,#20,LOOP - (compare accumulator with 20. If they are not equal, jump to a ddress specified as LOOP) Arithmetic instructions These instructions perform several basic operations (addition, subtraction, divi sion, multiplication etc.) After execution, the result is stored in the first op erand. For example: ADD A, R1 - The result of addition (A+R1) will be stored in the accumulator.

Arithmetical Instructions Mnemonic Description Byte Number Oscillator Period ADD A,Rn Add R Register to accumulator 1 1 ADD A,Rx Add directly addressed Rx Register to accumulator 2 ADD A,@Ri Add indirectly addressed Register to accumulator 1 ADD A,#X Add number X to accumulator 2 2 ADDC A,Rn Add R Register with Carry bit to accumulator 1

2 1 1

Branch Instructions There are two kinds of these instructions: Unconditional jump instructions: After their execution a jump to a new location from where the program continues execution is executed. Conditional jump instructions: If some condition is met - a jump is executed. Ot herwise, the program normally proceeds with the next instruction.

Branch Instruction Mnemonic Description Byte Number Oscillator Period ACALL adr11 Call subroutine located at address within 2 K byte Program Memor y space 2 3 LCALL adr16 Call subroutine located at any address within 64 K byte Program Memory space 3 4 RET Return from subroutine 1 4 RETI Return from interrupt routine 1 4 AJMP adr11 Jump to address located within 2 K byte Program Memory space 2 3 LJMP adr16 Jump to any address located within 64 K byte Program Memory spac e 3 4

Data Transfer Instructions These instructions move the content of one register to another one. The register which content is moved remains unchanged. If they have the suffix X (MOVX), the d

ata is exchanged with external memory. Data Transfer Instruction Mnemonic Description Byte Number Cycle Number MOV A,Rn Move R register to accumulator 1 1 MOV A,Rx Move directly addressed Rx register to accumulator 2 MOV A,@Ri Move indirectly addressed register to accumulator 1 MOV A,#X Move number X to accumulator 2 2

2 1

Logical Instructions These instructions perform logical operations between corresponding bits of two registers. After execution, the result is stored in the first operand. Logical Instructions Mnemonic Description ANL A,Rn Logical AND ANL A,Rx Logical AND Rx 2 2 ANL A,@Ri Logical AND r 1 1 ANL A,#X Logical AND Byte Number Cycle Number between accumulator and R register 1 1 between accumulator and directly addressed register between accumulator and indirectly addressed registe between accumulator and number X 2 2

Logical Operations on Bits Similar to logical instructions, these instructions perform logical operations. The difference is that these operations are performed on single bits. Logical operations on bits Mnemonic Description Byte Number Cycle Number CLR C Clear Carry bit 1 1 CLR bit Clear directly addressed bit 2 2 SETB C Set Carry bit 1 1 SETB bit Set directly addressed bit 2 2 CPL C Complement Carry bit 1 1 CPL bit Complement directly addressed bit 2 2

TIMERS

On-chip timing/counting facility has proved the capabilities of the microcontrol ler for implementing the real time application. These includes pulse counting, f requency measurement, pulse width measurement, baud rate generation, etc,. Havin g sufficient number of timer/counters may be a need in a certain design applicat ion. The 8051 has two timers/counters. They can be used either as timers to gene rate a time delay or as counters to count events happening outside the microcont roller. Let discuss how these timers are used to generate time delays and we wil l also discuss how they are been used as event counters. PROGRAMMING 8051 TIMERS The 8051 has timers: Timer 0 and Timer1.they can be used either as timer s or as event counters. Let us first discuss about the timers registers and how t o program the timers to generate time delays. BASIC RIGISTERS OF THE TIMER Both Timer 0 and Timer 1 are 16 bits wide. Since the 8051 has an 8-b it architecture, each 16-bit timer is accessed as two separate registers of low byte and high byte.

TIMER 0 REGISTERS The 16-bit register of Timer 0 is accessed as low byte and high byte. the low byte register is called TL0(Timer 0 low byte)and the high byte reg ister is referred to as TH0(Timer 0 high byte).These register can be accessed li ke any other register, such as A,B,R0,R1,R2,etc.for example, the instruction MOV TL0, #4Fmoves the value 4FH into TL0,the low byte of Timer 0.These registers can also be read like any other register.

TIMER 1 REGISTERS Timer 1 is also 16-bit register is split into two bytes, referre d to as TL1 (Timer 1 low byte) and TH1 (Timer 1 high byte).these registers are a ccessible n the same way as the register of Timer 0. TMOD (timer mode) REGISTER Both timers TIMER 0 and TIMER 1 use the same register, called TMOD, to set arious timer operation modes. TMOD is an 8-bit register in which the lower s are set aside for Timer 0 and the upper 4 bits for Timer 1.in each case; ower 2 bits are used to set the timer mode and the upper 2 bits to specify peration.

the v 4 bit the l the o

MODES: M1, M0: M0 and M1 are used to select the timer mode. There are three modes: 0, 1, 2.Mode 0 is a 13-bit timer, mode 1 is a 16-bit timer, and mode 2 is an 8-bit timer. We will concentrate on modes 1 and 2 since they are the ones used most widely. We will soon describe the characteristics of these modes, after describing the rese t of the TMOD register. GATE Gate control when set. The timer/co unter is enabled only

While the INTx pin is high and the TRx control pin is. Set. When cleared, the ti mer is enabled. C/T red for timer operation m clock).set for counter Operation (input TX input pin). M 1 M0 M1 0 timer mode M0 0 MODE 0 Mode bit 1 Mode bit 0 Operating Mode 13-bit 8-b it timer/counter THx with TLx as 5 Bit pre-scaler. 0 timer mode 1 1 16-bit 16-bi t timer/counters THx with TLx are Casca ded; there is no prescaler 1 0 to reload auto reload timer/counter;THx Holds a value that is to be reloaded into TLx each time it overflows. 1 1 er mode. C/T (clock/timer) This bit in the TMOD register is used to decide whether the timer is used as a delay generator or an event counter. If C/T=0, it is used as a timer for time delay generation. The clock source for the time delay is the crystal frequency o f the 8051. This section is concerned with this choice. The timers use as an even t counter is discussed in the next section. 3 Split tim 2 8-bit au 8-bit Timer or counter selected clea (Input from internal syste

Serial Communication: Computers can transfer data in two ways: parallel and serial. In parallel data transfers, often 8 or more lines (wire conductors) are used to transfer data to a device that is only a few feet away. Examples of parallel data transfer are p rinters and hard disks; each uses cables with many wire strips. Although in suc h cases a lot of data can be transferred in a short amount of time by using many wires in parallel, the distance cannot be great. To transfer to a device locat ed many meters away, the serial method is used. In serial communication, the da ta is sent one bit at a time, in contrast to parallel communication, in which th e data is sent a byte or more at a time. Serial communication of the 8051 is th e topic of this chapter. The 8051 has serial communication capability built int

o it, there by making possible fast data transfer using only a few wires. If data is to be transferred on the telephone line, it must be converted from 0s and 1s to audio tones, which are sinusoidal-shaped signals. A peripher al device called a modem, which stands for modulator/demodulator, performs this co nversion. Serial data communication uses two methods, asynchronous and synchronous . The synchronous method transfers a block of data at a time, while the asynchr onous method transfers a single byte at a time. In data transmission if the data can be transmitted and received, it is a duplex transmission. This is in contrast to simplex transmissions such as wit h printers, in which the computer only sends data. Duplex transmissions can be half or full duplex, depending on whether or not the data transfer can be simult aneous. If data is transmitted one way at a time, it is referred to as half dup lex. If the data can go both ways at the same time, it is full duplex. Of cour se, full duplex requires two wire conductors for the data lines, one for transmi ssion and one for reception, in order to transfer and receive data simultaneousl y.

Asynchronous serial communication and data framing The data coming in at the receiving end of the data line in a serial dat a transfer is all 0s and 1s; it is difficult to make sense of the data unless th e sender and receiver agree on a set of rules, a protocol, on how the data is pa cked, how many bits constitute a character, and when the data begins and ends. Start and stop bits Asynchronous serial data communication is widely used for character-orie nted transmissions, while block-oriented data transfers use the synchronous meth od. In the asynchronous method, each character is placed between start and stop bits. This is called framing. In the data framing for asynchronous communicati ons, the data, such as ASCII characters, are packed between a start bit and a st op bit. The start bit is always one bit, but the stop bit can be one or two bits . The start bit is always a 0 (low) and the stop bit (s) is 1 (high). Data transfer rate The rate of data transfer in serial data communication is stated in bps (bits per second). Another widely used terminology for bps is baud rate. Howev er, the baud and bps rates are not necessarily equal. This is due to the fact t hat baud rate is the modem terminology and is defined as the number of signal ch anges per second. In modems a single change of signal, sometimes transfers seve ral bits of data. As far as the conductor wire is concerned, the baud rate and bps are the same, and for this reason we use the bps and baud interchangeably. The data transfer rate of given computer system depends on communication ports incorporated into that system. For example, the early IBMPC/XT could tra nsfer data at the rate of 100 to 9600 bps. In recent years, however, Pentium ba sed PCS transfer data at rates as high as 56K bps. It must be noted that in asy nchronous serial data communication, the baud rate is generally limited to 100,0 00bps.

RS232 Standards To allow compatibility among data communication equipment made by variou s manufacturers, an interfacing standard called RS232 was set by the Electronics Industries Association (EIA) in 1960. In 1963 it was modified and called RS232 A. RS232B AND RS232C were issued in 1965 and 1969, respectively. Today, RS232 i s the most widely used serial I/O interfacing standard. This standard is used i n PCs and numerous types of equipment. However, since the standard was set long before the advert of the TTL logic family, its input and output voltage levels are not TTL compatible. In RS232, a 1 is represented by -3 to -25V, while a 0 b it is +3 to +25V, making -3 to +3 undefined. For this reason, to connect any RS

232 to a microcontroller system we must use voltage converters such as MAX232 to convert the TTL logic levels to the RS232 voltage levels, and vice versa. MAX2 32 IC chips are commonly referred to as line drivers. RS232 pins RS232 cable is commonly referred to as the DB-25 connector. In labeling, DB-25P refers to the plug connector (male) and DB-25S is for the socket connector (fem ale). Since not all the pins are used in PC cables, IBM introduced the DB-9 Ve rsion of the serial I/O standard, which uses 9 pins only, as shown in table. DB-9 pin connector 1 2 3 4 5 6 7 8 9 (Out of computer and exposed end of cable)

Pin Functions: Pin Description 1 Data carrier detect (DCD) 2 Received data (RXD) 3 Transmitted data (TXD) 4 Data terminal ready(DTR) 5 Signal ground (GND) 6 Data set ready (DSR) 7 Request to send (RTS) 8 Clear to send (CTS) 9 Ring indicator (RI) Note: DCD, DSR, RTS and CTS are active low pins. The method used by RS-232 for communication allows for a simple connection of t hree lines: Tx, Rx, and Ground. The three essential signals for 2-way RS-232 Communications are these: TXD: carries data from DTE to the DCE. RXD: carries data from DCE to the DTE SG: signal ground 8051 connection to RS232 The RS232 standard is not TTL compatible; therefore, it requires a line driver such as the MAX232 chip to convert RS232 voltage levels to TTL levels, an d vice versa. The interfacing of 8051 with RS232 connectors via the MAX232 chip is the main topic. The 8051 has two pins that are used specifically for transferring and receiving data serially. These two pins are called TXD and RXD and a part of the port 3 group (P3.0 and P3.1). Pin 11 of the 8051 is assigned t o TXD and pin 10 is designated as RXD. These pins are TTL compatible; therefore , they require a line driver to make them RS232 compatible. One such line driver is the MAX232 chip. MAX232 converts from RS232 voltage level s to TTL voltage levels, and vice versa. One advantage of the MAX232 chip is th at it uses a +5V power source which, is the same as the source voltage for the 8 051. In the other words, with a single +5V power supply we can power both the 8 051 and MAX232, with no need for the power supplies that are common in many olde r systems. The MAX232 has two sets of line drivers for transferring and receivi ng data. The line drivers used for TXD are called T1 and T2, while the line dri

vers for RXD are designated as R1 and R2. In many applications only one of each is used. CONNECTING C to PC using MAX 232

INTERRUPTS A single microcontroller can serve several devices. There are two ways to do tha t: INTERRUPTS or POLLING. POLLING: In polling the microcontroller continuously monitors the status of a given devic e; when the status condition is met, it performs the service .After that, it mov es on to monitor the next device until each one is serviced. Although polling ca n monitor the status of several devices and serve each of them as certain condit ion are met. INTERRUPTS: In the interrupts method, whenever any devic e needs its service, the device notifies the microcontroller by sending it an in terrupts signal. Upon receiving an interrupt signal, the microcontroller interru pts whatever it is doing and serves the device. The program associated with the interrupts is called the interrupt service routine (ISR).or interrupt handler. INTERRUPTS Vs POLLING: The advantage of interrupts is that the microcontroller can serve many devices (not all the same time, of course); each device can get the attention of the mi crocontroller based on the priority assigned to it. The polling method cannot as sign priority since it checks all devices in round-robin fashion. More important ly, in the interrupt method the microcontroller can also ignore (mask) a device request for service. This is again not possible with the polling method. The mos t important reason that the interrupt method is preferable is that the polling m ethod wastes much of the microcontrollers time by polling devices that do not nee d service. So, in order to avoid tying down the microcontroller, interrupts are used. INTERRUPT SERVICE ROUTINE For every interrupt, there must be an interrupt servic e routine (ISR), or interrupt handler. When an interrupt is invoked, the microco ntroller runs the interrupts service routine. For every interrupt, there is a fi xed location in memory that holds the address of its ISR. The group of memory lo cation set aside to hold the addresses of ISR and is called the Interrupt Vector Table. Shown below: Interrupt Vector Table for the 8051: S.No. INTERRUPT ROM LOCATION (HEX) PIN FLAG CLEARING 1. Reset 0000 9 Auto

2. External hardware Interrupt 0 0003 P3.2 (12) Auto 3. Timers 0 interrupt (TF0) 000B 4. External hardware Interrupt 1(INT1) 0013 P3.3 (13) Auto 5. Timers 1 interrupt (TF1) 001B 6. Serial COM (RI and TI) 0023 Six Interrupts in the 8051:

Auto Auto Programmer clears it

In reality, only five interrupts are available to the user in the 8051, but many

manufacturers data sheets state that there are six interrupts since they include reset .the six interrupts in the 8051 are allocated as above. 1. Reset. When the reset pin is activated, the 8051 jumps to address locati on 0000.this is the power-up reset. 2. Two interrupts are set aside for the timers: one for Timer 0 and one for Timer 1.Memory location 000BH and 001BH in the interrupt vector table belong to Timer 0 and Timer 1, respectively. 3. Two interrupts are set aside for hardware external harder interrupts. Pi n number 12(P3.2) and 13(P3.3) in port 3 are for the external hardware interrupt s INT0 and INT1,respectively.These external interrupts are also referred to as E X1 and EX2.Memory location 0003H and 0013H in the interrupt vector table are as signed to INT0 and INT1, respectively. 4. Serial communication has a single interrupt that belongs to both receive and transmit. The interrupt vector table location 0023H belongs to this interru pt. Notice that a limited number of bytes are set aside for each interrupt. For exam ple, a total of 8 bytes from location 0003 to 000A is set aside for INT0, extern al hardware interrupt 0.similarly,a total of 8 bytes from location 00BH to 0012H is reserved for TF0, Timer 0 interrupt. If the service routine for a given inte rrupt is short enough to fit in the memory space allocated to it, it is placed i n the vector table; otherwise, and an LJMP instruction is placed in the vector t able to point to the address of the ISR. In that rest of the bytes allocated to that interrupt are unusedFrom the above table also notice that only three bytes of ROM space are assigned to the reset pin. they are ROM address location 0,1 a nd2.address location 3 belongs to external hardware interrupt 0.for this reason, in our program we put the LJMP as the first instruction and redirect the proc essor away from the interrupt vector table, as shown below Steps in executing an interrupt Upon activation of an interrupt, the microcontroller goes through the follow ing steps. 1. It finishes the instruction it is executing and saves the address of the next instruction (PC) on the stack. 2. It also saves the current status of all the interrupts internally (i.e., not on the stack). 3. It jumps to a fixed location in memory called the interrupt vector table that holds the address of the interrupts service routine. 4. The microcontroller gets the address of the ISR from the interrupt vecto r table and jumps to it. It starts to execute the interrupt service subroutine u ntil it reaches the last instruction of the subroutine, which is RETI (return fr om interrupt). 5. Upon executing the RETI instruction, the microcontroller returns to the place where it was interrupted. First, it gets the program counter (PC) address from the stack by popping the top two bytes of the stack into the PC. Then it st arts to execute from that address. Notice from step 5 the critical role of the stack. For this reason, we must be careful in manipulating the stack contents in the ISR. Specifically, in the I SR, just as in any CALL subroutine, the number of pushes and pops must be equal.

Enabling and disabling an interrupt:

Upon reset, all interrupt are disabled (masked), meaning that none will be respo nded to by the microcontroller if they are activated. The interrupt must be enab led by software in order for the microcontroller to respond to them. There is a register called IE (interrupt enable) that is responsible for enabling (unmaskin g) and disabling (masking) the interrupts. Notice that IE is a bit-addressable register. Steps in enabling an interrupt: To enable an interrupt, we take the following steps: 1. Bit D7 of the IE register (EA) must be set to high to allow the reset to take effect. If EA=1, interrupts are enabled and will be responded to if their corresponding bit in IE are high. If EA=0, no interrupt will be responded to, even if the asso ciated bit in the IE register is high.

Interrupt Enable Register D7 EA IE.7 cknowledged. nabled disabled -ET2 rrupt (8052 ES ET1 EX1 ET0 EX0 IE.6 IE.5 IE.4 IE.3 IE.2 IE.1 IE.0 By setting or clearing its enable bit. Not implemented, reserved for future use.* Enables or disables Timer 2 overflow or capture inte Only) Enables or disables the serial port interrupts. Enables or disables Timers 1 overflow interrupt Enables or disables external interrupt 1. Enables or disables Timer 0 overflow interrupt. Enables or disables external interrupt. D6 D5 D4 D3 D2 D1 D0

disables all interrupts. If EA=0, no interrupts is a If EA=1, each interrupt source is individually e

SOFTWARE DESCRIPTION ABOUT SOFTWARE Software used: *Keil software for c programming ABOUT KEIL SOFTWARE: It is possible to create the source files in a text editor such as Notepad, run the Compiler on each C source file, specifying a list of controls, run the Assem bler on each Assembler source file, specifying another list of controls, run eit her the Library Manager or Linker (again specifying a list of controls) and fina

lly running the Object-HEX Converter to convert the Linker output file to an Int el Hex File. Once that has been completed the Hex File can be downloaded to the target hardware and debugged. Alternatively KEIL can be used to create source fi les; automatically compile, link and covert using options set with an easy to us e user interface and finally simulate or perform debugging on the hardware with access to C variables and memory. Unless you have to use the tolls on the comman d line, the choice is clear. KEIL Greatly simplifies the process of creating and testing an embedded application. Projects: The user of KEIL centers on projects. A project is a list of all the sourc e files required to build a single application, all the tool options which speci fy exactly how to build the application, and if required how the application sho uld be simulated. A project contains enough information to take a set of source files and generate exactly the binary code required for the application. Because of the high degree of flexibility required from the tools, there are many optio ns that can be set to configure the tools to operate in a specific manner. It wo uld be tedious to have to set these options up every time the application is bei ng built; therefore they are stored in a project file. Loading the project file into KEIL informs KEIL which source files are required, where they are, and how to configure the tools in the correct way. KEIL can then execute each tool with the correct options. It is also possible to create new projects in KEIL. Source files are added to the project and the tool options are set as required. The pro ject can then be saved to preserve the settings. The project is reloaded and the simulator or debugger started, all the desired windows are opened. KEIL project files have the extension Simulator/Debugger: The simulator/ debugger in KEIL can perform a very detailed simulation o f a micro controller along with external signals. It is possible to view the pre cise execution time of a single assembly instruction, or a single line of C code , all the way up to the entire application, simply by entering the crystal frequ ency. A window can be opened for each peripheral on the device, showing the stat e of the peripheral. This enables quick trouble shooting of mis-configured perip herals. Breakpoints may be set on either assembly instructions or lines of C cod e, and execution may be stepped through one instruction or C line at a time. The contents of all the memory areas may be viewed along with ability to find speci fic variables. In addition the registers may be viewed allowing a detailed view of what the microcontroller is doing at any point in time. The Keil Software 8051 development tools listed below are the programs y ou use to compile your C code, assemble your assembler source files, link your p rogram together, create HEX files, and debug your target program. Vision2 for Windows Integrated Development Environment: combines Project Management, Source C ode Editing, and Program Debugging in one powerful environment. C51 ANSI Optimizing C Cross Compiler: creates relocatable object modules from yo ur C source code, A51 Macro Assembler: creates relocatable object modules from you r 8051 assembler source code, BL51 Linker/Locator: combines relocatable object modules created by the compil er and assembler into the final absolute object module, LIB51 Library Manager: combines object modules into a library, which may be used by the linker, OH51 Object-HEX Converter: creates Intel HEX files from absolute object modules. What s New in Vision3? Vision3 adds many new features to the Editor like Text Templates, Quick Function Navigation, and Syntax Coloring with brace high lighting Configuration Wizard fo r dialog based startup and debugger setup. Vision3 is fully compatible to Vision2 and can be used in parallel with Vision2.

What is Vision3? Vision3 is an IDE (Integrated Development Environment) that helps you write, comp ile, and debug embedded programs. It encapsulates the following components: A project manager. A make facility. Tool configuration. Editor. A powerful debugger. To help you get started, several example programs (located in the \C51\Examples, \C251\Examples, \C166\Examples, and \ARM\...\Examples) are provided. HELLO is a simple program that prints the string "Hello World" using the Serial Interface. MEASURE is a data acquisition system for analog and digital systems. TRAFFIC is a traffic light controller with the RTX Tiny operating system. SIEVE is the SIEVE Benchmark. DHRY is the Dhrystone Benchmark. WHETS is the Single-Precision Whetstone Benchmark. Additional example programs not listed here are provided for each device archite cture. Building an Application in Vision2 To build (compile, assemble, and link) an application in Vision2, you must: 1. Select Project -(forexample,166\EXAMPLES\HELLO\HELLO.UV2). 2. Select Project - Rebuild all target files or Build target. Vision2 compiles, assembles, and links the files in your project Creating Your Own Application in Vision2 To create a new project in Vision2, you must: 1. Select Project - New Project. 2. Select a directory and enter the name of the project file. 3. Select Project - Select Device and select an 8051, 251, or C16x/ST10 dev ice from the Device Database. 4. Create source files to add to the project. 5. Select Project - Targets, Groups, Files. Add/Files, select Source Group1 , and add the source files to the project. 6. Select Project - Options and set the tool options. Note when you select the target device from the Device Database all special options are set automatica lly. You typically only need to configure the memory map of your target hardware . Default memory model settings are optimal for most applications. 7. Select Project - Rebuild all target files or Build target. Debugging an Application in Vision2 To debug an application created using Vision2, you must: 1. Select Debug - Start/Stop Debug Session. 2. Use the Step toolbar buttons to single-step through your program. You ma y enter G, main in the Output Window to execute to the main C function. 3. Open the Serial Window using the Serial #1 button on the toolbar. Debug your program using standard options like Step, Go, Break, and so on. Starting Vision2 and Creating a Project Vision2 is a standard Windows application and started by clicking on the program icon. To create a new project file select from the Vision2 menu Project New Project. This opens a standard Windows dialog that asks you for the new project file name. We suggest that you use a separate folder for each project. You can simply use the icon Create New Folder in this dialog to get a new empty folder. Then select this folder and enter the file name for the new project, i.e. Project1. Vision2 creates a new project file with the name PROJECT1.UV2 which contains a default target and file group name. You can see these names in the Project Window Files. Now use from the menu Project Select Device for Target and select a CPU for your project. The Select Device dialog box shows the Vision2 device

database. Just select the micro controller you use. We are using for our example s the Philips 80C51RD+ CPU. This selection sets necessary tool options for the 80C51RD+ device and simplifies in this way the tool Configuratio n

Building Projects and Creating a HEX Files Typical, the tool settings under Options Target are all you need to start a new application. You may translate all source files and line the application with a click on the Build Target toolbar icon. When you build an application with syntax errors, Vision2 will display errors and warning messages in the Output Window Build page. A double click on a message line opens the source file on the correct location in a Vision2 editor window. Once you have successfully generated your application you can start debugging. After you have tested your application, it is required to create an Intel HEX fi le to download the software into an EPROM programmer or simulator. Vision2 create s HEX files with each build process when Create HEX files under Options for Targ et Output is enabled. You may start your PROM programming utility after the make process when you specify the program under the option Run User Program #1. CPU Simulation: Vision2 simulates up to 16 Mbytes of memory from which areas can be mapped for read, write, or code execution access. The Vision2 simulator traps and reports illegal memory accesses. In addition to memory mapping, the simulator also provides support for the Integrated peripherals of the various 8051 derivatives. The on-chip peripherals of the CPU you have selected are configured from the Device. Database selection: you have made when you create your project target. Refer to page 58 for more Information about selecting a device. You may select and display the on-chip per ipheral components using the Debug menu. You can also change the aspects of each peripheral using the controls in the dialog boxes. Start Debugging: You start the debug mode of Vision2 with the Debug Start/Stop Debug Session command. Depending on the Options for Target Debug Configuration, Vision2 will load the application program and run the startup code Vision2 saves the editor screen layout and restores the screen layout of the last debug session. If the program execution stops, Vision2 opens an editor window with the source text or shows CPU instructions in the disassembly window. The next executable statement is marked with a yellow arrow. During debu gging, most editor features are still available. For example, you can use the find command or correct program errors. Program sou rce text of your application is shown in the same windows. The Vision2 debug mode differs from the edit mode in the following aspects: _ The Debug Menu and Debug Commands described on page 28 are Available. The additional debug windows are discussed in the following. _ The project structure or tool parameters cannot be modified. All build Commands are disabled. Disassembly Window The Disassembly window shows your target program as mixed source and assembly pr ogram or just assembly code. A trace history of previously executed instructions may be displayed with Debug View Trace Records. To enable the trace history, se t Debug Enable/Disable Trace Recording. If you select the Disassembly Window as the active window all program step comma nds work on CPU instruction level rather than program source lines. You can sele

ct a text line and set or modify code breakpoints using toolbar buttons or the c ontext menu commands. You may use the dialog Debug Inline Assembly to modify the CPU in structions. That allows you to correct mistakes or to make temporary changes to the target program you are debugging.

SOFTWARE COMPONENTS About Keil 1. Click on the Keil u Vision Icon on Desktop 2. The following fig will appear

3.

Click on the Project menu from the title bar

4.

Then Click on New Project

5. Save the Project by typing suitable project name with no extension in u r own folder sited in either C:\ or D:\

6. 7. 8.

Then Click on Save button above. Select the component for u r project. i.e. Atmel Click on the + Symbol beside of Atmel

9.

Select AT89C51 as shown below

10. 11.

Then Click on OK The Following fig will appear

12.

Then Click either YES or NOmostly NO

13. Now your project is ready to USE 14. Now double click on the Target1, you would get another option Source grou p 1 as shown in next page.

15.

Click on the file option from menu bar and select new

16. The next screen will be as shown in next page, and just maximize it by d ouble clicking on its blue boarder. 17. Now start writing program in either in C or ASM 18. For a program written in Assembly, then save it with extension . asm and for C based program save it with extension .C

19.

Now right click on Source group 1 and click on Add files to Group Source

20.

Now you will get another window, on which by default C files will appear.

21. 22.

Now select as per your file extension given while saving the file Click only one time on option ADD

23. .

Now Press function key F7 to compile. Any error will appear if so happen

24. 25.

If the file contains no error, then press Control+F5 simultaneously. The new window is as follows

26.

Then Click OK

27. Now Click on the Peripherals from menu bar, and check your required port as shown in fig below 28. Drag the port a side and click in the program file.

29. 30.

Now keep Pressing function key F11 slowly and observe. You are running your program successfully

Embedded C: What is an embedded system? An embedded system is an application that contains at least one programmable com puter and which is used by individuals who are, in the main, unaware that the sy stem is computer-based. Which programming language should you use? Having decided to use an 8051 processor as the basis of your embedded system, th e next key decision that needs to be made is the choice of programming language. In order to identify a suitable language for embedded systems, we might begin b y making the following observations: Computers (such as microcontroller, microprocessor or DSP chips) only accept ins tructions in machine code (object codes). Machine code is, by definition, in the lan guage of the computer, rather than that of the programmer. Interpretation of the code by the programmer is difficult and error prone. All software, whether in assembly, C, C++, Java or Ada must ultimately be transl ated into machine code in order to be executed by the computer. Embedded processors like the 8051 have limited processor power and very limited memory available: the language used must be efficient. The language chosen should be in common use.

Summary of C language Features: It is mid-level, with high-level features (such as support for functions and modules ), and low-level features (such as good access to hardware via pointers). It is very efficient. It is popular and well understood. Even desktop developers who have used only Java or C++ can soon understand C syn tax. Good, well-proven compilers are available for every embedded processor (8-bit to

32-bit or more). Basic C program structure: //- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - //Basic blank C program that does nothing // Includes //- - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - #include <reg51.h> // SFR declarations Void main (void) { While (1); { Body of the loop // Infinite loop } } // match the braces RESULT: According to this project we can implement a system in which a vehicle direction can be controlled wirelessly with respect to the commands given by th e user through touch screen using RF technology.

BIBLIOGRAPHY NAME OF THE SITES 1. WWW.MITEL.DATABOOK.COM 2. WWW.ATMEL.DATABOOK.COM 3. WWW.FRANKLIN.COM 4. WWW.KEIL.COM REFERENCES 1. 8051-MICROCONTROLLER AND EMBEDDED SYSTEM. Mohd. Mazidi.