Counters and Shift Registers

Flip-Flop Applications
Applications of FlipFlop:-

Counters
Asynchronous Counter Synchronous Counter

Register

Counters
A counter is a register that goes through a predetermined sequence of states upon the application of clock pulses. Asynchronous counters Synchronous counters Async. counters (or ripple counters)
the clock signal (CLK) is only used to clock the first FF.
Each FF (except the first FF) is clocked by the preceding FF.

Sync. counters,
the clock signal (CLK) is applied to all FF, which means that all FF shares the same clock signal,
thus the output will change at the same time. 3

Asynchronous counters
Modulus (MOD) the number of states it counts in a complete cycle before it goes back to the initial state. Thus, the number of flip-flops used depends on the MOD of the counter (ie; MOD-4 use 2 FF (2bit), MOD-8 use 3 FF (3-bit), etc..) Example: MOD-4 ripple/asynchronous upcounter.

Asynchronous Counters (continue)

The asynchronous counter that counts 4 number starts from 00011011 and back to 00 is called MOD-4 ripple (asynchronous) upcounter.

Next state table and state diagram

Present State Q1Q0 00 01 10 11 Next State Q1Q0 01 10 11 00
00 11 10
5

01

Asynchronous Counters (continue)

MOD-4 Asynchronous up-counter

Q0 (LSB) 1 Q1 (MSB)

Q
CLK

CLK CLK

K
CLK
Q1 Q0 0 0 0 1

1 0

1 1

0 0

0 1 6

1 0

1 1

Asynchronous Counters (continue)

MOD-8 Asynchronous up-counter
C B A

Q
CLK

Q
CLK

Q
CLK

K
CLK
A 0

B
C

0
0 7

Asynchronous Counters (continue)

Next state table and state diagram Present Next State State ABC ABC

0 7 1 2 5 4 3

000 001 010 011 100 101 110 111

001 010 011 100 101 110 111 000

Four bit up counter

Asynchronous 3 Bit Down Counter

Asynchronous Counters (continue)

So far, we have design the counters with MOD number equal to 2N, where N is the number of bit (N = 1,2,3,4.) (also correspond to number of FF) Thus, the counters are limited on for counting MOD-2, MOD4, MOD-8, MOD-16 etc..

The question is how to design a MOD-5, MOD-6, MOD-7, MOD-9 which is not a MOD-2N (MOD 2N) ? MOD-6 counters will count from 010 (0002) to 510(1012) and after that will recount back to 010 (0002) continuously.
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Asynchronous Decade counter

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Asynchronous Decade counter

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Mod-12 Asynchronous counter

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Asynchronous Counters
MOD-6 ripple up-counter (MOD 2N) Present Next St. 0 St. 5 ABC ABC
1 2 3

000 001 010 011 100 101

001 010 011 100 101 000(110)

Reset the state to 0002 when 1102 is detected 15

Asynchronous Counters (continue)

Circuit diagram for MOD-6 ripple up-counter (MOD 2 N)
C B A 1 CLK

Q
CLK

Q 1
CLK

Q
CLK

K Q
CLR

K Q
CLR

K Q
CLR

Detect the output at ABC=110 to activate CLR. NAND gate is used to detect outputs that generates 0!

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Asynchronous counters
Disadvantages of Asynchronous Counters: Propagation delay is severe for larger MOD of counters, especially at the MSB. Existence of glitch is inevitable for MOD 2N counters. Difficult to design random counters (i.e:- to design circuit that counts numbers in these sequence 56723156723156.)

Solution, use SYNCHRONOUS COUNTERS.

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Synchronous counters
For synchronous counters, all the flip-flops are using the same CLOCK signal. Thus, the output would change synchronously. Procedure to design synchronous counter are as follows:STEP 1: Obtain the State Diagram. STEP 2: Obtain the Excitation Table using state transition table for any particular FF (JK or D). Determine number of FF used. STEP 3: Obtain and simplify the function of each FF input using K-Map. STEP 4: Draw the circuit.
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Synchronous counters
Design a MOD-4 synchronous up-counter, using JK FF.

STEP 1: Obtain the State transition Diagram

0 3 2 1
Binary

00 11 10 01

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Synchronous counters
STEP 2: Obtain the Excitation table. Two JK FF are used. OUTPUT TRANSITION FF INPUT
QN QN+1 J K

0 0 1 1 Present State A 0 0 1 1 B 0 1 0 1

0 1 0 1

0 1 X X

X X 1 0

Excitation table Next State Flip-Flop inputs A 0 1 1 0 B 1 0 1 0 JA K A 0 X 1 X X 0 X 1 JB KB 1 X X 1 1 X 20 X 1

Synchronous counters
STEP 3: Obtain the simplified function using K-Map

B
A 0 0 0 1 X 1 1 X A

JA = B

0 0 X 1 0

1 X 1

KA = B

0 0 1 1 1

1 X X

JB = 1

0 0 X 1 X
21

1 1 1

KB = 1

Synchronous counters
STEP 4: Draw the circuit diagram
B (LSB)
1

A (MSB)

JB
CLK

JA
CLK

KB Q

KA Q

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Synchronous counters
Design a MOD-4 synchronous down-counter, using JK FF?

STEP 1: Obtain the State transition Diagram

0 1 2 3
Binary

00 01 10 11

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Synchronous counters Obtain the Excitation table. Two JK FF are used.

OUTPUT TRANSITION QN QN+1

0 0 1 1

FF INPUT J K

0 1 0 1

0 1 X X

X X 1 0

Present St. A B

Next St. A B JA KA JB KB

0 0 1 1

0 1 0 1

11 00 01 10

1x 0x x1 x0

1x x1 1x x1
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Synchronous counters
Obtain the simplified function using K-Map

B
A 0 0 1 1 x 1 0 x A

JA =A

0 0 X 1 1

1 X 0

KA =B

0 0 1 1 1

1 X X

JB =1

0 0 X 1 X
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1 1 1

KB =1

Synchronous counters
Draw the circuit diagram JA
CLK

Q A

KA Q JB
CLK

Q B

KB Q
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SYNCHRONOUS COUNTERS
All flip-flops are clocked simultaneously Mod-16 Synchronous Up-Counter

fmax

ff

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SYNCHRONOUS COUNTER DESIGN

Mod-6 Up-Counter Using D-flip-flops
Design table

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MOD-6 UP-COUNTER
K-maps

Final design

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Synch. Up/Down Counters

Shift Register
Shift registers are constructed using several flip-flop, connected in such a way to STORE and TRANSFER digital data. Basically, D flip-flop is used. The input data (either 0 or 1) is applied to the D terminal and the data will be stored at Q during positive/negative-edge transition of the clock pulse.
Negative edge transition of CLK

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Shift Register
One D FF is used to store 1-bit of data. Thus, the number of flip-flops used is the same with the number of bit stored. Shift register mean that the data in each FF can be transferred/move to other FF upon edge triggering of the clock signal. Four types of data movement in shift register are: Parallel in / parallel out (PIPO)

Serial in / parallel out (SIPO)

Serial in / serial out (SISO) Parallel in / serial out (PISO)
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Shift Register

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Shift Register
Serial Data VS Parallel Data movement
Serial
Movement of N-bit data require N number of CLK pulses. Thus, the operation is slow. Only one FF is required to be connected at the output terminal, thus only one wire is required.

Parallel
Require only one CLK pulse to transfer all N-bit of data. Thus, operation is faster than serial. Required N number of connection to the output terminal, which is proportional to the number of bit. Thus, too many connection is required. 34

Parallel in / parallel out (PIPO)

Flip-flop configuration for PIPO register.
D3 D2 D1 D0

D Q3
CP

D Q2
CP

D Q1
CP

D Q0
CP

CLK
Q3 Q2 Q1 35 Q0

 PIPO data movement.

CLK D3 D2 1 0 0 1

Parallel in / parallel out (PIPO)

1 0 1 1 1 0

D1
D0 Q3 Q2 Q1 Q0 0 0

1
0 1 0 1 0

1
0 0 1 1 0

1
0

0
1

1
0

0
0

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Parallel in parallel out

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Parallel in parallel out

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Serial in / parallel out (SIPO)

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Serial in / parallel out (SIPO

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Serial in / serial out (SISO)

Flip-flop connection for SISO.
1st CLK DIN 2nd CLK 3rd CLK 4th CLK

D Q0
CP

D Q1
CP

D Q2
CP

D Q3
CP

CLK

FF0

FF1

FF2

FF3

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Serial in / serial out (SISO)

SISO data movement. Binary data 10111 is transferred! 1st 2nd 3rd 4th
CLK 5th

DATA-IN
Q0 Q1 Q2 Q3

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Parallel in / serial out (PISO) Flip-flop connection for PISO.

SHIFT/LOAD D0

D1

D2

D3

D Q0
CLK CP

D Q1
CP

D Q2
CP

D Q3
CP

Serial data out

FF0

FF1

FF2
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FF3

Parallel in / serial out (PISO) PISO data movement.

CLK D0 D1 0 0 0 1 1 0 1 1 1 0

D2
D3
SHIFT/ LOAD

1
1

1
0

1
0

0
1

1
1

Q3

0 44

Bidirectional shift Register

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Shift Register Counters

A shift register counter is a shift register whose output being fed back (connected back) to the serial input. This shift register would count the state in a unique sequence! Two types of shift register counter:-

The ring counter

The Johnson counter

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Ring Counter
Q3 Q2 Q1 Q0

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Ring Counter (continue)

0 1 0 0 0 0 1 0 0 0 0 1 1 0 0 0

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Ring Counter (continue)

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Ring Counter (continue)

Ring counters are used to construct One-Hot counters It can be constructed for any desired MOD number A MOD-N ring counter uses N flip-flops connected in the arrangement as shown in fig. a) In general ring-counter will require more flip-flops than a binary counter for the same MOD number

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Ring Counter (continue)

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Johnson Counter
Or Twisted-ring counter

Johnson counter constructed exactly like a normal ring counter except that the inverted output of the last flip-flop is fed back to first flip-flop 52

Johnson Counter (Continue)

A0 B 0 0

1
0 0

1
1 0

1
1 1

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Johnson Counter (Continue)

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Applications of shift registers

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Applications of shift registers

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