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LOW-VOLTAGE ORGANIC NONVOLATILE THIN-FILM TRANSISTOR MEMORY BASED ON A P(MMA-GMA)AlO COMPLEX LAYER

Jinimol P George

ECE A Roll No.:53

OBJECTIVES
OVERVIEW INTRODUCTION
FABRICATION ELECTRICAL CHARACTERISTICS
OUTPUT CHARACTERISTICS

TRANSFER CHARACTERISTICS
DYNAMIC STORAGE CYCLES

COMPARISON

ADVANTAGES

APPLICATIONS
CONCLUSION

OVERVIEW
Fabrication

Study of electrical characteristics of OTFT

memory. Comparison.

INTRODUCTION
Non-volatile memory: Computer memory that can retain the stored information even when not powered. Thin-Film Transistor (TFT) : Field-effect transistor made by depositing thin films of a semiconductor active layer as well as the dielectric layer and metallic contacts over a

supporting substrate. Organic TFT: TFTs have also been made using organic materials.


1.

Two methods to fabricate OTFT memory device. Use ferroelectric materials or electret as the gate dielectric layer. The direction of the polarization of the gate dielectric layer modulates the channel conductance.

2. Use the floating-gate OTFT memory with the charge

storage in the floating-gate modulating the channel conductance. Insert a complex layer between the semiconductor and the dielectric. Complex layer is: poly(methyl methacrylate co glycidyl methacrylate)-Al-O [P(MMAGMA)-Al-O].

FABRICATION
Gate electrode: Al film(30nm) is formed on a cleaned glass substrates thermal evaporation.
The insulator polymer P(MMA-GMA) was coated on the Al gate electrode from a solution in butyl acetate and cross-linked for 30 min at 120 C. Then a thin Al layer was formed by vacuum thermal deposition on the surface of the P(MMAGMA) film.

The heat treating at 120 C in the oven with clean atmosphere.


A 30-nm-thick pentacene active layer was grown

by thermal evaporation. MoO3 (10 nm) and Al (100 nm) were thermally deposited onto the active layer to form the sourcedrain electrodes.

ELECTRICAL CHARACTERISTICS

OUTPUT CHARACTERISTICS

Holes accumulated under applied negative VGS.

Ids(A)

TRANSFER CHARACTERISTICS

Transfer characteristics of the present OTFT memory in linear region, by the (a) semiexponential scale and (b) linear scale.

Linear region , Vds= -1v. Vgs sweeping from off to on and returning to off at

the different sweeping rates. Cyclic Vgs - Hysteresis loop - anticlockwise direction. Direction of Ep change with Eg - Hysteresis loop Nonvolatile memory. Slower the Vgs sweeps, the larger hysteresis loop. Vgs sweep <0.2 V/S, the hysteresis loop is not clearly affected by the Vgs sweeping rate.

DYNAMIC STORAGE CYCLE


VGS = 15, 0, and 15 V for P, R, and E, respectively. The P/R/E dynamic cycle currents can remain repeatable without degradation after 100 cycles. After being programmed, the R IDS,1-state can keep higher than 1 A. After being erased, the R IDS,0-state was quickly increased at the initial seconds and then maintained at a 10^-9 A magnitude.

COMPARISON
Parameters Floating gate OTFT OTFT memory based P(MMA-GMA)

Channel conductance

The charges storage in the floating-gate.


-50v to +50v 2000 m

Polarization of gate dielectric layer.


-15v to +15v 2000 m

Operating voltage Channel width

Channel length 30m P/R/E voltage Linear region Memory ratio -50/0/+50v Vds = -5v 32

30 m -15/0/+15 Vds = -1v 2010

ADVANTAGES
Low operating voltage (-15 v to +15v) Large memory ratio (2010) Large memory window (13.3v) Long retention time (4000s) Inexpensive Simple fabrication Lightweight

APPLICATION
The application where a fast P/R/E is not required, such as smart cards used to store information on bank accounts, etc.

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