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IDesignSpec

Fastest path to code from register specification

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Agenda
Industry Challenges Trends in the industry The Problem Hardware registers IDesignSpec
Features Benefits

Conclusion and About us


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Semiconductor Industry Challenges


80% of designs go over deadline by an average 44%* 70% effort devoted to verification 80% of product cost is head count related*

Make people more effective Make processes efficient Get appropriate tools

*Source: NXP/Spirit 2008

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How to improve TTM & reduce costs?


Make people more effective
Focus on core competency Automate mundane tasks

Make process efficient


Do not duplicate effort, use single source eliminate bugs and need to keep things in-sync Manage change Take a holistic approach : not strive for local minima, achieve company-wide minima

Get appropriate tools


Correct-by-construction : Cheapest way to catch bugs Very short learning curve : low ramp-up time
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Trends in the industry


Higher density
Integration of higher density IP in an SoC

Greater reuse of IP
External, 3rd party Internal, older projects, other teams

Greater configurability
Use of programmable registers

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Use of Programmable registers


Control Hardware
Configuration registers Configuration tables

Send Status to Software Often 1000s of registers per IP

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Why are Registers Important


A programming interface Registers are present in large numbers in a chip VGA/LCD controller contains 560 registers Microprocessor like UltraSparc contains 1000s of registers Verification of these registers are important as their malfunction can cause failure in the whole system. Needs some verification methodology to address register verification challenge

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Register Fields

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Registers in hardware

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What you do with registers


Describe Create in hardware Verify Debug in Lab Program the software Document for end-user All this takes > 20% of development time and resources
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Consumers of Register Information

Specification

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The Problem
Application Format

Functional Specification
hw Design hw Programming Guide Verification Environment Firmware Diagnostics Application Software

MS Word/Frame/OpenOffice
VHDL/Verilog MS Word/Excel OVM, VMM, eRM, SystemVerilog UVM C/C++ header C/C++ header C/C++ header

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IDesignSpec
Register Automation and Management tool
Simple plug-in that transforms Editor into EDA tool Not based on a separate GUI or new language Enables you to embedded Register information in an executable form inside Hardware Spec. Generates all views from the single source

Recipient of Innovative EDA tool award at VLSI Conference


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Overview
OVM/UVM VMM/eRM IP-XACT IP-XACT

C/C++ h

IDesignSpec
SystemRDL Word/Excel OpenOffice Frame*

SV Header RTL

Excel/CSV Custom Word Templates Tcl / XSLT / Perl

SystemRDL

HTML/XML Custom Output

Interactive OR Batch
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Custom Formatted Word files www.agnisys.com

Popular Use Model


OVM/UVM

IDSBatch
IP-XACT IP-XACT

C/C++ h

IDesignSpec
SystemRDL Word/Excel OpenOffice Frame*

SV Header RTL

XML/Excel/CSV Custom Word Templates Tcl / XSLT / Perl Custom Formatted Word files
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SystemRDL

Tcl*

XML Custom Output Tcl*

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Generates
Verification
OVM, VMM, UVM, eRM, Vr_ad, SV header files

Design
Verilog, VHDL AMBA-AHB, APB, Avalon, OCP-IP, AMBA-AXI, Any proprietary bus

Software
C/C++ header files

Documentation
HTML, MS Word, OpenOffice.org, SVG, XML

Standards
IP-XACT, SystemRDL
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Imports
Various ways to import data into IDS Standards
IP-XACT, SystemRDL

IDS XML CSV


IDSExcel

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Key Advantages
Editor based, no GUI, no new language
short learning curve

Consistent Register Definition


Device documentation

Enables reuse of specification and code


Development groups Product lines

Changes propagate automatically


No manual, laborious work High quality

Import existing register documentation into IDS system

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Key Benefits
Create synthesizable code for all registers Automatically Verify all registers in the design Get a jump start for Device Driver, Firmware and application software development Automatically create documentation for customers and Tech-Pubs Improves productivity of engineers and quality of results Prevents errors from entering the system Based on open industry standards
Data is not locked into some proprietary vendor format

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IDesignSpec
The Fastest Path to Code from Register Spec.

Try IDesignSpec in the Cloud http://xuropa.com/agnisys

Confidential and Proprietary

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