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MOSFET (IGFET)
Enhancement MOSFET
n-Channel EMOSFET
Depletion MOSFET
n-Channel DMOSFET p-Channel DMOSFET
p-Channel EMOSFET
G
IG= 0
B
IS
MOSFET (IGFET)
Enhancement MOSFET
n-Channel EMOSFET
Depletion MOSFET
n-Channel DMOSFET p-Channel DMOSFET
p-Channel EMOSFET
Figure: For vGS < Vto the pn junction between drain and body is reverse biased and i D=0.
metal
oxide
n+ p x L
n+
body B
source S
drain D
VD=Vs n++
oxide
n+
n+
body B
drain D
VD=Vs
+++ n++
oxide
n+
n+
VGS > VT
drain D
n+
VD=Vs
n+
Triode Region
A voltage-controlled resistor @small VDS
B S - + +++ +++ metal - oxide - - p B S -+ +++ +++ +++ metal - -oxide - - -p D VGS2>VGS1 G n+ D VGS1>Vt
ID
increasing VGS
n+
n+
n+
cut-off
B
S -+ +++ +++ +++ +++ metal - - -oxide -----p D VGS3>VGS2
VDS 0.1 v
n+
n+
Increasing VGS puts more charge in the channel, allowing more drain current to flow
Figure: As vDS increases, the channel pinches down at the drain end and iD increases more slowly. Finally for vDS> vGS -Vto, iD becomes constant.
A mapping between logic values and voltage levels corresponding to a static discipline appropriate for the inverter.
If
then
SIGNAL AMPLIFICATION