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Multiple devices communicating over a single set of wires Only one device can talk at a time or the message is confused Each line or wire of a bus can at any one time contain a single binary digit. Over time, however, a sequence of binary digits may be transferred These lines may and often do send information in parallel A computer system may contain a number of different buses
Buses Structure
Serial versus parallel Around 50-100 lines although it's possible to have as few as 3 or 4 Lines can be classified into one of four groups
Physical Implementations
Buses
Definition: a collection of wires with a common purpose Each wire is called a line Typically, buses carry information from one place to another
bus
Printer
Mouse Keyboard Ports
Disk controller
Modem
CPU RAM
Graphics card
Sound card Network card
Monitor
Speakers
Computer
Types of Buses
Point-to-point
Serial port Modem
Control unit
ALU
Types of Buses
Multipoint
Computer
Computer
Computer
Memory
Video controller
Point-to-point and multipoint refer to signaling propagation Point-to-point Signal from a source is reachable by only one node. Multipoint Many nodes can sense the same signal from a source. Point-to-point requires a dedicated connection directly linked between two nodes Host should have one connector for each devices Multipoint can share single connection from host Devices may attach directly to a share bus or through HUBs
Point-to-point
Multipoint
Each connection must have a dedicated circuit Speed on a connection can differ from the others Defected devices cannot interfere others More expensive if we want to connect to many devices
Devices usually share same connection from host All devices should synchronize to each other A defected device can make the whole system malfunction Cheaper to increase the number of device connected to a system
I/O Module
Memory
Motherboard
Many configurations possible
I/O Device
Data Bus
Carries data between the CPU and memory or I/O devices Bi-directional
Data transferred out of the CPU for write operations Data transferred into the CPU for read operations
Address Bus
Control Bus
Collection of signals for coordinating CPU activities Each signal has a unique purpose Typical sizes: 10-20 lines Signals are output, input, or bi-directional Typical signals
/RD (read) /WR (write) CLK (clock) /IRQ (interrupt request) etc.