IMPLEMENTATION OF BASIC GATES USING MEMRISTANCE AND AMBIPOLARITY

PRESENTED BY REGISTER NO GUIDED BY :I. BALA KRISHNA :1581210092 :DR.M.MALATHI

BACKGROUND ANALYSIS AND INFORMATION

The continuous scaling of MOSFETs led to the consideration of devices with intrinsic channel and Schottky barrier (SB) contacts[3].
The memristor shows many advantageous features for memory design such as non-volatility, linearity, low-power, and good scalability[1].

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OBJECTIVES
1. To design and analyze basic gates memristance and ambipolarity transistors. using

2. To measure the delay and power consumption by the designed gates.

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EXPECTED OUTCOMES

1. Reduced Power consumption. 2. Reduced delay.

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LITERATURE REVIEW

Here, D, S, and G are the conventional drain, source, and gate, while gate PG determines the polarity of the ambipolar transistor.
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LITERATURE REVIEW
Energy band diagrams of metal n-type and p-type semiconductors under thermal equilibrium

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Energy band diagrams of metal n-type and p-type semiconductors under forward bias

Energy band diagrams of metal n-type and p-type semiconductors under reverse bias

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LITERATURE REVIEW

When current flows in one direction through a memristor, the electrical resistance increases and when current flows in the opposite direction, the resistance decreases. When the current is stopped, the memristor retains the last resistance that it had, and when the flow of charge starts again, the resistance of the circuit will be what it was when it was last active.

METHODS
A spice model for Memristor can be implemented and simulated to observe the characteristics and the working of memristor and is used in our project. Ambipolar CNFET model is implemented and simulated using SPICE so that the functioning of CNFET as both PMOS and NMOS can be observed.

Using above two technologies we implement gates and then compare with CMOS models.
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TIME SCHEDULE
PHASE I Literature survey for first review. Simulation of memristor model for review II. Simulation of ambipolar CNFET for review III. PHASE II Implementation of gates using memristance and ambipolarity. Comparing the results with CMOS gates.
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Resources, Citation and Bibliography

Pilin junsangsri, Fabrizio Lombardi, "Design of a Hybrid Memory Cell Using Memristance and Ambipolarity," IEEE Transactions on Nanotechnology, vol.12, no.1, January 2013. D. Batas and H. Fiedler, A memristor SPICE implementation and a new approach for magnetic flux controlled memristor modeling, IEEE Transactions on Nanotechnolgy., vol. 10, no. 2, pp. 250255, Mar. 2011.
Y.-M. Lin, J. Appenzeller, J. Knoch, and P. Avouris, Highperformance carbon nanotube field-effect transistor with tunable polarities, IEEE Transactions on Nanotechnolgy., vol. 4, no. 5, pp. 481489, Sep. 2005. SRM M.TECH VLSI

SIGNIFICANCE OF THE RESEARCH PROJECT

The memristor shows many advantageous features for memory design such as non-volatility, linearity, low-power, and good scalability. Ambipolar technology was used to explore in-field controllable dynamic logic as well as static logic and significant gains in area, power, and performance have been reported. So, using these ambipolar transistors and memristors we can implement logic functions with fewer gates compared to unipolar transistors, resulting in the reduction of gates and power consumption and non-volatile results.
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Thank you.

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