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Microprocessor Control of Manufacturing Systems and Introduction to Mechatronics

Instructor: Professor Charles Ume Lecture #7

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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George W. Woodruff School of Mechanical Engineering, Georgia Tech

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RAM Random Access Memory Volatile loses contents after power off
ROM Read Only Memory non-Volatile Contents must be programmed at the factory EPROM Electrically Programmable Read Only Memory non-Volatile Electrically programmable May be erasable with ultraviolet light if manufacturer included window in chip package Still considered Read Only Memory during normal program execution

EEPROM Electrically Erasable Programmable Read Only Memory non-Volatile Electrically programmable and erasable (Note:Sometimes higher voltage than microcontroller voltage may be required) Slower to than RAM so still considered Read Only Memory during George to W.write Woodruff School of Mechanical Engineering, Georgia Tech normal program execution

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Product Designations found in literature is shown below:

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Product Family Members as of 3/2008

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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George W. Woodruff School of Mechanical Engineering, Georgia Tech

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MC9S12C-Family package options:

48-pin Low-profile Quad Flat Package (LQFP) 52-pin Low-profile Quad Flat Package 80-pin quad flat package (QFP) (Shown)

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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MC9S12C-Family Block Diagram shows available subsystems

Figure1-1. MC9S12C-Family Block Diagram

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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George W. Woodruff School of Mechanical Engineering, Georgia Tech

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. . .

Figure 6. Register and Control Bit Assignments (Programming Reference)

George W. Excerpt Woodruff School of Mechanical Engineering, Georgia Tech of Detailed Register Map (Device User Guide)

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. . George W. Woodruff School of Mechanical Engineering, Georgia Tech .

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George W. Excerpt Woodruff School of Mechanical Engineering, Georgia Tech of Detailed Register Map (Device User Guide)

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George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Hardware Mode Selection Summary (Reference Manual)

MODA, MODB, & MODC may be writable in software after startup, see Reference George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Hardware Mode External Connections

In Single Chip mode, Ports A, B and E available as general purpose input/output pins In Narrow Expanded Mode, Ports A and B form 16-bit Address and 8-bit Data bus, Port E provides control signals for external devices In Wide Expanded mode, Ports A and B form 16-bit Address and 16bit Data bus, Port E provides control signals for external devices

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Note: Map depends on state of ROMON and ROMHM bits

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Axiom CML-12C32 Evaluation Board

MC9S12C32

Solderless Breadboard

Serial Port
Oscillator Power Jack Address Demultiplexer Reset MCU External SRAM George W. Woodruff School of Mechanical Engineering, Georgia Tech Port

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Default Configuration: MODC = 1 MODA = MODB = 0 Single Chip Mode MODA and MODB may be changed in software to permit use of Expanded Wide mode once after each reset Internal Flash Memory is available only if ROMON is enabled At the rising edge of Reset, the state of pin PP[6]/KWP[6]/ROMCTL is latched to the ROMON bit. ROMCTL = 1 ROMON Enabled, Flash memory available ROMCTL = 0 ROMON Disable, Flash memory unavailable For operation in this class, ROMON will be Enabled, so do not pull PP[6] low on Reset!

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Axiom CML-C32 Single chip mode ROMON Enabled MON12 not in use
MODA = 0 MODB = 0

Internal User RAM available: $0800-$0FFF User can put a program in Internal Flash$8000-$FEFF Ports A and B available for use

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Axiom CML-C32 Single chip mode ROMON Enabled MON12 in use

MODA = 0 MODB = 0

Internal User RAM available: $0800-$0DFF User can put a program in Internal Flash $8000-$B7FF and Internal RAM Ports A and B available for use

MON12 is located here

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Axiom CML-C32 Expanded Wide mode ROMON Enabled MON12 not in use (CodeWarrior)
MODA = 1 MODB = 1

Internal User RAM available: $0800-$0FFF External User RAM available: $0400-$07FF $1000-$7FFF User can put a program in Internal Flash $8000-$FEFF Ports A and B NOT availableGeorge for use W. Woodruff School of Mechanical Engineering, Georgia Tech

Axiom CML-C32 ME4447/6405 Expanded Wide mode ROMON Enabled MON12 in use
MODA = 1 MODB = 1

Internal User RAM available: $0800-$0DFF Mon12 RAM Interrupt Vector: $0F8A 0FFF Monitor Utility Jump Table: $FF10-$FF67 External User RAM available: $0400-$07FF $1000-$7FFF MON12 is User can put a located here program in Internal Flash $8000-$B7FF and RAM George W. Woodruff School of Mechanical Engineering, Georgia Tech Ports A and B NOT available for use

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Interrupt Vector Table Mon12 NOT in use Standard S12C32 Interrupt Jump Table Each vector is 2 bytes. User stores address of interrupt service routine in appropriate vector 0x is same as $: It is used when writing program in C

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Interrupt Vector Table Mon12 NOT in use Standard S12C32 Interrupt Jump Table Each vector is 2 bytes. User stores address of interrupt service routine in appropriate vector

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Standard S12C32 Interrupt Jump Table (MON12 not in use)

The user can put the starting address of his/her subroutine Directly in the vector field of the interrupt he/she wants to Use. Example: If the user wants to use the IRQ interrupt, he/she can put the starting address of his/her subroutine directly in vector fields $FFF2 and $FFF3

George W. Woodruff School of Mechanical Engineering, Georgia Tech

ME4447/6405 Interrupt Vector Table MON12 in use Standard S12C32 Interrupt Vector Jump Table is not available with MON12 MON12 supplies alternate Interrupt Jump Table Users interrupt service routine must be stored in $4000-$7FFF

Monitor Interrupt Vector Table (CMLC32 Users Guide)

George W. Woodruff School of Mechanical Engineering, Georgia Tech

Interrupt Vector Table ME4447/6405 MON12 in use

Standard S12C32 Interrupt Vector Jump Table is not available with MON12
MON12 supplies alternate Interrupt Jump Table Users interrupt service routine must be stored in $4000-$7FFF if Autostart is to be used

Monitor Interrupt Vector Table (CMLC32 Users Guide)

To use the vector table, the user again writes the address of the interrupt service routine to the location given in the table. For example, to use the IRQ interrupt to call an interrupt service routine located at address ISR_ADDR, the user writes the following code: MOVW #$0800, $0FF2 OR MOVW #ISR_ADDR,$0FF2 LDD #$0800 STD $0FF2 During initialization MON12 writes $0000 to all vectors in the Monitor Interrupt vector Table to cause any unscheduled interrupt to cause a trap. Any nonzero value will cause the S12C32 to jump to the interrupt service routine located at that value. George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Relationship Between Standard S12C32 Interrupt Vectors and MON12 Interrupt Table Vectors
When MON12 is in use, it configures the standard interrupt vector table and the user may not override these values. MON12 allocates memory for the Monitor Interrupt Table, located from $0F8A - $0FFF. During initialization, MON12 clears the contents of the Monitor Interrupt Table. If an interrupt occurs and the corresponding vector contains $0000, MON12 perceives this as an error and restarts the monitor program, ending execution of user code. MON12 uses some interrupts to accomplish its tasks, hence uses those vector addresses. In addition, the standard interrupt table is located in Flash EEPROM and cannot be written to using MON12. When writing programs in C, a BDM cable is used to program the HCS12 and the standard interrupt table is used.
George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Mon12 Commands
COMMAND BF <StartAddress> <EndAddress> <Data> BR [<Address>]. CALL [<Address>] G [<Address>] HELP LOAD [P] MD <StartAddress> [<EndAddress>] MM [<Address>] MW [<Address>] MOVE <StartAddress> <EndAddress> [<DestAddress>] RD Description Block Fill Memory with Data Display/Set Breakpoint Execute Subroutine Begin/continue execution of user program Display Monitor Commands Load S-Records into memory, P = Paged S2 Memory Display Bytes Memory Modify Bytes (8 bit values) Memory Modify Words (16 bit values) Move a block of memory Display all CPU registers

OFFSET [arg]
Proceed RM [p,y,x,a,b,c,s] STOPAT <Address> T [<count>]

Offset for download

Proceed / Continue from Breakpoint Modify CPU Register Contents Trace until address Trace <count> Instructions

George W. Woodruff School of Mechanical Engineering, Georgia Tech

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Several subroutines from Mon12 exist that are available for performing I/O tasks. Utility subroutines available to the user are as follows:

George W. Woodruff School of Mechanical Engineering, Georgia Tech