Sie sind auf Seite 1von 43

Basics of Microprocessor

1.1 Evolution of Microprocessor and types 1.2 8085 Microprocessor, Salient features Pin description, Architecture of 8085 - Functional Block diagram, Register organization

What is Microprocessor?

8085 Pin Description


8085 is implemented in 40 pin Dual Inline Package (DIP)

Pin wise Description


Pin No. Pin Name Description
A crystal determines the frequency of the clock generator, which synchronizes the operation of 8085. The frequency is internally divided by two; therefore to operate a system at 3 MHz, the crystal should have frequency of 6 Mhz.

1,2

X1 - X2

This is an active high output signal RESET OUT used to reset external devices connected to microprocessor.

PIN No. Pin Name


4 SOD

Description
Serial Output Data.
This is an active high, serial output port pin, used to transfer serial 1 bit data under software control.

Serial Input Data. 5 SID


This is an active high, serial input port pin, used to accept serial 1 bit data under software control.
This is an active high, edge and level triggered, non-maskable highest priority hardware interrupt. Also called as RST 4.5 . Address (4.5 *8)= 0024H When TRAP occurs, then microprocessor start execution from 0024H automatically.

TRAP

PIN No. Pin Name

Description
Restart. These are active high, maskable hardware interrupts, RST 7.5 is edge triggered interrupt. RST 6.5 and RST 5.5 are level triggered interrupts. These are vectored interrupt that transfer the program control to specific memory location.

7-9

RST 7.5 , RST 6.5 , RST 5.5

Interrupt Request is an active 10 INTR


high general purpose hardware interrupt. When INTR occurs, the microprocessor generate interrupt ack signal INTA.

Interrupt Acknowledge. This is 11 INTA


used to acknowledge interrupt.

Pin No. Pin Name

Description
Multiplexed Address / Data Bus
These pins are multiplexed to be used as address bus as well as data bus.These are signal lines which are bidirectional & they serve dual purpose. They are used as lower order address bus as well as data bus. This is Ground Reference

12 - 19

AD0-AD7

20

GND

Pin No.

Pin Name

Description

Address Bus
21 - 28 A8-A15
These 8 bit output signal lines, they are unidirectional and used for most significant bits called higher order address bus of a 16-bit address.

Address Latch Enable


ALE signal is used to separate AD0AD7 ie demultiplex

30

ALE

ALE= 1 (High) indicates that contents are address. ALE=0 (Low) indicates that the contents are data.

Pin No. Pin Name


Status Signal

Description
These are status signal, similar to IO/M, can identify various operations.

IO/M 0

S1 1 1 0 1 0 1

S0 1 0 1 0 1 1

Machine Cycle Opcode Fetch Memory Read Memory Write I/O Read I/O Write Interrupt Acknowledgement

29, 33

S0 and S1

0 0 1 1 1

Pin No. Pin Name


Write 31 WR

Description
This is a Write control signal (active low). This signal indicates that the data on the data bus are to be written into selected memory or I/O location.

Read 32 RD
This is a Read control signal (active low). This signal indicates that the selected I/O or memory device is to be read.

35

READY

If READY pin is high, then the microprocessor completes the operation and proceeds for next operation. If READY pin is low, the microprocessor enters in to wait state. This signal is primarily used to synchronize slower peripherals with the microprocessor.

Input Output / Memory


This is a status signal used to differentiate between I/O and memory location. When it is high, it indicates an I/O operation; When it is low, it indicates a memory operation.

34

IO/M

Pin No. Pin Name

Description
When the RESET pin is activated by an external key all the internal operations are suspended and the program counter is cleared and the program execution begins at 000H memory address.

36

RESET IN

Clock Output. 37 CLK OUT


This signal is used as the system clock for other devices in the system.

Hold acknowledgement. This


38 HLDA
pin is used for hold acknowledgement after receiving HOLD signal. When HOLD pin is activated by an external signal the microprocessor relinquishes control of address, data and control buses and allows the external peripheral to use them. +5V Power Supply

39

HOLD

40

Vcc

Architecture of 8085
8085 is an 8 bit general purpose microprocessor. It is called 8 bit microprocessor because it has 8 bit internal bus, 8-bit ALU , 8-bit registers.

The internal architecture of 8085 consist of : 1. Register Block 2. ALU Block 3. Control Unit Block 4. Interrupt Block 5. Serial I/O Control Block

1. Register Block
It Consist of three types of the registers: 1. Temporary registers 2. General Purpose registers 3. Special Purpose registers

1. Temporary Registers:
1. The 8085 mp provides two 8-bit temporary registers W and Z and not available for the user. 2. The mp use these registers for storing the data or address temporarily whenever required.

2 . General Purpose Register: 1. The 8085 provides 6 general purpose register of 8 bit each i.e B, C, D, E, H and L. 2. These registers are available for user and can be used to store 8-bit data or can be used to form register pair such as BC, DE, HL to store 16-bit data.

3. Special Purpose Register:


There are three special purpose registers i.e. a) Program Counter (PC) b) Stack Pointer (SP) c) Increment / Decrement Latch

a. Program Counter (PC):


It is a 16- bit register used for sequencing of the execution of the program.

The function of program counter is to point to the next byte of


instruction is to be fetched. When the byte is being fetched, the program counter is automatically incremented by one to point the next memory location. On reset ,program counter is loaded with 000H and start execution of the program from the address 000H onwards.

b) Stack Pointer (SP):


it is 16 bit register used to store 16-bit address of stack

memory. It is used as a memory pointer.


It points to a memory location in R/W memory called

as a stack.
Stack Pointer points current top of stack.

Stack is usually accessed in LIFO(Last In First Out)


fashion

C) Increment and Decrement Latch:

it is a 16-bit register to increment or decrement the contents of program counter and stack pointer.

2. ALU Block
Arithmetic and Logical Group : this group consist of a) ALU b) Accumulator c) Temporary register and d) flag register.

a. Arithmetic and Logical unit


The ALU of microprocessor 8085 is 8-bit
microprocessor. ALU is responsible to perform all arithmetic and logical operations like addition, subtraction, comparison, ANDING etc.

b. Accumulator (ACC)
it is 8-bit register which contains 8 flip-flops. The accumulator is also identified as register A. The importance of accumulator is that, whenever microprocessor performs any arithmetic or logical operation in ALU then first 8-bit number is always

transferred from accumulator and result is stored


back to the accumulator.

c. Temporary Register (Temp, W, Z)

There are three 8-bit temporary registers as temp, W


and Z.

These are only used by microprocessor and user is not


allowed to use these register.

d. Flag Register:
The flag register contains following 5 Flags:

S- Sign Flag Z- Zero Flag AC- Auxiliary Carry Flag P- Parity Flag CY- Carry Flag

1. Carry Flag(CF): Indicates weather theres a carry or not


after an Arithmetic and logical operation.

2. Parity Flag (PF)


If the count of logic 1 in 8-bit result is an even No. then the parity is even and PF=1 Similarly If the count of logic 1 in 8-bit result is an Odd No. then the parity is odd and PF=0

3. Auxiliary Carry Flag:


It is also known as intermediate carry or half carry. When microprocessor performs addition of two 8-bit numbers then the carry generated after the addition of four LSBs is directly copied into AC flag.

MSB

LSB

When microprocessor performs subtraction of two 8-bit numbers then borrow required by 5 LSBs is directly copied into AC flag.

4. Zero Flag
If the result of arithmetic and logical operation is zero then ZF=1.

5. Sign Flag
This flag is only used for signed binary numbers. If the result obtained is negative the SF=1. but if result is positive SF=0.

3. Control Unit Block


1. Instruction Register (IR) 2. Instruction Decoder (ID) 3. Timing and Control Unit

IR

ID
256

Timing & Control unit

1. Instruction Register (IR)


It is 8-bit register used to store 8-bit opcode of the instruction fetched from memory. Opcode present in IR is then transferred to instruction

decoder(ID) for decoding.


The ID has 8 inputs & 256 output lines

2. Instruction Decoder (ID)


It accepts an opcode of instruction from Instruction register to decode it and give information to control logic The information includes : what operation is to be performed? Who is going to perform? How many operands byte the instruction has?

3. Timing and Control Unit:


Accepts information from ID and generates different Control Signal. This unit synchronizes all the microprocessor operations & generate control & status signals necessary for communication between microprocessor & peripherals.

4. Interrupt Control Block


The 8085 microprocessor includes 4 maskable inerrupts and 1 Non-Maskable Interrupt(NMI) The microprocessor can ignore or delay a Maskable

Interrupt request if it is performing some critical task.


However it has to respond to a Non-Maskable Interrupt immediately.

Fig: Table of Interrupts

5. Serial I/O Control Block


8085 microprocessor has 2 pins specially designed for software controlled serial I/O data transmission. Data transfer is controlled through 2 instructions RIM & SIM. RIM (Request Interrupt Mask) instruction is used to input serial data through SID line.

SIM (Set Interrupt Mask) instruction is output data serially


from SOD line.

Address/ Data Buffer


Buffers are commonly used to increase the driving capability of data bus & address bus.

8085 System Bus


Bus: is a collection of conducting path which are used to
transfer signal from one functional unit to another functional unit.

The microprocessor 8085 has following types of buses:


1. Address bus 2. Data bus 3. Control bus

1. Address Bus:
8085 has 16-bit address bus from A15- A8 and AD7- AD0 and it is unidirectional. The address bus is used to transfer 16-bit address of memory as well as 8-bit address of I/O ports.

2. Data Bus:
The 8085 has 8-bit data bus from AD7- AD0 and it is bidirectional. These lines are often known as multiplexed lines and time shared lines. The AD7- AD0. are used to transform both address as well as data. But the address and data is not transferred simultaneously so these lines are often known as time shared lines.

3. Control Bus:
Control bus has various lines which have specific functions for coordinating and controlling microprocessor operations.

The 8085 has 3 Control buses: RD, WR, IO/M.

The IO/M is used to define operation either of memory or I/O

ports. The RD and WR is used during reading and writing


operations respectively.

Demultiplexing of AD7- AD0 of 8085

74LS373

Fig: Demultiplexing of address data pins of 8085

In 8085 microprocessor, the higher order address lines ie. AD8- AD15 are directly available , but the lower order address lines are multiplexed with data bus in time sharing. Hence, the demultiplexing of address / data bus is required i.e separation of address and data bus.
When ALE goes High (1) the address signals will be latched in the octal latch 74LS373 and output of the latch will be provided on AD7- AD0 .

When ALE goes Low(0) the latch will be disabled and the AD7- AD0 can be used as data bus D0-D7.

Das könnte Ihnen auch gefallen