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Submitted by

M.SAI KIRAN (10UQ1A0456)


V.SAI MANOGNYA (10UQ1A0495)
P.MOUNIKA (10UQ1A0466)


Internal guide External guide
MR. KRISHNA REDDY P.NEERAJA
Assistant professor Scientist C
ECE ,VITAE RCI,DRDO
DESHMUKHI. HYDERABAD.










The emergence of Field Programmable Gate Arrays (FPGAs) with
embedded processors and significant progress in their development tools
have contributed to the realization of high performance interfaces, run
simultaneously in the FPGA logic. Important application areas of FPGAs
are Data acquisition systems.

Data acquisition is the process of sampling signals that measure real world
physical conditions and converting the resulting samples into digital
numeric values that can be manipulated by a computer.
To convert the applied input analog data into digital format and to store the
result in a FIFO register for further requirements.
To determine the limitations that a fluctuating environment places on
target detection methods, a data acquisition system is being developed.
The data acquisition system consists of multi-channel, high-speed A/D and
FPGA technology to control it.

The components of data acquisition systems include:

Low pass filter ,Voltage Regulator and Multiplexer.
Analog-to-digital converters (ADC), which convert conditioned sensor
signals to digital values.
FIFO to store the data.
An ADC is one of the key components in Data acquisition systems as it
governs the speed and performance of the systems.



analog inputs
LPF
VOLTAGE
REGULATOR
MUX
BUFFER
REGISTER
SERIAL
ADC977A
VIRTEX-2 PRO FPGA
PC405 PROCESSOR
DAC8420
TARGET
DEVICE
CONVERTING,GENERATING,
CAPTURING O/P
CONTROL
SIGNALS
This project describes the implementation and integration of hardware and
software of a serial ADC in a Virtex-2 pro FPGA with an embedded Power
PC 405 processor.
A 16-bit ADC with high speed, low power serial interface will be
implemented in VHDL using Xilinx ISE. The hardware and software will
be developed and combined using Xilinx EDK.
Xilinx Platform Studio (XPS) will be used to perform synthesis, place and
route and obtain the configuration bit-stream. The final configuration bit
will be downloaded onto the custom target board using Impact tool and the
results will be verified.
FPGA

FPGA is introduced in 1985 by Xilinx.
Field programmable gate array, a type of logic chip that can be
programmed. An FPGA is similar to a PLD, but whereas PLDs are
generally limited to hundreds of gates, FPGAs support thousands of
gates.
FPGA consists of logic blocks, routing matrix, I/O blocks, memory,
advanced features.


Features
It is a16 bit ADC.
High speed serial interface.
Power dissipation is 100mw (max).
200 kSPS Throughput RateAD977A
Single 5 V Supply Operation
Unipolar; 0 V10 V, 0 V5 V and 0 V4 V



Bipolar; -10 V, -5 V and -3.3 V
Choice of External or Internal 2.5 V Reference
20-Lead Skinny DIP or SOIC Package
28-Lead Skinny SSOP Package
Specifications
On chip clock.
I/p range is 0-5v.
AD977A chip is used.


Fifo result
As shown in the figure when the write signal is given to the FIFO1 the data is written
and when read signal is given then the data will be presented at dout. Here the wr_req
is given from 16h0000 to 16h0003 and at the rd_req the data is read
Serial to parallel shifter is used to increase the speed of response. Here the
serial data 0010011011111111 is given to shift register such that it converts it
to parallel as shown in figure
a/vmax=d/M
M=2^n -1
a is analog input value
d is digital encoding
n is number of bits.(n=16)
Vmax is maximum voltage of analog signal
Input range of adc =-10v to +10v
Digital value of -10=0x0000,+10=0xFFFF
If a=9V then d=0xE665

Applications:
In missile interface unit for launching.
Temperature and pressure control in missiles.
Storing data in registers to avoid reprogramming of same data.



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