Instructions: Language

of the Computer
Chapter 2

CSE 313: Computer Architecture

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Instruction Set Architecture:
a Critical Interface

software

instruction set

hardware

Portion of the machine that is visible to the programmer or the compiler writer.

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Good ISA
 Lasts through many implementations
(portability, compatibility)
 Can be used for many different
applications (generality)
 Provide convenient functionality to higher
levels
 Permits an efficient implementation at
lower levels

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Von Neumann Machines
 Von Neumann “invented” stored program computer in
1945
 Instead of program code being hardwired, the program
code (instructions) is placed in memory along with data

Control

ALU

Program

Data
CSE 313: Computer Architecture
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 Stored Program Concept
 Instructions are bits
 Programs are stored in memory
— to be read or written just like data
 Fetch & Execute Cycle
 Instructions are fetched and put into a special register
 Bits in the register "control" the subsequent actions
 Fetch the “next” instruction and continue

memory for data, programs,

compilers, editors, etc.
Processor Memory

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Execution
Cycle
Instruction Obtain instruction from program storage
Fetch

Instruction
Determine required actions and instruction size
Decode

Operand
Locate and obtain operand data
Fetch

Execute Compute result value or status

Result
Deposit results in storage for later use
Store

Next
Determine successor instruction
Instruction
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Basic ISA Classes
 Memory to Memory Machines
 Every instruction contains a full memory
address for each operand
 Maybe the simplest ISA design
 However memory is slow
 Memory is big (lots of address bits)

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Memory-to-memory
machine
 Assumptions
 Two operands per operation
 first operand is also the destination
 Memory address = 16 bits (2 bytes)
 Operand size = 32 bits (4 bytes)
 Instruction code = 8 bits (1 byte)
 Example A = B+C (hypothetical code)
mov A, B ; A <= B
add A, C ; A <= B+C
 5 bytes for instruction
 4 bytes for fetch 1st and 2nd operands
 4 bytes to store results
 add needs 17 bytes and mov needs 13 byts
 Total 30 bytes memory traffic

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Why CPU Storage?
 A small amount of storage in the CPU
 To reduce memory traffic by keeping repeatedly used
operands in the CPU
 Avoid re-referencing memory
 Avoid having to specify full memory address of the operand
 This is a perfect example of “make the common case fast”.
 Simplest Case
 A machine with 1 cell of CPU storage: the accumulator

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Accumulator Machine
 Assumptions
 Two operands per operation
 1st operand in the accumulator
 2nd operand in the memory
 accumulator is also the destination (except for store)
 Memory address = 16 bits (2 bytes)
 Operand size = 32 bits (4 bytes)
 Instruction code = 8 bits (1 byte)
 Example A = B+C (hypothetical code)
Load B ; acc <= B
Add C ; acc <= B+C
Store A ; A <= acc
 3 bytes for instruction
 4 bytes to load or store the second operand
 7 bytes per instruction
 21 bytes total memory traffic

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Stack Machines
 Instruction sets are based on a stack model of execution.
 Aimed for compact instruction encoding
 Most instructions manipulate top few data items (mostly top 2) of
a pushdown stack.
 Top few items of the stack are kept in the CPU
 Ideal for evaluating expressions (stack holds intermediate results)
 Were thought to be a good match for high level languages
 Awkward
 Become very slow if stack grows beyond CPU local storage
 No simple way to get data from “middle of stack”

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Stack Machines
 Binary arithmetic and logic operations
 Operands: top 2 items on stack
 Operands are removed from stack
 Result is placed on top of stack
 Unary arithmetic and logic operations
 Operand: top item on the stack
 Operand is replaced by result of operation
 Data move operations
 Push: place memory data on top of stack
 Pop: move top of stack to memory

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General Purpose Register
Machines
 With stack machines, only the top two
elements of the stack are directly available
to instructions. In general purpose register
machines, the CPU storage is organized as
a set of registers which are equally
available to the instructions
 Frequently used operands are placed in
registers (under program control)
 Reduces instruction size
 Reduces memory traffic

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General Purpose
Registers
° 1975-present all machines use general purpose registers
Dominate
° Advantages of registers
• registers are faster than memory
• registers are easier for a compiler to use
- e.g., (A*B) – (C*D) – (E*F) can do multiplies in any order
vs. stack
• registers can hold variables
- memory traffic is reduced, so program is sped up
(since registers are faster than memory)
- code density improves (since register named with fewer bits
than memory location)

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Classifying General Purpose
Register Machines
 General purpose register machines are sub-classified
based on whether or not memory operands can be used
by typical ALU instructions
 Register-memory machines: machines where some ALU
instructions can specify at least one memory operand
and one register operand
 Load-store machines: the only instructions that can
access memory are the “load” and the “store”
instructions

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 Comparing number of
instructions
 Code sequence for A = B+C for five
classes of instruction sets:

Register Register
Memory to Memory Accumulator Stack (Register-memory) (Load-store)
mov A B load B push B load R1 B Load R1 B
add A C add C push C add R1 C Load R2 C
store A add store A R1 Add R1 R1 R2
pop A Store A R1

MIPS is one of these

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Instruction Set Definition
 Objects = architecture entities = machine state
 Registers
 General purpose
 Special purpose (e.g. program counter, condition code, stack pointer)
 Memory locations
 Linear address space: 0, 1, 2, …,2^s -1
 Operations = instruction types
 Data operation
 Arithmetic
 Logical
 Data transfer
 Move (from register to register)
 Load (from memory location to register)
 Store (from register to memory location)
 Instruction sequencing
 Branch (conditional)
 Jump (unconditional)

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