8051 Syllabus

8051 Microcontroller: Microcontroller families, 8051 Architecture,

Signal Description, Register organization, Internal RAM, Special
Function Registers, Interrupt control flow, Timer/Counter
Operation, Serial Data Communication, and RS-232C Standard.

8051 Programming & Interfacing: Addressing modes, Instruction
set, Simple Programs involving Arithmetic and Logical Instructions,
Timers/Counters, Serial Communication & Interrupts.

Interfacing: Matrix Key Board, Stepper Motor, LCDs, DAC & ADC.

Contents:
Introduction
Block Diagram and Pin Description of the 8051
Registers
Memory mapping in 8051
Stack in the 8051
I/O Port Programming
Timer
Serial Communication
Interrupt
Why do we need to learn
MicroProcessors/Controllers?

The microprocessor is the core of computer
systems.
Nowadays many communication, digital
entertainment, portable devices, are
controlled by them.
A designer should know what types of
components he needs, ways to reduce
production costs and product reliable.
Different aspects of a
microprocessor/controller
Hardware :Interface to the real world



Software :order how to deal with inputs

The necessary tools for a
microprocessor/controller
CPU: Central Processing Unit
I/O: Input /Output
Bus: Address bus & Data bus
Memory: RAM & ROM
Timer
Interrupt
Serial Port
Parallel Port
CPU
General-
Purpose
Micro-
processor
RAM ROM
I/O
Port
Timer

Serial
COM
Port

Data Bus
Address Bus
General-Purpose Microprocessor System
Microprocessors:
CPU for Computers
No RAM, ROM, I/O on CPU chip itself
ExampleIntels x86, Motorolas 680x0
Many chips on mothers board
General-purpose microprocessor
RAM ROM
I/O
Port
Timer
Serial
COM
Port
Microcontroller
CPU
A smaller computer
On-chip RAM, ROM, I/O ports...
ExampleMotorolas 6811, Intels 8051, Zilogs Z8 and PIC 16X
A single chip
Microcontroller :
Microprocessor
CPU is stand-alone, RAM,
ROM, I/O, timer are separate
designer can decide on the
amount of ROM, RAM and
I/O ports.
expansive
versatility
general-purpose

Microcontroller
CPU, RAM, ROM, I/O and
timer are all on a single chip
fix amount of on-chip ROM,
RAM, I/O ports
for applications in which cost,
power and space are critical
single-purpose
Microprocessor vs. Microcontroller

Feature 8051 8052 8031
ROM (program space in bytes) 4 Kb 8 Kb ---
RAM (bytes) 128 256 128
Timers 2 3 2
I/O pins 32 32 32
Serial port 1 2 1
Interrupt sources 6 8 6

Comparison of the 8051 Family Members
Embedded system means the processor is embedded into that
application.

An embedded product uses a microprocessor or microcontroller to
do one task only.

In an embedded system, there is only one application software that
is typically burned into ROM.

Exampleprinter, keyboard, video game player
Embedded System
1. Meeting the computing needs of the task efficiently and cost
effectively
speed, the amount of ROM and RAM, the number of I/O ports
and timers, size, packaging, power consumption
easy to upgrade
cost per unit
2. availability of software development tools
assemblers, debuggers, C compilers, emulator, simulator,
technical support
3. wide availability and reliable sources of the microcontrollers.
Three criteria in Choosing a Microcontroller
Block Diagram
CPU
On-chip
RAM
On-chip
ROM for
program
code
4 I/O Ports
Timer 0
Serial
Port
OSC
Interrupt
Control
External interrupts
Timer 1
Timer/Counter
Bus
Control
TxD RxD
P0 P1 P2 P3
Address/Data
Counter
Inputs
Pin Description of the 8051
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
(RXD)P3.0
(TXD)P3.1
(T0)P3.4
(T1)P3.5
XTAL2
XTAL1
GND
(INT0)P3.2
(INT1)P3.3
(RD)P3.7
(WR)P3.6
Vcc
P0.0(AD0)
P0.1(AD1)
P0.2(AD2)
P0.3(AD3)
P0.4(AD4)
P0.5(AD5)
P0.6(AD6)
P0.7(AD7)
EA/VPP
ALE/PROG
PSEN
P2.7(A15)
P2.6(A14)
P2.5(A13)
P2.4(A12)
P2.3(A11)
P2.2(A10)
P2.1(A9)
P2.0(A8)
8051
(8031)
Pins of 80511/4
Vccpin 40
Vcc provides supply voltage to the chip.
The voltage source is +5V.
GNDpin 20ground
XTAL1 and XTAL2pins 19,18

Figure (a). XTAL Connection to 8051
C2
30pF
C1
30pF
XTAL2
XTAL1
GND
Using a quartz crystal oscillator
We can observe the frequency on the XTAL2 pin.
Pins of 80512/4
RSTpin 9reset
It is an input pin and is active highnormally low.
The high pulse must be high at least 2 machine cycles.
It is a power-on reset.
Upon applying a high pulse to RST, the
microcontroller will reset and all values in registers
will be lost.
Reset values of some 8051 registers

Figure (b). Power-On RESET Circuit
30 pF
30 pF
8.2 K
10 uF
+
Vcc
11.0592 MHz
EA/VPP
X1
X2
RST
31
19
18
9
Pins of 80513/4
/EApin 31external access
There is no on-chip ROM in 8031 and 8032 .
The /EA pin is connected to GND to indicate the code is
stored externally.
/PSEN ALE are used for external ROM.
For 8051, /EA pin is connected to Vcc.
/ means active low.
/PSENpin 29program store enable
This is an output pin and is connected to the OE pin of the
ROM.
Pins of 80514/4
ALEpin 30address latch enable
It is an output pin and is active high.
8051 port 0 provides both address and data.
The ALE pin is used for de-multiplexing the address and data
by connecting to the G pin of the 74LS373 latch.
I/O port pins
The four ports P0, P1, P2, and P3.
Each port uses 8 pins.
All I/O pins are bi-directional.
Pins of I/O Port
The 8051 has four I/O ports
Port 0 pins 32-39P0P0.0P0.7
Port 1pins 1-8 P1P1.0P1.7
Port 2pins 21-28P2P2.0P2.7
Port 3pins 10-17P3P3.0P3.7
Each port has 8 pins.
Named P0.X X=0,1,...,7, P1.X, P2.X, P3.X
ExP0.0 is the bit 0LSBof P0
ExP0.7 is the bit 7MSBof P0
These 8 bits form a byte.
Each port can be used as input or output (bi-direction).

Hardware Structure of I/O Pin
Each pin of I/O ports
Internal CPU buscommunicate with CPU
A D latch store the value of this pin
D latch is controlled by Write to latch
Write to latch1write data into the D latch
2 Tri-state buffer.
TB1: controlled by Read pin
Read pin1really read the data present at the pin
TB2: controlled by Read latch
Read latch1read value from internal latch
A transistor M1 gate
Gate=0: open
Gate=1: close
A Pin of Port 1
8051 IC
D Q

Clk Q
Vcc
Load(L1)
Read latch
Read pin
Write to latch
Internal CPU
bus
M1
P1.X
pin
P1.X
TB1
TB2
P0.x
Writing 1 to Output Pin P1.X
D Q

Clk Q
Vcc
Load(L1)
Read latch
Read pin
Write to latch
Internal CPU
bus
M1
P1.X
pin
P1.X
8051 IC
2. output pin is
Vcc
1. write a 1 to the pin
1
0
output 1
TB1
TB2
Writing 0 to Output Pin P1.X
D Q

Clk Q
Vcc
Load(L1)
Read latch
Read pin
Write to latch
Internal CPU
bus
M1
P1.X
pin
P1.X
8051 IC
2. output pin is
ground
1. write a 0 to the pin
0
1
output 0
TB1
TB2
Reading High at Input Pin
D Q

Clk Q
Vcc
Load(L1)
Read latch
Read pin
Write to latch
Internal CPU bus
M1
P1.X pin
P1.X
8051 IC
2. MOV A,P1
external pin=High
1. write a 1 to the pin MOV
P1,#0FFH
1
0
3. Read pin=1 Read latch=0
Write to latch=1
1
TB1
TB2
Reading Low at Input Pin
D Q

Clk Q
Vcc
Load(L1)
Read latch
Read pin
Write to latch
Internal CPU bus
M1
P1.X pin
P1.X
8051 IC
2. MOV A,P1
external pin=Low
1. write a 1 to the pin
MOV P1,#0FFH
1
0
3. Read pin=1 Read latch=0
Write to latch=1
0
TB1
TB2
Other Pins
P1, P2, and P3 have internal pull-up resisters.
P1, P2, and P3 are not open drain.
P0 has no internal pull-up resistors and does not
connects to Vcc inside the 8051.
P0 is open drain.
Compare the figures of P1.X and P0.X.
However, for a programmer, it is the same to program
P0, P1, P2 and P3.
All the ports upon RESET are configured as output.
A Pin of Port 0
8051 IC
D Q

Clk Q
Read latch
Read pin
Write to latch
Internal CPU
bus
M1
P0.X
pin
P0.X
TB1
TB2
Port 0 with Pull-Up Resistors
P0.0
P0.1
P0.2
P0.3
P0.4
P0.5
P0.6
P0.7
DS5000
8751
8951
Vcc
10 K
P
o
r
t

0

Port 3 Alternate Functions
17 RD P3.7
16 WR P3.6
15 T1 P3.5
14 T0 P3.4
13 INT1 P3.3
12 INT0 P3.2
11 TxD P3.1
10 RxD P3.0
Pin Function P3 Bit
RESET Value of Some 8051 Registers:
0000 DPTR
07 SP
00 PSW
00 B
00 ACC
0000 PC
Reset Value Register
RAM are all zero.
Memory mapping in 8051

ROM memory map in 8051 family
0000H
0FFFH
0000H
1FFFH
0000H
7FFFH
8751
AT89C51
8752
AT89C52
4k
DS5000-32
8k 32k
from Atmel Corporation
from Dallas Semiconductor
Registers
A
B
R0
R1
R3
R4
R2
R5
R7
R6
DPH DPL
PC
DPTR
PC
Some 8051 16-bit Register
Some 8-bit Registers of the
8051
RAM memory space allocation in the 8051
7FH
30H
2FH
20H
1FH
17H
10H
0FH
07H
08H
18H
00H
Register Bank 0
(Stack) Register Bank 1
Register Bank 2
Register Bank 3
Bit-Addressable RAM
Scratch pad RAM
8051 Flag bits and the PSW register
CY AC F0 RS1 OV RS0 P --
CY PSW.7 Carry flag
AC PSW.6 Auxiliary carry flag
-- PSW.5 Available to the user for general purpose
RS1 PSW.4 Register Bank selector bit 1
RS0 PSW.3 Register Bank selector bit 0
OV PSW.2 Overflow flag
-- PSW.1 User define bit
P PSW.0 Parity flag Set/Reset odd/even parity
RS1 RS0 Register Bank Address
0 0 0 00H-07H
0 1 1 08H-0FH
1 0 2 10H-17H
1 1 3 18H-1FH
Stack in the 8051
The register used to access
the stack is called SP (stack
pointer) register.

The stack pointer in the 8051
is only 8 bits wide, which
means that it can take value
00 to FFH. When 8051
powered up, the SP register
contains value 07.
7FH
30H
2FH
20H
1FH
17H
10H
0FH
07H
08H
18H
00H
Register Bank 0
(Stack) Register Bank 1
Register Bank 2
Register Bank 3
Bit-Addressable RAM
Scratch pad RAM


Example of STACK operation:

MOV R6,#25H
MOV R1,#12H
MOV R4,#0F3H
PUSH 6
PUSH 1
PUSH 4















0BH
0AH
09H
08H
Start SP=07H
25
0BH
0AH
09H
08H
SP=08H
12
25
0BH
0AH
09H
08H
SP=09H
F3
12
25
0BH
0AH
09H
08H
SP=08H

Addressing Modes
Immediate
Register
Direct
Register Indirect
Indexed




Immediate Addressing Mode

MOV A,#65H

MOV A,#A

MOV R6,#65H

MOV DPTR,#2343H

MOV P1,#65H










Register Addressing Mode

MOV Rn, A ;n=0,..,7
ADD A, Rn
MOV DPL, R6

MOV DPTR, A
MOV Rm, Rn










Direct Addressing Mode
Although the entire of 128 bytes of RAM can be accessed using direct addressing
mode, it is most often used to access RAM loc. 30 7FH.

MOV R0, 40H
MOV 56H, A
MOV A, 4 ; MOV A, R4
MOV 6, 2 ; copy R2 to R6
; MOV R6,R2 is invalid !

SFR register and their address

MOV 0E0H, #66H ; MOV A,#66H
MOV 0F0H, R2 ; MOV B, R2
MOV 80H,A ; MOV P1,A









Register Indirect Addressing Mode
In this mode, register is used as a pointer to the data.

MOV A,@Ri ; move content of RAM loc. Where address is held by Ri into A
( i=0 or 1 )
MOV @R1,B

In other word, the content of register R0 or R1 is sources or target in MOV,
ADD and SUBB instructions.
Example: Write a program to copy a block of 10 bytes from RAM location starting
at 40H to RAM location starting at 60H.
Solution:
MOV R0,#40H ; source pointer
MOV R1,#60H ; destination pointer
MOV R2,#10 ; counter
BACK: MOV A,@R0
MOV @R1,A
INC R0
INC R1
DJNZ R2,BACK










Indexed Addressing Mode And On-Chip ROM
Access
This mode is widely used in accessing data elements of look-up table
entries located in the program (code) space ROM at the 8051

MOVC A,@A+DPTR
A= content of address A +DPTR from ROM
Note:
Because the data elements are stored in the program (code )
space ROM of the 8051, it uses the instruction MOVC instead of
MOV. The C means code.








SJMP and LJMP:

LJMP(long jump)
LJMP is an unconditional jump. It is a 3-byte instruction in which
the first byte is the op-code, and the second and third bytes represent the
16-bit address of the target location. The 20byte target address allows a
jump to any memory location from 0000 to FFFFH.

SJMP(short jump)
In this 2-byte instruction. The first byte is the op-code and the
second byte is the relative address of the target location. The relative
address range of 00-FFH is divided into forward and backward jumps, that
is , within -128 to +127 bytes of memory relative to the address of the
current PC.










MUL & DIV

MUL AB ;B|A = A*B
MOV A,#25H
MOV B,#65H
MUL AB ;25H*65H=0E99
;B=0EH, A=99H
DIV AB ;A = A/B, B = A mod B
MOV A,#25H
MOV B,#10H
DIV AB ;A=2, B=5






Rotate

EXAMPLE:

RR:

RRC:

RL:

RLC:




C
C
8051 INSTRUCTION SET











ACALL: Absolute Call

ADD, ADDC: Add Acc. (With Carry)

AJMP: Absolute Jump

ANL: Bitwise AND

CJNE: Compare & Jump if Not Equal

CLR: Clear Register

CPL: Complement Register

DA: Decimal Adjust

DEC: Decrement Register

DIV: Divide Accumulator by B

DJNZ: Dec. Reg. & Jump if Not Zero

INC: Increment Register

JB: Jump if Bit Set

JBC: Jump if Bit Set and Clear Bit

JC: Jump if Carry Set

JMP: Jump to Address

JNB: Jump if Bit Not Set

JNC: Jump if Carry Not Set

JNZ: Jump if Acc. Not Zero

JZ: Jump if Accumulator Zero

LCALL: Long Call

LJMP: Long Jump

MOV: Move Memory

MOVC: Move Code Memory

MOVX: Move Extended Memory

MUL: Multiply Accumulator by B

NOP: No Operation

ORL: Bitwise OR

POP: Pop Value From Stack

PUSH: Push Value Onto Stack

RET: Return From Subroutine

RETI: Return From Interrupt

RL: Rotate Accumulator Left

RLC: Rotate Acc. Left Through Carry

RR: Rotate Accumulator Right

RRC: Rotate Acc. Right Through Carry

SETB: Set Bit

SJMP: Short Jump

SUBB: Sub. From Acc. With Borrow

SWAP: Swap Accumulator Nibbles

XCH: Exchange Bytes

XCHD: Exchange Digits

XRL: Bitwise Exclusive OR

Undefined: Undefined Instruction




Arithmetic instructions:





ADD A,Rn
ADD A,Direct
ADD A,@Ri
ADD A,#Data
ADDC A,Rn
SUBB A, Direct
SUBB A,@Ri
SUBB A,#Data
INC A
INC Rn
INC Direct
INC @Ri
DEC A
DEC Rn







SUBB A,Rn
ADDC A, Direct
ADDC A,@Ri
ADDC A,@Data


Arithmetic instructions:





DEC Direct
DEC @Ri
INC DPTR
MUL AB
DIV AB
DA A









Logical instructions:





ORL A,#Data
ORL Direct,A
ORL Direct,#Data
XRL A,Rn
XRL A,Direct
XRL A,@Ri
XRL A,#Data
XRL Direct,A
XRL Direct,#Data







ANL A,Rn
ANL A,Direct
ANL A,@Ri
ANL A,#Data
ANL Direct,A
ANL Direct,#Data
ORL A,Rn
ORL A,Direct
ORL A,@Ri


Logical instructions:





CLR A
CPL A
RL A
RLC A
RR A
RRC A
SWAP A


Data transfer instructions:





MOV Direct, Direct
MOV Direct,@Ri
MOV Direct,#Data
MOV @Ri,A
MOV @Ri,Direct
MOV @Ri,#Data
MOV DPTR,#Data16
MOVX A,@Ri
MOVX A,@DPTR







MOV A,Rn
MOV A, Direct
MOV A,@Ri
MOV A,#Data
MOV Rn,A
MOV Rn,Direct
MOV Rn,#Data
MOV Direct,A
MOV Direct, Rn


Data transfer instructions:












PUSH Direct
POP Direct
XCH A,Rn
XCH A, Direct
XCH A,@Ri
XCHD A,@Ri
MOVX @Ri,A
MOV @DPTR,A


Boolean Variable Manipulation instructions:












CLR C
CLR bit
SETB C
SETB bit
CPL C
CPL bit
ANL C,bit
ANL C,/bit
ORL C,bit
ORL C,/bit
MOV C,bit
MOV bit,C
JC rel
JNC rel
JB bit,rel
JNB bit,rel
JBC bit,rel


Program branching instructions:












ACALL addr11
LCALL addr16
RET
RETI
AJMP addr11
LJMP addr16
SJMP rel
JMP @A+DPTR
JZ rel
JNZ rel
CJNE A,direct,rel
CJNE A,#data,rel
CJNE Rn,#data,rel
CJNE @Ri,#data,rel
DJNZ Rn,rel
DJNZ direct,rel
NOP
TIMERS
The 8051 has two timers:
1. TIMER 0
2. TIMER 1



TIMER 0




TIMER 1
TMOD Register
Gate : When set, timer only runs while INT(0,1) is high.
C/T : Counter/Timer select bit.
M1 : Mode bit 1.
M0 : Mode bit 0.

TCON Register (BIT ADRESSABLE REG)
TCON.7 - TF1: Timer 1 overflow flag.
TCON.6 - TR1: Timer 1 run control bit.
TCON.5 - TF0: Timer 0 overflag.
TCON.4 - TR0: Timer 0 run control bit.
TCON.3 - IE1: External interrupt 1 edge flag.
TCON.2 - IT1: External interrupt 1 type flag.
TCON.1 - IE0: External interrupt 0 edge flag.
TCON.0 - IT0: External interrupt 0 type flag.

Concept of timer
Mode 1 Programming
1. Load the TMOD value register indicating which timer (Timer0 or
Timer1) is to be used and which timer mode is selected.
2. Load registers TL & TH with initial count values.
3. Start the timer
4. Keep monitoring the timer flag(TF)
5. Stop the timer.
6. Clear TF for next round .
7. Go back to step 2 to load TH & TL again
NOTE: MODE 0 is exactly like mode-1 except that it is 13-bit timer
instead 16-bit. The 13-bit timer/counter can hold values between 0000H to
1FFFH in TH-TL.
Mode 2 Programming
1. Load the TMOD value register indicating which timer (Timer0 or
Timer1)is to be used, and select the timer mode (mode-2).

2. Load the TH register with the initial count value.

3. Start the timer.

4. Keep monitoring TF timer flag

5. After it becomes 1 then clear the TF flag

6. Go back to step 4 , since mode 2 is auto - reload
Example program for Mode1
ORG 0H
MOV TMOD,#00000001B
BACK: MOV TL0,#0F0H
MOV TH0,#0FFH
CPL P1.0
ACALL DELAY
SJMP BACK

DELAY:SETB TR0
HERE: JNB TF0, HERE
CLR TR0
CLR TF0
RET
END
Example program for Mode2
ORG 0H
MOV TMOD,#00100000B
MOV TH1, #05H
SETB TR1
HERE: JNB TF1, HERE
CPL P2.0
CLR TF1
SJMP HERE
END
Serial Communication
Serial vs. parallel Communication
Synchronous vs. Asynchronous
Serial data communication uses two methods
1. Synchronous
2. Asynchronous







There are special IC chips made by many manufacturers for serial
communications.
1. UART- universal asynchronous receiver-transmitter.
2. USART- universal synchronous - asynchronous receiver-transmitter
Framing (Asynchronous )
SCON register
There are two ways to increase the baud rate of data transfer in 8051.
1. Use a higher frequency crystal.
2. Change a D7-bit to 1 in the PCON register

PCON Register: ( Byte addressable)





Doubling the baud rate
Programming 8051 to transfer data serially

In programming 8051 to transfer character bytes serially, the following steps must
be taken
1. The TMOD register is loaded with the value 20H , indicating the use of Timer 1
in mode 2(8-bit auto reload) to set the baud rate
2. The TH1 is loaded with one of the values to set the baud rate for serial data
transfer( assuming XTAL= 11.0592 MHz).
3. The SCON register is loaded with the value 50H indicating serial mode 1, where
an 8-bit data is framed with start & stop bits.
4. TR1 is SET to 1 to start Timer 1.
5. TI is cleared when transmission is complete.
6. The character byte to be transferred serially is written into SBUF register.
7. TI is monitored for transmission .
8. To transfer the next character go to step 5
Example Program for Serial Communication


ORG 0H
MOV TMOD,#00100000B------(20H)
MOV TH1,#-3
MOV SCON,#01010000B-------(50H)
SETB TR1
AGAIN:MOV A,#
ACALL TRANSFER
MOV A,# K
ACALL TRANSFER
MOV A,# L
ACALL TRANSFER
MOV A,# U TRANSFER: MOV SBUF,A
ACALL TRANSFER HERE: JNB TI, HERE
MOV A,# CLR TI
ACALL TRANSFER RET
SJMP AGAIN
END




Interrupts
Concept behind Interrupt

An interrupt is an external or internal event that interrupts the
microcontroller to inform it that a device needs its service
Upon activation of an interrupt, the microcontroller goes through
the following steps
1. It finishes the instruction it is executing and saves the address of
the next instruction (PC) on the stack
2. It also saves the current status of all the interrupts internally (i.e.:
not on the stack)
3. It jumps to a fixed location in memory, called the interrupt vector
table, that holds the address of the ISR
4. The microcontroller gets the address of the ISR from the interrupt
vector table and jumps to it
5. Upon executing the RETI instruction, the microcontroller returns
to the place where it was interrupted

Interrupts & Interrupt vectors:

Interrupt Enable Register
TCON REGISTER



In level triggered interrupt to ensure the activation of the
hardware interrupt at the INTn pin, make sure that the duration
of the low-level signal is around 4 machine cycles.



LEVEL TRIGGERED INTERRUPT
In edge-triggered interrupts
The external source must be held high for at least
one machine cycle, and then held low for at least
one machine cycle
The falling edge of pins INT0 and INT1 are latched
by the 8051 and are held by the TCON.1 and
TCON.3 bits of TCON register

Interrupt Priority register

LCD Interfacing (16X2)





V
ss
V
cc
V
EE
RS R/W EN DB
0 ---------------------------------------------
DB
7
+ -









LCD
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
Addresses of 16x2 LCD

80

81

82

83

84

85

86

87

88

89

8A

8B

8C

8D

8E

8F

C0

C1

C2

C3

C4

C5

C6

C7

C8

C9

CA

CB

CC

CD

CE

CF
LCD INTERFACING TO 8051
STEPPER MOTOR INTERFACING
A Stepper motor is a widely used device that translates
electrical pulses into mechanical movement.
In applications such as disk drives, dot matrix printers &
robotics, the stepper motor is used for position control
Stepper motors commonly have a permanent magnet
rotor( also called shaft) surrounded by a stator.
Stator Windings Configuration
Driving Stepper motor
Normal 4 Step Sequence





Wave Drive 4 step sequence
CLOCKWISE STEP WINDING
A
WINDING
B
WINDING
C
WINDING
D
COUNTER CLOCKWISE
1 1 1 0 0
2 0 1 1 0
3 0 0 1 1
4 1 0 0 1
CLOCKWISE STEP WINDING
A
WINDING
B
WINDING
C
WINDING
D
COUNTER CLOCKWISE
1 1 0 0 0
2 0 1 0 0
3 0 0 1 0
4 0 0 0 1
Driving Stepper motor
Half step 8-step sequence Step Sequence





CLOCKWISE STEP WINDING
A
WINDING
B
WINDING
C
WINDING
D
COUNTER
CLOCKWISE
1 1 0 0 0
2 1 1 0 0
3 0 1 0 0
4 0 1 1 0
5 0 0 1 0
6 0 0 1 1
7 0 0 0 1
8 1 0 0 1
Working model
Interfacing Circuit
ULN2803
Stepper Motor Program

Assuming two stepper motors are interfaced to 8051 with ULN2803 drivers.
Program for normal 4-step sequence ( clock wise )
ORG 0H
BACK: MOV A,#0CCH
MOV P1,A
ACALL DELAY DELAY:
MOV A,#66H MOV R0,#0FFH
MOV P1,A LOOP2: MOV R1,#80H
ACALL DELAY LOOP1: DJNZ R1,LOOP1
MOV A,#33H DJNZ R0,LOOP2
MOV P1,A RET
ACALL DELAY
MOV A,#99H
MOV P1,A
ACALL DELAY
SJMP BACK
END

Stepper Motor Program

Assuming two stepper motors are interfaced to 8051 with ULN2803 drivers.
Program for wave drive 4-step sequence ( clock wise )
ORG 0H
BACK: MOV A,#88H
MOV P1,A
ACALL DELAY DELAY:
MOV A,#44H MOV R0,#0FFH
MOV P1,A LOOP2: MOV R1,#80H
ACALL DELAY LOOP1: DJNZ R1,LOOP1
MOV A,#22H DJNZ R0,LOOP2
MOV P1,A RET
ACALL DELAY
MOV A,#11H
MOV P1,A
ACALL DELAY
SJMP BACK
END

Stepper Motor Program

Assuming two stepper motors are interfaced to 8051 with ULN2803 drivers.
Program for half step 8-step sequence ( clock wise )
ORG 0H
BACK: MOV A,#88H MOV A,#22H
MOV P1,A MOV P1,A
ACALL DELAY ACALL DELAY DELAY:
MOV A,#0CCH MOV A,#33H MOV R0,#0FFH
MOV P1,A MOV P1,A LOOP2: MOV R1,#80H
ACALL DELAY ACALL DELAY LOOP1: DJNZ R1,LOOP1
MOV A,#44H MOV A,#11H DJNZ R0,LOOP2
MOV P1,A MOV P1,A RET
ACALL DELAY ACALL DELAY
MOV A,#66H MOV A,#99H
MOV P1,A MOV P1,A
ACALL DELAY ACALL DELAY
SJMP BACK
END



KEYBOARD INTERFACING
Keyboard Program
ADC(0804) INTERFACING


ADCs( Analog-t0o-Digital Converters) are among the most widely used
devices for data acquisition.
A Physical quantity, like temperature, pressure, humidity, and
velocity, etc., is converted to electrical ( Voltage , current)
signals using a device called a transducer or sensor.

We need ADCs to translate the analog signals to digital numbers, so
that the microprocessor/microcontroller can read the data for further
implement.

ADC 0804
Important Points on ADC 0804
1. V
cc
It works with +5 volts and has a resolution of 8 bits.
2. Conversion time is another major factor in judging an ADC.
a. Conversion time is defined as the time it takes the ADC to
convert the analog input to a digital (Binary) number.
b. In ADC804 conversion time varies depending on the
clocking signals applied to CLK R and CLK IN pins, but it
cannot be faster than 110 s
3. CLK IN and CLK R
a. CLK IN is an input pin connected to an external clock source
b. To use the internal clock generator (also called self-
clocking), CLK IN and CLK R pins are connected to a
capacitor and a resistor, and the clock frequency is
determined by


Typical values are R = 10K ohms and C = 150 pF.
We get f = 606 kHz and the conversion time is 110 s.
4. V
Ref
/2: It is used for the reference voltage
If this pin is open (not connected), the analog input voltage is in
the range of 0 to 5 volts (the same as the Vcc pin)
If the analog input range needs to be 0 to 4 volts, V
Ref
/2 is
connected to 2 volts

5. Analog ground and digital ground
Analog ground is connected to the ground of the analog Vin.
Digital ground is connected to the ground of the Vcc pin.

6. CS( Chip Select)
Chip select is an active low input used to activate the ADC0804 chip.

7. RD(Read)
This is an input signal and is active low. The ADC converts the analog
input to its binary equivalent and holds it in an internal register. RD is
used to get the converted data out of the ADC0804 chip. When CS=0,
if a high-to-low pulse is applied to the RD pin, the 8-bit digital output
can be read from D0-D7. The RD pin is also referred to as Output
Enable(OE).


8. WR( Write , a better name might be start of Conversion
This is an active low input used to inform the ADC0804 to start the
conversion process. If CS=0, when WR makes a low-to-high transition,
the ADC0804 starts converting the analog input value of V
in
to an 8-
bit digital number


9. INTR( Interrupt, a better name might be End of Conversion
This is an output pin and is active low. It is normally high pin and
when the conversion is completed, it goes low to signal the CPU that
the converted data is ready to be picked up. After INTR goes low, we
make CS=0 and send a high- to- low pulse to the RD pin to get the
next analog data to be converted.
Timing diagram of ADC 0804
Interfacing circuit of ADC0804
Program for ADC0804

RD BIT P2.5
WR BIT P2.6
INTR BIT P2.7
MYDATA EQU P1
MOV P1,#0FFH
SETB INTR
CLR WR
SETB WR
HERE: JB INTR, HERE
CLR RD
MOV A,MYDATA
ACALL CONVERSION
ACALL DATA_DISPLAY
SETB RD
SJMP BACK

DAC(0808) INTERFACING
Interfacing Circuit of DAC 0808

Specifications related to DAC

1. Resolution: It can be defined as a smallest change in the output
corresponding to an input change by one LSB.

2. Accuracy: This is the measure of the difference between the
actual output voltage & the expected output voltage.

3. Full scale output voltage: This is the output voltage when binary
input has the highest value. For ex: 8-bit 5V DAC have max
voltage 5V-19.5mv= 4.9805V.

Generating Staircase waveform
ORG 0H
START: CLR A
AGAIN: MOV P1,A ;Send data to DAC
INC A ;count from 0h to FFh
ACALL DELAY ;Let DAC recover
CJNE A,#0FFH,GO
SJMP START
GO: SJMP AGAIN

DELAY: MOV R0,#0FFH
LOOP: DJNZ R0,LOOP
RET
END
Generating Triangular waveform
ORG 0H
START0to1: CLR A
AGAIN1: MOV P1,A ;Send data to DAC
INC A ;count from 0h to FFh
ACALL DELAY ;Let DAC recover
CJNE A,#0FFH,GO1
SJMP START1to0
GO1: SJMP AGAIN1
START1to0: MOV P1,A
DEC A
ACALL DELAY
CJNE A,#00H,GO2 DELAY: MOV R0,#0FFH
SJMP START0to1 LOOP: DJNZ R0,LOOP
GO2: SJMP START1to0 RET
END
Generating Sine waveform
To generate a sine wave , we first need a table whose values
represent the magnitude of the sine of angles between 0
0 &
360
0



The values for the sine function vary from -1.0 to +1.0 for 0
0 &
360
0

angles. Therefore, the table values are integer numbers
representing the voltage magnitude for the sine of theta (). To
generate sine wave we assume the full scale voltage of 10V for DAC
output. Full scale output of the DAC is achieved when all the data
inputs of the DAC are high. Therefore, to achieve the full scale 10V
output, we use the following equation.

V
Out
= 5V + ( 5 X Sin )
Example
Program
ORG 0H
MOV DPTR,#TABLE
MOV R2,#COUNT
BACK: CLR A
MOVC A,@A+DPTR
MOV P1,A
INC DPTR
DJNZ R2,BACK
SJMP AGAIN

ORG 0300H
TABLE: DB 128,192,238,255,238,192,128,64,17,0,17,64,128


Representation of Sine waveform
Volts




10
9
8
7
6
5
4
3
2
1
0 30 60 90 120 150 180 210 240 270 300 330 360

Degrees
74LS373
D
74LS373
ALE
P0.0
P0.7
PSEN
A0
A7
D0
D7
P2.0
P2.7
A8
A15
OE
OC
EA
G
8051
ROM
Reading ROM (1/2)

D
74LS373
ALE
P0.0
P0.7
PSEN
A0
A7
D0
D7
P2.0
P2.7
A8
A12
OE
OC
EA
G
8051
ROM
2. 74373 latches the
address and send to
ROM
1. Send address to
ROM
Address
Reading ROM (2/2)

D
74LS373
ALE
P0.0
P0.7
PSEN
A0
A7
D0
D7
P2.0
P2.7
A8
A12
OE
OC
EA
G
8051
ROM
3. ROM sends the data to Controller
Address
2. 74373 latches the
address and send to
ROM
















What is software?

Software is nothing but set of programs. There are different languages for
writing the program.

Software Languages used:
1.Assembly
2.Embedded C
3.Dynamic C

Compilers used:
1.Kiel -vision.
2.RIDE
3.SDCC
4.AVR Studio
5.GCC




1.CPU with the peripherals is called hardware

2.CPU is nothing but micro controller

3.In micro processor CPU is connected to some peripherals.In micro
controller CPU,ROM,RAM,timers, I/0 ports,serial port,interrupts all
are chip in itself.
4.Combination of some peripherals is called interfacing unit or
hardware.
Examples of peripherals:LCD,keypad,ADC, DAC,max232,GSM
modem,micro
ontrollers,RS232cable,resistors,capacitors,switches,relays, etc

What is hardware?