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A Novel Temperature Stable Current Mode Bandgap

For Wide Range of Supply Voltage Variation

Sovan Ghosh
Department of Electrical Engineering, IIT Madras

Voltage Reference
Analog circuits incorporate the voltage and current
references extensively . Such references are dc quantity that
exhibit A minimum dependence on the supply and process
parameters.
It has a well defined dependence on the temperature
(PTAT, constant Gm, or Temperature Independent)
We will analyze the operation of a temperature independent
voltage reference.

BANDGAP REFERENCE
One representative reference satisfying these key
parameters is the bandgap voltage reference.
The bandgap output voltage is realized by adding
a voltage that is complementary-to-absolutetemperature (CTAT) to another voltage which is
proportional-to-absolute-temperature (PTAT) to
yield a first-order temperature-compensated
voltage.

First Order Bandgap Circuit

Now if we assume that the Op-Amp
is working perfectly in its negative
feedback configuration then current
I2 is given by
I2=(VBE1-VBE2)/R3
VBE1=VT ln (I1/I0)
VBE2=VT ln (I2/NI0)
V1=V2
I1R1=I2R2
I2=(VBE1-VBE2)/R3=VT ln (R2*N/R1)/R3

Fig: Variation Of Output voltage of a first order Bandgap with temperature.

Several solutions to improve the temperature behavior exist. But They require
precision matching of current mirrors or a pre-regulated supply voltage and
Sometime special process also.

.

This method uses a reverse

bandgap voltage principle.
to a scaled VT voltage, voltagemode references add a VT
voltage to an attenuated VBE
voltage.
Main draw back of this
implementation is that it need
special process (Twin
Well/BICMOS) to get high
quality BJT.
It needs separate bias current.

Drawbacks
Transistors Q1 and Q2 are fabricated in low voltage twin well
process. Figure below shows a Low voltage twin-well CMOS
process.

Prev. Slide Continued.

When the NPN device is fabricated, a parasitic PNP device is
formed from the base and collector of the NPN to the p-type
substrate. When the NPN device is saturated, the parasitic PNP
device begins operating in the forward-active region since the
emitter-base voltage (VEB) of the PNP is equal to VBC of the NPN.
This means we cant neglect the base current anymore and a
small change in VCE1 will change the IB1 significantly.
Twin Well or BICMOS processes are costlier.
Another disadvantage is that the circuit requires a separate bias
current source for proper operation instead of using a feedback
system to control the current of the reference core. The use of a
separate current source causes the currents inside the natural
logarithm to rely on temperature-dependent parameters instead
of ratios of resistors as or ratios of transistor sizes . Hence, it
complicates the calculation of the scale factor. This current

Current Mode Reference(CMR)

Though it has high flat band
and 1/f output noise problem
due to pMOS current mirror.

But this types of reference can

operate in low supply voltage
and can be port to different
process.
Minimum Supply Voltage is
limited by the common mode
of the amplifier.
Fig: Conventional Low Voltage CMR

Detail Analysis Of the New Current Mode

Reference

Circuit Diagram
Amplifier/Op-Amp Architecture
Operational Details
Performance Result
Comparative Analysis

Circuit Diagram

Fig: Circuit Diagram of The Proposed Bandgap Reference.

Analysis
Vout1 = Ic*Rout1
=(Iptat1+Ictat1)*Rout1
=1*(Veb1-Veb2)+1*Veb1
+*(ib1*R_COMPENSATE)
The first term describe a PTAT voltage.
The Second term of the equation
describes a negative temperature
coefficient voltage along with a small
nonlinear dependency on temperature.
Now third term shows the following
characteristics with temperature.
As third term decreases slowly at higher
temperature so it can be used to
compensate higher reduction rate of 2nd
term (VEB) at high temperature.

Fig: Temperature characteristics

of third term

Amplifier Circuit

Amplifier/Op-Amp Circuit

Bias_genarator for the amplifier

Analysis

Both the nMOS and pMOS input pair of the amplifier is biased at sub
threshold region of operation. The biasing circuit ensured that tail current of
nMOS input pair Intail = Ibias - Iptail irrespective of supply and common mode
voltage. So Iptail + Intail is also constant. Now the DC gain of the amplifier is
given by Gm*R where Gm is input effective trans conductance of the
amplifiers input pairs and R is the impedance seen by looking into the
circuit from node PBIAS. Now R can be approximately written 1/(*IMp7)
where is a process dependent constant and IMp7 is the source to drain
current of Mp7 . As Intail + Iptail is constant and Inbias is constant so the biasing
current of the output transistor IMp7 is also constant; i.e. R is constant. Now
the Gm is given by gmn+gmp where gmn is nMOS input pairs trans
conductance and gmp is pMOS input pairs trans conductance. Now
gmp=(iptail/2)/Vt and gmn= (intail/2)/Vt. Where iptail and intail are biasing current as
shown in fig. 5 and Vt is thermal voltage. So Gm = gmn+gmp = ibias/(2*Vt)
which is independent of supply and common mode voltage.

Amplifier's DC Gain in dB

For 220 nM
For 180 nM

83
82
81
80
79
78
77
76
75
74
73
72
71
70
69
68
67
0.4

0.6

0.8

1.0

1.2

1.4

Fig: Variation of Amplifier gain with input Common Mode Voltage

Performance Of the BG
0.71680
A- For 180 nm
B- For 220 nm

0.71675
0.71670

0.71665
0.71660
B

0.71655
0.71650
0.71645
0.71640
-60

-40

-20

20

40

60

80

100

120

140

Temperature ( C)

Fig: Variation of Bandgap Output Voltage with Temperature

Continued.
D-Supply Voltage
C-Bandgap output for 180 nm
B-Bandgap Output for 220 nm

3.25
3.00
2.75
2.50
2.25

Amplitude(V)

2.00
1.75
1.50

0.7169
0.7168
0.7167

0.7166
0.7165
0.7164
0.000

0.005

0.010

0.015

0.020

Time (s)

Continued.
-10
For 220 nm
For 180 nm

-20
-30

PSRR (dB)

-40
-50
-60
-70
-80
-90
10

10

10

10

10

10

10

10

10

10

Frequency (Hz)

Fig: Variation of PSRR of proposed Bandgap with frequency.

Comparative Analysis
Parameters









This work

1.2

2.5

1.5 / 3

25

40

23

38

11.2

.487

1.14

.617

.716

3.68

8.9

5.3

2.7

-40C to
150C

-40C to
110C

Line Regulation (%
/V)

.24

0C
to
100C
.286

3.9
to
13.7
-50C to
150C

CMOS
Technology (m)

0.35

0.5

0.6

Supply
Voltage (V)
Supply Current (A)
Ref.
Voltage (V)
Temp.
Coefficient
(ppm/C)
Temperature
Range

.039

-55C
to
125C
.028

0.35

0.22 / 0.18

References

Question