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EE603 CMOS IC DESIGN

TOPIC 1
Introduction to Integrated
Circuit

Faizah Bt. Amir1

Introduction to Integrated Circuit


Lesson Learning Outcome :
At the end of this session, you should be able to:
explain the historical perspective of integrated circuit
explain the issues in digital IC design
explain the quality design metrics of a digital design

Introduction to Integrated Circuit


What is an Integrated Circuit ?
A complex set of tiny components and their
interconnections that are imprinted onto a tiny
slice of semiconductor material (e.g silicon).
Integrated circuits are usually called ICs or chips.

Introduction to Integrated Circuit


Different Types of IC Packages

Introduction to Integrated Circuit


Evolution of logic complexity in IC
Year

Technology

No. of
transistors

Example

1947-1950

Transistor

1951 -1960

Discrete Component

FET, Diode

1961 -1966

SSI
- Small scale integration

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Logic Gates, Flip-flop

1967-1971

MSI
- Medium scale integration

100 1000

Counter, Multiplexer

1972-1980

LSI
- Large scale integration

1000 20,000

1981 -1990

VLSI
- Very large scale integration

20,000
1,000,000

1990-2000

ULSI
- Ultra large scale integration

1,000,000
10,000,000

2000 nowadays

GSI
- Giga scale integration

> 10,000,000

RAM, Microprocessor
16 bits and 32 bits
Microprocessor
Graphic microprocessor
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Transistor Revolution
First Transistor Bardeen et.al.(Bell Labs)
in 1947
First Bipolar transistor Shockley in 1949
First monolithic IC Jack Kilby in 1958
First commercial IC logic gates Fairchild
1960

Transistor Revolution
Dr. John Bardeen, Dr. Walter Brattain, and Dr. William
Shockley discovered the transistor effect and developed the
first device in December, 1947. They were members of the
technical staff at Bell Laboratories in Murray Hill, NJ. They
were awarded the Nobel Prize in physics in 1956.

John Bardeen, William Shockley and Walter Brattain


at Bell Labs, 1948.

1947 First BJT


Bardeen, Shockley, Brattain
(Bell Labs)
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Transistor Revolution
William Shockley developed the theory for the
junction transistor in 1948 at Bell Labs.
He left for Caltech in 1953 and founded Shockley
Semiconductor in 1956 and starting Silicon Valley
in Mountain View, California.

Transistor Revolution
Jack Kilby completed his first integrated circuit on
September 12, 1958 which was actually constructed
on germanium rather than silicon, as he could not find
a suitable piece of silicon at the time.
The integrated circuit was fully functional, and Texas
Instrument officially announced it in January 1959.

1958: The Integrated Circuit was invented by Jack Kilby

Transistor Revolution
In August 1959 Fairchild Semiconductor begin the
development of an integrated circuit.

Fairchild presented advanced information at


engineering conferences and provided prototype
samples to customers in 1960.

1962 Fairchild IC

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MOSFET TECHNOLOGY
MOSFET transistor was first proposed and patented by Lilienfeld
(Canada) in 1925 and Heil (England) in 1935.
The devices was not successfully demonstrated for several years
but only became important in mid and late 1960s.
Initially semiconductor research had focussed in developing the
bipolar transistor, because they have problems in fabricating
MOSFETs, particularly with the insulating oxide layers.
Now the technology is one of the most widely used
semiconductor techniques and become one of the principle
elements in integrated circuit technology today.
Their performance has enabled power consumptions in ICs to be
reduced and enabled the portable gadgets to become a reality.
As a result of this the MOSFET is the most widely used form of
transistor in existence today.
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Moores Law
In 1965, Gordon Moore (Co-Founder of
Intel) predicted that the number of
transistors per chip will grow exponentially
with time.
He predicted that :
the transistor density will double
every 18-24 months
the chip performance will double
every 18-24 months

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Moores Law

1965: Cost vs time

Moores law 1960-1975

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Moores Law

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Evolution in DRAM Chip Capacity

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Die Size Growth

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Power Density

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Issues in Digital IC Design

Functionality
Cost

Time to market
Design Complexity

Reliability, Robustness

High Levels of
Abstraction

Performance

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QUALITY DESIGN METRICS IN DIGITAL DESIGN

Functionality
Cost
NRE (fixed) costs - design effort
RE (variable) costs - cost of parts, assembly, test
Reliability, robustness
Noise margins
Noise immunity
Performance
Speed (delay)
Power consumption; energy
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NRE (non-recurring engineering) costs


Fixed cost to produce the design
design effort
design verification effort
mask generation

Influenced by the design complexity and designer


productivity
More pronounced for small volume products

Recurring costs proportional to product volume


Silicon processing
also proportional to chip area

Assembly (packaging)
Test

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Prime requirement
IC performs the function it is designed for
Normal behaviour deviates due to
variations in the manufacturing process (dimensions and
device parameters vary between runs and even on a
single wafer or die)
presence of disturbing on- or off-chip noise sources

Noise: Unwanted variation of voltages or


currents at the logic nodes

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from two wires placed side by side


inductive coupling
current change on one wire can
influence signal on the neighbouring
wire
capacitive coupling
voltage change on one wire can
influence signal on the neighbouring
wire
cross talk

from noise on the power


and ground supply rails
can influence signal
levels in the gate

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in

out

VOH , VIH - nominal high


voltage
VOL, VIL - nominal low
voltage
VM gate or switching
threshold voltage
VM can be found graphically
at the intersection of the
VTC curve and the line
given by Vout = Vin.

IL

IH

The gate threshold voltage


presents the midpoint of the
switching characteristics.

Inverter Voltage Transfer Characteristic


(VTC)

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The regions of acceptable high and low voltages are


delimited by VIH and VIL that represent the points on the
VTC curve where the gain = -1 or dVout/dVin = -1

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Noise Margins is a measure of the


sensitivity of a gate to noise.
Noise margins represent the levels of
noise that can be sustained when gates
are cascaded.

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For robust circuits, we want the 0 and


1 intervals to be as large as possible.

Large noise margins are desirable.


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A gate with regenerative property ensure that a


disturbed signal converges back to a nominal voltage
level.
v0

v1

v2

v3

v4

v5

v6

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The signal voltage gradually


converges to the nominal signal
after a number of inverter stages,
as indicated by the arrows.

The signal does not converge to


any of the nominal voltage levels
but to an intermediate voltage
level. Hence, the characteristic is
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nonregenerative.

Noise margin expresses the ability of a circuit to


overpower a noise source.
noise sources: supply noise, cross talk, interference,
offset.

Noise immunity, on the other hand, expresses the


ability of the system to process and transmit information
correctly in the presence of noise.
Noise immunity is the ability of a circuit to reject a
noise source rather than overpower it.

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A gate must be unidirectional: changes in an output


level should not appear at any unchanging input of the
same circuit.
In real circuits full directivity is an illusion (e.g., due to capacitive
coupling between inputs and outputs).

Key metrics: output impedance of the driver and


input impedance of the receiver.
ideally, the output impedance of the driver should be zero.
input impedance of the receiver should be infinity.

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Fan-out number of load gates


connected to the output of the
driving gate.
o gates with large fan-out are slower

Fan-in the number of inputs to


the gate.
o gates with large fan-in are bigger
and slower

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The ideal gate should have:


infinite gain in the transition region
a gate threshold located in the middle of the logic swing
high and low noise margins equal to half the swing
input and output impedances of infinity and zero, respectively.

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Performance

The performance of a digital circuit is


expressed by the propagation delay and
the power consumption of a gate.

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The propagation delay, tp of a gate defines


how quickly it responds to a change at its
input(s).
It expresses the delay experienced by a
signal when passing through a gate.
It is measured between the
50% transition points of the
input and output waveforms.

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Power consumption: how much energy is consumed


per operation and how much heat the circuit dissipates.
supply line sizing (determined by peak power)
Ppeak = Vdd ipeak
battery lifetime (determined by average power dissipation)
p(t) = v(t)i(t) = Vddi(t)
Pavg= 1/T p(t) dt = Vdd/T idd(t) dt
packaging and cooling requirements

Two important components: static and dynamic

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Propagation delay and the power consumption of a


gate are related when a gate operates at high
speed, it will consume more power.
speed , propagation delay , power consumption
Propagation delay is (mostly) determined by the
speed at which a given amount of energy can be
stored on the gate capacitors.
the faster the energy transfer (higher power dissipation) the
faster the gate.

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Digital integrated circuits have come a long


way and still have quite some potential left for
the coming decades.

A lot of issues and challenges in digital


integrated circuit design and the potential
solutions are needed in order to survive in the
industry.
Design metrics is used to evaluate the quality
of a design: cost, functionality, robustness,
performance and energy/power dissipation.
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