Vit Ting Anh Hc Thut

T chc lp vit bo khoa hc K thut ng trn tp ch

quc t (8)
(Electrical Engineering, Industrial Engineering, Information Engineering)

Kha Thi c
i hc Y Dc TP H Ch Minh Gim c trung tm vit bo khoa hc bng ting Anh

http://www.chineseowl.idv.tw

Tiu s c nhn
Kha Thi c (Ted Knoy) dy vit ting Anh k
thut trong cc trng i hc i Loan hn hai
mi nm. ng l tc gi ca mi bn cun sch
v vit ting Anh k thut v chuyn nghip. ng
thnh lp mt trung tm vit ting Anh ti trng i
hc Y Yunpei ng thi cng l ging vin ton thi
gian ti trng. ng chnh sa trn 55,000 bi
vit cho vic ng bo nghin cu khoa hc t nm
1989. ng l cng nh bin tp ting anh cho mt s
tp ch v khoa hc, k thut v y hc ca i Loan.

A. Nn tng (Background)
Thit lp cc xut nghin cu (Setting of research proposal): M
t mt xu hng ph bin, pht trin hoc hin tng trong lnh vc ca
bn ngi c c th hiu c bi cnh m bn xut nghin cu
ang c thc hin .
Vn nghin cu (Research problem) : M t cc hn ch chnh
hoc tht bi ca cc nghin cu trc y hoc cc phng php
nghin cu khi gii quyt cc xu hng, pht trin hoc hin tng
nu .
c im k thut nh lng ca vn nghin cu (Quantitative
specification of research problem): nh lng hoc a ra mt v d
v vn nghin cu c trch dn trong ti liu tham kho trc .
Tm quan trng ca vn nghin cu (Importance of research
problem) : M t cc hu qu v mt l thuyt v thc t nu khng gii
quyt vn nghin cu.

B. Thc hin (Action)

Mc tiu nghin cu (Research objective) : M t mc tiu ca nghin
cu xut ca bn v bao gm cc c im chnh ring bit ca
nghin cu t c mc tiu nghin cu , iu m khng c
thc hin trong nghin cu trc y ( mt cu )
Phng php t c mc tiu nghin cu (Methodology to
achieve research objective) : M t ba hoc bn bc chnh t
c mc tiu nghin cu ca bn .
Kt qu d kin ( Anticipated results) : M t cc kt qu nh lng
m bn hy vng s t c trong nghin cu ca bn.
ng gp trong lnh vc l thuyt v thc tin (Theoretical and
practical contribution to field) : M t cch thc phng php hoc kt
qu nghin cu xut ca bn s ng gp v mt l thuyt trong lnh
vc nghin cu, quy lut v cng ng gp thit thc trong sn xut,
ngnh cng nghip dch v.

V d 1: Electrical Engineering
Thit lp cc xut nghin cu Wireless sensor networks (WSNs)
have been extensively studied owing to the potential applications such as
in military surveillance, elderly health care and house security. WSN
devices largely operate under resource-limited conditions. Computing
capability, energy, and communication bandwidth are the most precious
resources.
Vn nghin cu However, a secure and energy-aware communication
protocol on WSN is still unavailable for practical applications.
c im k thut nh lng ca vn nghin cu Although the SMAC protocol developed by We Ye et al. presents an example of specific
research interests, the protocol addresses only energy conservation and
self-configuration-related issues.
Tm quan trng ca vn nghin cu Applying the S-MAC protocol to
conjugate with other security protocols increases the connection delay of
WSN by roughly 30-50%, making it impossible to establish a reliable and
efficient WSN.

V d 1 (cont.)
Mc tiu nghin cu Based on the above, we should develop a
novel security protocol, capable of cooperating efficiently with other
energy-conserving communication protocols.
Phng php t c mc tiu nghin cu To do so, a
complex WSN can be constructed to function as the operating
platform. Next, the performance of three communication protocols
can be evaluated when operating with several security protocols,
including the proposed one. Moreover, the drained energy and
timing cost can be compared statistically to yield the simulation
results.
Kt qu d kin As anticipated, the power consumption does not
increase, and the overhead on connection delay is under 20%.
ng gp trong lnh vc l thuyt v thc tin Importantly, the
proposed protocol can be adopted to establish the foundation of
energy-efficient and dependable WSNs.

V d 2: Industrial Engineering
Thit lp cc xut nghin cu Time-to-market delivery in
semiconductor manufacturing is of priority concern in advanced R&D
technology development. Ensuring that products reach time-to-market
delivery goals requires that operational managers and fabrication (fab)
personnel fully support R&D experimental lots (R&D Lot).
Nevertheless, capacity shortage in a wafer fab fails to comply with
output requirements of customers, leading to delays in the R&D lot
schedule and the overall project.
Vn nghin cu Although an output-driven fab normally adopts
Move and Turn Rates as key performance indicators (KPI), such
indicators fail to assess the actual performance of R&D lots in
monitoring R&D experiments and ensuring (exact OR prompt)
experimental delivery. Fab managers are also interested in the overall
R&D cycle time instead of local move (NOTE: movement?) and turn
rate indices, subsequently creating a conflict among indices between
R&D and fab operations.

V d 2 (cont.)
c im k thut nh lng ca vn nghin cu
For instance, the error rate exceeds 25% when using the
conventional method of T/R or Cycle time per mask layer
(days). Although managers are also concerned with
solutions, the long cycle time of a R&D lot creates vague
responsibilities the wafer fab and R&D, necessitating the
development of a feasible cycle time model.
Tm quan trng ca vn nghin cu As for the total
cycle time of a R&D Lot, TCTRD, consists of fab-run RD lot
time (TCTFab) and R&D development handling time
(HT_RD). Restated, TCTRD= TCTFab + HT_RD. Vague
responsibilities and inadequate indices may delay the lot
schedule and impede time-to-market delivery of advanced
technology products.

V d 2 (cont.)
Mc tiu nghin cu Based on the above, in addition to constructing
an effective performance index, we should develop an optimal R&D Lot
cycle time reduction model capable of executing timely, effective and
clearly defined measures to achieve project cycle time, regardless of
whether in R&D or in a wafer fab.
Phng php t c mc tiu nghin cu To do so, Xfactors can be modified to determine the R&D cycle time and derive the
F-factor. Based on the two factors, a model can then be constructed to
shorten technology development time, and continuously improve
quality control by using the SPC chart as a monitoring mechanism.
Next, the X-factor (XFab), excluding R&D handling time (HT_RD), can
be used to determine the on-time delivery performance of a wafer fab
for an advanced R&D technology. Additionally, the F-factor can be
used to monitor the maturation process of advanced R&D technology
manufacturing and reduce lot inventory costs.

V d 2 (cont.)
Kt qu d kin As anticipated, the proposed
performance indices can be used to accurately forecast the
R&D lot schedule, shorten lot cycle time and ensure timeto-market delivery of advanced technology products. KPI
design provides global optimization benefits that link R&D
and the wafer fab.
ng gp trong lnh vc l thuyt v thc tin The
proposed performance index can ultimately shorten R&D
cycle time and enhance the on-time delivery of advanced
technology products by fab-run R&D Lots. Given R&D
technology trends to enhance product quality and
manufacturing maturity through KPI design, enterprises can
exploit these factors to upgrade operational performance in
semiconductor manufacturing.

V d 3: Electrical Engineering
Thit lp cc xut nghin cu Computer architectures simplify
complex arithmetic operations using a float-point process unit (FPU).
Vn nghin cu While many FPUs adopt a divider to achieve highspeed arithmetic operations, conventional dividers expend numerous
basic arithmetic operations, including addition, subtraction and
generation of a quotient. The execution time and power dissipation of a
divider positively correlate with the number of basic operations,
explaining why this divider consumes much time and power.
c im k thut nh lng ca vn nghin cu For instance,
a conventional divider requires m/2 additions, m subtractions and m
shifts to produce the m-bit quotient. The time-consuming feature limits
clock speed of the embedded divider.
Tm quan trng ca vn nghin cu Portable devices have
difficulty in using the conventional divider owing to high-power
dissipation, necessitating the development of a high-speed and lowpower divider.

V d 3 (cont.)
Mc tiu nghin cu Based on the above, we should develop a highspeed and low-power divider.
Phng php t c mc tiu nghin cu To do so, the
iterations of generating a quotient can be significantly reduced by a
high-radix arithmetic system. The operations of addition can then be
eliminated with a non-restoring algorithm. Next, the power dissipation
can be diminished via a domino logic circuit.
Kt qu d kin As anticipated, the proposed divider using a highradix arithmetic system and a non-restoring algorithm is 35% faster
than conventional dividers. Moreover, the divider based on a domino
logic circuit can decrease power dissipation by 15%.
ng gp trong lnh vc l thuyt v thc tin Furthermore, in
addition to providing further insight into developing a high-speed and
low-power divider, the proposed scheme can be easily implemented in
portable devices owing to its low-power consumption.

V d 4: Information Engineering
Thit lp cc xut nghin cu Wireless communications is increasingly
popular, especially in mobile phone and USB dongle card applications. The
antenna of these devices is arranged on the edge of a ground plane in a
wireless system, making the antenna radiation patterns asymmetrical and the
peak radiation power moving towards the system ground. For instance, in
mobile phones, the human hand absorbs peak radiation power, subsequently
degrading communication quality and shortening the range of communication.
Vn nghin cu However, an increased power consumption reduces
usable time of mobile phones. For wireless devices, the peak radiation power
is located at *** and the antenna gain at *** plane is lower than O dBi.
c im k thut nh lng ca vn nghin cu Additionally,
radiation power of 50% in a human hand makes the communication distance
only half that of the theoretical value, which is estimated in free space.
Tm quan trng ca vn nghin cu Asymmetrical characteristics of the
patterns consume an excessive amount of power, thus degrading the
performance of wireless communications.

V d 4 (cont.)
Mc tiu nghin cu Based on the above, we should develop
a control technology method for radiation patterns.
Phng php t c mc tiu nghin cu To do so,
the pattern direction can be adjusted using an additional metal
reflector from conventional patterns. However, this method
increases the system size, which is inappropriate for portable
device applications. Asymmetry of the antenna radiation
patterns originates from various current distributions on the
system ground plane and the antenna. Thus, cancelling the
ground plane current can avert destructive interference in the far
field. Next, out of phase ground plane current can be changed
to be in the phase current to produce interference in the far field.
Additionally, RF clock can be placed into the system to filter out
the phase current. Moreover, contracting the ground plane size
can be adopted to avoid an unnecessary ground current.

V d 4 (cont.)
Kt qu d kin As anticipated, the proposed
method can alter the location of the peak radiation
power from *** to ***. Meanwhile, the antenna
gain at *** can reach 0.5 dBi.
ng gp trong lnh vc l thuyt v thc tin
This modification can increase the communication
distance, lower power consumption, and enhance
communication quality.

Ti liu tham kho

Knoy, T (2002) Writing Effective Work
Proposals. Taipei: Yang Chih Publishing

Further details can be found at

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