SEMINAR PRESENTATION

PREPARED BY:

MOHIT KUMAR 85/EC/11

Balanced-Output-Signal Generator

AbstractA circuit for the generation of

amplitude-matched
balanced signals from a single-ended or differential
source is presented. The circuit is accurate,
wideband, and has a good phase performance
without matched amplifier poles. It is based on a
structure utilizing operational conveyors that
have a differential input, easily adjusted gain,
and voltage or current outputs.

INTRODUCTION
THE GENERATION of two 180 out-of-phase signals from
a sinusoidal input over a large frequency range is a circuit
function of considerable importance in areas such as synchronous
detection [1], lock-in-based systems [2], and balanced signal
transmission. One common approach to the realization of
such a circuit is the use of inverting and noninverting amplifiers
connected, as shown in Fig. 1. Golnabi and Ashrafi [3] have
discussed such a system and have described a technique for
enhancing its basic performance. It produced phase deviation
from 180 of about 6 at 1 MHz increasing to a maximum
of about 10 between 1 and 4 MHz. This was a significant
improvement over the conventional method. Unfortunately, the
approach requires the matching of amplifier poles and this is a
quite demanding requirement.

OTHER APPROACH
Signals,which are both amplitude matched and phase
balanced, are used extensively in the transmission of
analog signals over long lines in order to reject
undesirable common mode signals.
Baert [4] has described the circuit shown in Fig. 2, which
exhibits a characteristic close to this for the case where
the closed loop gains of the two amplifiers are equal to
one. However,
apart from the restricted gain, this circuit, like that in Fig. 1,
suffers from the disadvantage of requiring precise matching
of
the poles of the amplifiers if low error is to be achieved.

TWO CIRCUITS

MOTIVE
In this paper, we present a circuit that
accurately generates amplitudematched balanced signals from a singleended or differential source over a wide
frequency range without the need for
matched amplifier poles. The gain is
easily varied and the circuits differential
input enables it to be driven from a
floating source.

PROPOSED CIRCUIT

Differential-Input Mode

RESULTS
Let RL1 = RL2 . Then, at low frequencies, 180 and
|V |dB 1/2 0 dB. If C1~=C2 and CZ1~=CZ2 , then
for all frequencies = 180, and |V |dB 0 dB, i.e.,
the
phase and amplitude errors disappear. Vo1 and Vo2
therefore
become balanced amplitude-matched signals. While RL1
and
RL2 can be made equal by the use of high-tolerance
resistors,
C1, C2, and CZ1 , CZ2 are parasitic capacitors.

Single-Ended Input Mode

CIRCUIT TESTS

Resistors Rl1 and

Rl2 are 1.5k ohm
each and RG was
set at values of
220 ohm and 1 k
ohm.

Fig. shows phase

diff. error .

Amplitude Error Plot

Inferences

This performance upto to 1 MHz is

superior to the circuit performances of
Golnabi and Ashrafi, and Baert , with no
amplifier-pole matching as required in
these latter circuits and without any gain
restrictions as required in the circuit of
Baert.

CONCLUSION
The new circuit was tested in the single-ended input
mode but can also operate in a differential input mode where
the
phase performance is expected to be even better over a larger
frequency range. The system has three additional advantages:
1) the differential input allows it to be driven from a floating
source, 2) its gain can be varied and is easily done by adjusting
one resistor RG, and 3) it has the ability, if required, to provide
a current (rather than a voltage) output by removing the
buffers
B1 and B2 and the resistorsRL1 and RL2 and taking the outputs
directly from the high-impedance outputs of the OCs.

THANK
YOU!