Interrupts

Interrupt is a process where an external device can get the

attention of the microprocessor.
The process starts from the I/O device
An interrupt is considered to be an emergency signal. The
Microprocessor should respond to it as soon as possible.
When the Microprocessor receives an interrupt signal it complete
the currently executing
instruction & store the content of program counter (address of
next instruction to be fetched) onto stack and jumps to an
Interrupt Service Routine(ISR) to respond to the incoming
interrupt.
.

After interrupt request accepted processor generate INTA

(interrupt Acknowledge)
Each interrupt have its own ISR.
Interrupts can be classified into two types:
1. Hardware Interrupt: MPU pin used to receive interrupt
request
2. Software Interrupt: The cause of interrupt is an
execution of instruction.
When interrupt is active 8085 execute a CALL instruction
to predefined location

Hardware Interrupt
8085 have 5 hardware interrupt
TRAP RST 7.5 RST 6.5 RST 5.5 & INTR
Location from where subroutine is referred as Vector Location.--- Called Vectored
Interrupt
TRAP, RST7.5, RST 6.5 & RST5.5 are vectored interrupt. These interrupt transfer
program control to predetermined location
INTR is a non-vectored interrupt, it requires external hardware for subroutine address.
Responding to Interrupts: Responding to an interrupt may be immediate or delayed
depending on whether the interrupt is maskable or non-maskable
TRAP has highest priority, Non maskable interrupt
INTR has lowest priority
TRAP is Level sensitive and edge sensitive
RST 7.5 +edge sensitive
RST 6.5, RST 5.5 & INTR are level sensitive

Vectored Interrupts
The addresses to which program
control goes:
Name

Vectored Address

RST 7.5

003C H (7.5 x 0008 H)

RST 6.5

0034 H (6.5 x 0008 H)

RST 5.5

002C H (5.5 x 0008 H)

TRAP

0024 H (4.5 x 0008 H)

Absolute address is calculated by

multiplying the RST value with 0008
H.
12-Dec-11

Gursharan Singh Maninder Kaur

Software Interrupt
8085 have 8 software interrupt. RST0 RST 7
Vector address calculated as
All interrupts are mapped onto a memory area
called the Interrupt Vector Table(IVT).
The purpose of the IVT is to hold the vectors that
redirect the microprocessor to the right place
when an interrupt arrives.
The IVT is divided into several blocks. Each block
is used by one of the interrupts to hold its
address.
The 8085 recognizes 8 RESTART
instructions:
RST0 -RST7.
Each of these RST would send the execution to a
memory location

Sequence for INTR

1)
2)
3)
4)

8085 checks the status of INTR during execution of each instruction

8085 complete current instruction and send INTA (interrupt acknowledge)
In response to INTA external logic place OPCODE on the data bus
8085 save the address of next instruction on the stack and execute received
instruction

Restart Instruction
The restart sequence is made up of three machine cycles
In the 1st machine cycle:
The microprocessor sends the INTA signal.
Program counter holds the address of next instruction to be store in stack, data
lines opcode of RST instruction receive from the interrupting device.
In the 2nd machine cycles:
High order address of program counter placed on (SP-1) address.
In the 3rd machine cycles:
Low order address of program counter placed on (SP-2) address.
Then the microprocessor jumps to the address associated with the specified RST
instruction

Set Interrupt Mask(SIM)

This instruction used to set/mask interrupt or send serial data.

It transfer content of accumulator to interrupt control logic
It is necessary to appropriate content before execution of SIM instruction

Bit 0 is the mas kfor RST 5.5 bit 1 is the mask for RST 6.5 and bit 2 is the mask for RST 7.5.
If the mask bit is 0 the interrupt is available.
If the mask bit is 1, the interrupt is masked.
Bit 3 (Mask Set Enable -MSE) is an enable for setting the mask.
If it is set to 0 the mask is ignored and the old settings remain.
If it is set to 1 the new setting are applied.
Bit 4 of the accumulator in the SIM instruction allows explicitly resetting the RST 7.5 memory
even if the microprocessor did not respond to it.
Bit 5 is not used by the SIM instruction
Bit 6 is used to tell the microprocessor whether or not to perform serial data transmission
If 0 then do not perform serial data transmission
If 1 then not perform serial data transmission
The value to be sent out on SOD has to be placed in bit 7 of the accumulator

Example
Set the interrupt masks so that RST5.5 is enabled, RST6.5 is
masked and RST7.5 is enabled.
First determine the contents of the accumulator

Read Interrupt Mask(RIM)

Since the 8085 has five interrupt lines interrupts may occur during
an ISR and remain pending.
Using the RIM instruction the programmer can read the status of
the interrupt lines and find if there are any pending interrupts
-- RIM instruction allow the serial input data

Example
Set the mask to enable RST6.5 without modifying the masks for
RST5.5 and RST7.5.