DDR3-800-2133

Derating Theory & Application

WW14 10 Update

June 20th, 2011

Brian Moran

Table of Contents

Section 1: Setup and Hold Specifications ..

Page 3
Section 2: Derating and Derating Tables ...
Page 11
Section 3: Applying Derating ......
Page 31

Section 1:
Setup & Hold Specifications
(tIS/tIH and tDS/tDH)

Baseline tIS & tIH Specifications

The tables on the following pages define the

baseline tIS & tIH specifications, prior to derating, for
both Vref and AC/DC measurement methodologies.
In DDR3 timing analysis, the tIS(ac) & tIH(dc)
specifications are to be used. The specifications at
Vref are provided for reference only.
The tIS(ac) and tIH(dc) specifications have been precompensated from the baseline specs at Vref, by
subtracting the amount of flight time push-out or pull-in
which occurs with a 1V/ns reference waveform, vs the flight
time at Vref.
This pre-compensation is normalized for slew rates other
than 1V/ns through the derating process.

The AC/DC thresholds associated with each set of

baseline specs must be noted when choosing which
derating table to utilize.
4

Alternate Threshold Penalties

As an option for heavily loaded CMD/ADR

configurations, an alternate AC threshold may be
utilized in exchange for a timing penalty, as shown
in the specification tables.

This alternate AC threshold may produce better

overall timing margins in cases where slew rate is
very slow. However, use of the alternate threshold
will usually require a minimum of 2N CMD/ADR
timing, due to penalty.

tIS/tIH Baseline AC Specifications

tIS/tIH Baseline AC Specifications

Baseline tDS & tDH Specifications

The tables on the following pages define the baseline

tDS & tDH specifications, prior to derating, for both

Vref and AC/DC measurement methodologies.
In DDR3 timing analysis, the tDS(ac) & tDH(dc)
specifications are to be used. The specifications at
Vref are provided for reference only.

The tDS(ac) and tDH(dc) specifications have been precompensated from the baseline specs at Vref, by subtracting
the amount of flight time push-out or pull-in which occurs
with a 1V/ns reference waveform.
This pre-compensation is normalized for slew rates other than
1V/ns through the derating process.

The AC threshold associated with each set of baseline

specs must be noted when choosing which derating
table to utilize.
8

tDS/tDH Baseline AC Specifications

tDS/tDH Baseline AC Specifications

10

Section 5:
Derating and Derating Tables

11

Vref vs AC/DC Relative Timing

A key concept to grasp is that SDRAM setup and hold

timing is defined first at Vref, then translated to
AC/DC using a pre-compensation process, based on
a default 1V/ns slew rate assumption.

The published values for tIS(ac)/tIH(dc) and

tDS(ac)/tDH(dc) are valid only at the default slew
rate of 1V/ns. Their value at all other slew rates is
not defined until after pre-compensation as been
normalized, via de-rating.

Setup and hold timing at Vref is useful in

characterizing SDRAM timing, in that it produces a
fair calculation of the SDRAMs percent of U.I.
allocation, and is not subject to offsets due to
threshold level changes.
12

Definition & Purpose of Derating

The original purpose of derating, as first defined in

DDR2, was to provide a mechanism to adjust SDRAM
setup and hold times, based on the slew rate of the
incident waveform, or associated clock or strobe, to
account for degradation in timing which occurs at
slew rates less than 1V/ns.
This original derating applied only at slew rates below 1
V/ns, which is the slew rate of the tester stimulus.

The derating function has since been expanded to

also include a threshold compensation or
normalization function related to the implementation
of the AC/DC flight time measurement methodology.
This threshold compensation function will be discussed in
more detail in a subsequent section.

13

Primary vs Secondary Derating

The full JEDEC derating tables are indexed on two

axis. The vertical axis is defined as primary derating,

while the horizontal axis is defined as secondary
derating.
Primary derating is based on the SR of the incident
signal itself, whereas secondary derating is based on
the SR of the associated CLK or DQS.
Primary derating is the more complex, and is derived
as the sum of multiple components, which are
discussed in more detail on subsequent pages.
Secondary derating is independent of primary
derating, is equal to zero for CLK and DQS SR of
2V/ns and higher, and increases as differential SR
slows.
14

Primary Derating Concepts

There are two components of primary derating, which
are; receiver derating at Vref and threshold
compensation, as shown on the following page.

Primary Derating = Receiver Derating + Threshold Comp.

Example shown is for AC175/DC100.

Receiver derating at Vref accounts for the tendency of

receiver timing to degrade as incident SR decreases.

The receiver derating table is constant across all speed bins.

Threshold compensation varies with the threshold

level and is defined algebraically to normalize the precompensation applied to the AC timing specifications
at AC & DC.
Threshold Comp = Threshold (mV) Threshold (mV)/SR (v/ns)
The threshold compensation table varies with AC/DC
thresholds, and therefore, varies with speed bins.
15

Primary Derating Components

AC175/DC100

Receiver derating table is

constant for all speed bins.

Threshold compensation is
calculated based on
AC/DC thresholds.
16

Receiver Derating at Vref

This component of derating is the most straight

forward to understand and rationalize.

The SDRAMs timing is generally characterized on a

tester employing a 1 V/ns slew rate, therefore, all AC
timing parameters are guaranteed at 1V/ns and
above.

As incident slew rate drops below 1 V/ns, there is

timing degradation within the receiver circuits which
must be accounted for. This degradation increases
as slew rate decreases. The derating curves for
setup and hold have been derived and verified
empirically, as shown on the previous page.
17

Threshold Compensation

Threshold compensation is an outgrowth of the

transition from the Vref based timing methodology
used originally in DDR2, to the AC/DC methodology.
Measuring flight times to AC/DC thresholds results in
longer max flights and shorter min flights, relative to
flights measured at Vref.
See diagram on the following page.

To account for this, the tIS(ac)/tIH(dc) and

tDS(ac)/tDH(dc) specifications are pre-compensated,
based on a theoretical 1V/ns linear waveform.
These setup and hold specifications are only valid at 1 V/ns.

The threshold compensation component of derating

is calculated so as to normalize the precompensation, for slew rates other than 1V/ns.
18

Vref Timing vs AC/DC Timing

Pre-Compensation and Equivalency Rule:

Margins measured at Vref using tIS(vref) & tDH(vref), must
equal margins measured at AC/DC thresholds, using tIS(ac)
& tIH(dc), for a 1V/ns linear receiver incident waveform.
1V/ns
AC175
Vref
t=0
175ps

tIS(Vref) = 240 ps
tIS(ac) = 65 ps

tFlight(Vref)
tFlight(ac)

Rule: tFlight(Vref) + tIS(Vref) = tFlight(ac) + tIS(ac)

Same concept applies for tDS(ac) & tDH(dc)

19

Threshold Compensation (cont.)

An important concept to take away is that the

tIS(ac)/tIH(dc) and tDS(ac)/tDH(dc) specifications in
the JEDEC spec are only valid for a 1 V/ns incident
waveform, where they have been correctly precompensated.

For all other slew rates you must apply derating, in

order to normalize the pre-compensation, before the
specs can be used in timing calculations.

Several examples of how these normalization values

are calculated are provided on the following page.

20

Threshold Compensation Examples

Lets look at tIS(ac) at DDR3-1333, with an AC175

threshold.
The tIS(ac) spec has been pre-compensated by 175 ps,
based on a default 1 V/ns slew rate.
tIS(ac) = tIS(vref) 175 mV/1V/ns = tIS(vref) 175 ps
tIS(ac) = 240 ps 175 ps = 65 ps

If actual SR = 3V/ns
The tIS(ac) has been over-compensated.
Should have been 175 mV/3V/ns = 58 ps
Need to add 117 ps back to tIS(ac)
Threshold compensation at 3V/ns = 117 ps

If actual SR = 0.5V/ns
The tIS(ac) has been under-compensated.
Should have been 175 mV/0.5V/ns = 350 ps
Need to subtract additional 175 ps from tIS(ac)
Threshold compensation at 0.5V/ns = -175 ps
21

Full JEDEC Derating Tables

Two types of JEDEC derating tables are provided for
both tIS/tIH and tDS/tDH.

Derating table for Vref method (for reference only).

Derating table for AC/DC method.

The Vref method tables are provided for reference, in

order to document the amount of receiver derating at

Vref.
These tables do not include threshold compensation, since by
definition they apply only when measuring flight time to Vref.

The AC/DC method derating tables should be used for

determining composite derating values used in this
BKM.

These tables include both receiver derating and threshold

compensation.
Which AC/DC method derating table is used depends on the
AC threshold level utilized in post processing flight time.
22

Derating for tIS & tIH

The tables on the following pages define the

derating values for the possible range of SR values
of the incident CTRL/CMD signals, and for CLK.
Note that CLK SR shown is differential SR.

Primary derating, based on CTRL/CMD SR, is defined

in the left most columns of the table, with secondary
derating applied as you move left to right, based on
CLK SR
Secondary derating adds 8ps of additional derating for
every 0.2V/ns drop in CLK SR below 2V/ns.

Refer to the Applying Derating section for more

detailed information.
23

tIS/tIH Derating Table (Vref

Method)

24

tIS/tIH Derating Table (AC175/DC100)

25

tIS/tIH Derating Table (AC150/DC100)

26

tIS/tIH Derating Table (AC135/DC100)

27

tIS/tIH Derating Table (AC125/DC100)

28

Derating for tDS & tDH

The tables on the following pages define the

derating values for the possible range of SR values
of the incident DQ signal, and for DQS strobe.
Note that the DQS SR shown is differential SR.

Primary derating, based on DQ SR, is defined in the

left most columns of the table, with secondary
derating applied as you move left to right, based on
DQS SR
Secondary derating adds 8ps of additional derating for
every 0.2V/ns drop in DQS SR below 2V/ns.

Refer to the Applying Derating section for more

detailed information.

29

tDS/tDH Derating Table (Vref

Method)

30

tDS/tDH Derating Table (AC175/DC100)

31

tDS/tDH Derating Table (AC150/DC100)

32

tDS/tDH Derating Table (AC135/DC100)

33

tDS/tDH Derating Table (AC125/DC100)

34

Section 6:
Applying Derating

35

Derating by Proxy

Although the derating values in the tables apply to

the tIS/tIH and tDS/tDH specifications, these
specifications are often assumed to be a fixed value
in traditional flight time based AC timing analysis.

The impact of derating on margins can alternatively

be factored into the analysis by applying the
derating values to the associated flight times and/or
skews. This is referred to as derating by proxy.

Care must be taken to maintain the correct

relationship between the polarity of the derating
value and the impact on flight time and/or skew.
36

Applying Derating (continued)

A good rule to remember is that positive derating

values always work to reduce margins.
By definition, the derating values add to the setup and hold
specifications at the SDRAM input, thereby reducing margin.

Setup derating values are added to maximum flight

times prior to calculating setup margin.
Setup Flight Time = Maximum Flight + Derating Value @SR

Hold derating values are subtracted from minimum

flight times prior to calculating hold margin.
Hold Flight Time = Minimum Flight Derating Value @SR

37

Determining Derating Slew Rate

The nominal SR, as defined previously, is not

necessarily the SR used to index the derating tables.
The JEDEC SDRAM specification defines an alternate
SR definition, which is the tangent line SR, as shown
on the following page.
The derating tables should be indexed using the
steeper of the two SR calculations, the nominal SR,
as defined earlier, or the tangent line SR.
Post processing software must, therefore, calculate
SR by both methods, and utilize the steeper of the
two when indexing into the derating tables.

38

Derating Slew Rate Calculation

(Setup)

39

Use nominal SR,

except where tangent
line SR is worst case.
Use tangent line SR in
setup case where
slope is steeper than
nominal.

Derating Slew Rate Calculation

(Hold)

40

Use nominal SR,

except where tangent
line SR is worst case.
Use tangent line SR in
hold case where slope
is steeper than
nominal.