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4.1 Introduction
4.2 Simple I/O Devices
4.3 Programmed I/O
4.4 Unconditional and Conditional
Programmed I/O
4.5 Interrupt I/O
4.6 Direct Memory Access (DMA)
Summary of I/O
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Polled Interrupts
The microprocessor responds to an interrupt
by executing one general service routine for
all devices.
The priorities of devices are determined by
the order in which the routine polls each
device.
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Polled Interrupts
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Polled Interrupts
several external devices (device 1, device 2,. . . ,
device N) are connected to a single interrupt line
of a microprocessor via an OR gate
When one or more devices activate the INT line
HIGH, the microprocessor pushes
the PC and SR onto the stack.
The user can write a program at this address to
poll each device, starting with the highestpriority device, to find the source of the interrupt.
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Polled Interrupts
Suppose that the devices in Figure 4.10 are
A/D converters.
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Polled Interrupts
Polled interrupts are slow, and for a large
number of devices the time required
to poll each device may exceed the time to
service the device. In such a case, a faster
mechanism, such as the daisy chain
approach, can be used.
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1. The
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interleaved DMA,
The DMA controller chip takes over the system bus
when the microprocessor is not using it.
The DMA controller chip identifies these cycles and
allows transfer of data between memory and the
I/O device. Data transfer for this method takes
place over a period of time.
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The DMA controller chip usually has at least three registers normally
selected by the controller's register select (RS) line:
1. An address register,
2. A terminal count register,
3. And a status register.
Both the address and terminal counter registers are initialized by the
microprocessor. The address register contains the starting address of
the data to be
transferred, and the terminal counter register contains the block to be
transferred. The
status register contains information such as completion of DMA
transfer. Note that the
DMA controller implements logic associated with data transfer in
hardware to speed up the
DMA operation.
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