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D IG ITAL SYSTEM D ESIG N BEE3133

Group Member
Tan Ming Horng
Tan Nian Yee
Muhamad Zulhilmi bin Mohamad Hamizi
Aminuddin bin Aripin
Norwahida bt Mustaffa

Introduction

Introduction
Voting system is the way which done by a voter

to make a choice between options and


decision.
This system help to measure of residual vote
rate become easier, faster and efficiently.
Traditional
method
may
has
some
disadvantages
like take more times to
calculate and not efficient when it comes in
large amount of members
Traditional measures are not hard to determine
in real elections, but this does not include
errors where the voter casts a vote for the

Problem Statem ent

Problem Statem ent


This system will be use in senate which consist of 200

members. But in FPGA board, we demonstrate for 4 senate


members only.
This is because the limitation on the board and the overload
of voltage. The system implement in VHDL code in and
demonstrate by using FPGA development kit.
Each member will has two switches, SW1 and SW2. The SW1
are used to check the number of the present member which
means that the absent members can be detect.
The SW2 are use to give the decision between YES or NO.
The output is composed of three singles LED that indicate
the result of vote, YES, TIE OR NO.
Thera are three 7 segment LED display indicate the number
of members voting. The chairman of senate, who stays at
podium, has one switch which uses to disable circuit when
not use are.

Principles ofO peration

Principles ofO peration

CIRCUIT DIAGRAM

Principles ofO peration

SIMULATED CIRCUIT (PODIUM)


senate

adder

substractor decoder
7-segment

comparator

decoder

D iscussion

D iscussion
1. From the problem

requirement, we have to
design a voting system for
200 senators. Our VHDL code
can support for 200 senators,
but due to the limitation of
the adder; we only can make
4 senators as the input of the
voting system. To make 4
senators as the input, we use
6 half adders to build it. Each
adder has two inputs and two
outputs. To count the vote for
200 senators, we have to use
larger or many adders.

2. Each senator has two

switches, SW1 and SW2.


SW1 use to indicate the
attendance while SW2 use to
vote. The output is
composed of three singles
LED that indicate the result
of vote, YES, TIE OR NO. In
addition, three 7 segment
LED display indicate the
number of members voting.
The chairman of senate, who
stays at podium, has one
switch which uses to disable
circuit when not use are.

D iscussion
3. Advantages of
circuit:
The circuit can support
up to 200 senators.
It is not limited only
for 4 senators.
The circuit is flexible
and more organize.
It is easy to modify.

4. Disadvantages of circuit:
High cost of adder.
Adder used is fix and not
changeable.
The six half adder used suppose
can support 64 senators but
we only support 4 senators
due to lack of knowledge
about the program used.
Limitation of logic gates. The
logic gates used can only
support up to 200 senators,
once exceed 200, it will show
error or dont care condition.

Conclusion

Conclusion
Before we start a project, we had to understand the

problem requirement for our project that is electronic


voting system.
We used half adder to come the input, full adder to
show the numbers of vote, decoder to convert the
binary to decimal, logic gate to detect the total
numbers of vote available, 8 bit comparator to show
the different between the Yes and No vote, 7
segments to display the number of vote counted and
lastly master switch to enable and disable the circuit.
We had successfully come out a systematic voting
system by using VHDL code. We also use Quartus II
software to simulate the system and FPGA
development kit to produce the prototype of voting
system.

TH AN K YO U VERY M U CH

LIN KS

Principles ofO peration


ADDER

BASIC ADDER

PODIUM

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BASIC
ADDER

PODIUM

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DECODER

decoder

C
PODIUM
D

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7-SEGMENT

PODIUM

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COMPARATOR

PODIUM

Principles ofO peration


SENATE

PODIUM

Subtractor

FULL-ADDER

PODIUM

FU LL-AD D ER

PODIUM

Principles ofO peration

7-SEGMENT

PODIUM

Sm artArt