Beruflich Dokumente
Kultur Dokumente
Rise time
Fall time
Average delay (edge rate).
Propagation delay
Contamination delay
1
1
1
1
p1 p 2 p 3
Gate Delays
CL
p
VDD
t f k
CL
n
p
3
CL
p
VDD
3
tf
3
RC Delays
Transistors have complex nonlinear current-voltage
characteristics, but can be fairly
approximated as a switch in
series with a resistor.
The effective resistance is
chosen to match the amount of
current delivered by the
transistor.
The transistor gates and the
diffusion nodes have
capacitance.
RC Delay Model
Our model will assume
minimum device sizes for
delay estimation
A minimum sized nMOS
has resistance R
Recall that in general the
mobility of electrons is
twice that of holes.
We have thus designed
pMOS devices to have
twice the widths of nMOS
devices to attain symmetric
rise and fall times.
Vin
R1
R2
C1
R3
C2
RN
C3
CN
10
R
3Ceq
2
11
Stage Ratio
12