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Introduction
Two main types of FET:
Introduction
Other types of FET:
- MESFETMetal-Semiconductor FieldEffect Transistor
uses a p-n junction of the JFET
with a Schottky barrier
- HEMTHigh Electron Mobility
Transistor
or
HFET
Heterostructure FET
the fully depleted wide-band-gap
material forms the isolation
Introduction
Other types of FET:
- TFT Thin-Film Transistor
amorphous silicon, polycrystalline
silicon or other amorphous
semiconductors as body material
- Organic FET
based on organic semiconductors
and often apply organic gate
insulators and electrodes.
>Vp)
is
determined
by
the
applied load.
IDSS is derived from the fact that it is
the drain-to-source current with short
circuit connection from gate to source.
IDSS is the max drain current for a JFET
and is defined by the conditions
VGS=0V and VDS > | Vp|.
Voltage-Controlled Resistor
The region to the left of the
pinch-off point is called the
ohmic region.
The JFET can be used as a
variable resistor, where VGS
controls the drain-source
resistance (rd). As VGS
becomes more negative, the
resistance (rd) increases.
ro
rd
(1 VGS
VP
)2
p-Channel JFETS
JFET Symbols
Transfer Characteristics
The transfer characteristic of input-to-output is not
as straight forward in a JFET as it was in a BJT.
In a BJT, indicated the relationship between IB
(input) and IC (output).
In a JFET, the relationship of VGS (input) and ID
(output) is a little more complicated:
VGS 2
ID IDSS(1
)
VP
Transfer Characteristics
Transfer Curve
From this graph it is easy to determine the value of ID for a given value of VGS.
ID IDSS(1
ID IDSS
VGS 0V
ID IDSS(1
Step 2:
Solving for VGS = Vp (VGS(off)):
Step 3:
Solving for VGS = 0V to Vp:
ID 0 A
VGS 2
)
VP
VGS 2
)
VP
VGS VP
ID IDSS(1
VGS 2
)
VP
VGS
ID
IDSS
0.3VP
IDSS/2
0.5VP
IDSS/4
VP
0mA
MOSFETs
MOSFETs have characteristics
similar to JFETs and additional
characteristics that make then
very useful.
There are 2 types:
1.
2.
Depletion-Type MOSFET
Enhancement-Type
MOSFET
Depletion-Type MOSFET
Construction
The Drain (D) and Source (S) connect to the to n-doped regions. These Ndoped regions are connected via an n-channel. This n-channel is connected
to the Gate (G) via a thin insulating layer of SiO2. The n-doped material lies
on a p-doped substrate that may have an additional terminal connection
called SS.
Depletion-Type MOSFET
Construction
is set to 0V by the direct
VGS
connection from one terminal
to the other.
VDS is applied across the
drain-to-source terminals.
The result is an attraction for
the positive potential at the
drain by the free electron of
the n-channel and a current
similar to that established
through the channel of the
JFET.
Depletion-Type MOSFET
Construction
Negative potential at gate will tend to
Basic Operation
A Depletion MOSFET can operate in two modes: Depletion or Enhancement mode.
Depletion-type MOSFET in
Depletion Mode
Depletion mode
The characteristics are similar to the
JFET.
When VGS = 0V, ID = IDSS
When VGS < 0V, ID < IDSS
The formula used to plot the Transfer
Curve still applies:
ID IDSS(1
VGS 2
)
VP
Depletion-type MOSFET in
Enhancement Mode
Enhancement mode
VGS > 0V, ID increases above IDSS
The formula used to plot the
Transfer Curve still applies:
(note that VGS is now a positive
polarity)
VGS 2
ID IDSS(1
)
VP
p-Channel Depletion-Type
MOSFET
The p-channel Depletion-type MOSFET is similar to the n-channel except
that the voltage polarities and current directions are reversed.
Symbols
Enhancement-Type MOSFET
Construction
The Drain (D) and Source (S) connect to the to n-doped regions.
These n-doped regions are connected via an n-channel. The
Gate (G) connects to the p-doped substrate via a thin insulating
layer of SiO2. There is no channel. The n-doped material lies
on a p-doped substrate that may have an additional terminal
connection called SS.
Enhancement-Type MOSFET
Construction
=0,
V some value, the absence of an n-channel will result
VGS
DS
in a current of effectively 0A
VDS some positive voltage, VGS=0V, and terminal SS is directly
connected to the source, there are in fact 2 reversed-biased p-n
junction between the n-doped regions and p substrate to
oppose any significant flow between drain and source.
VDS and VGS have been set at some positive voltage greater than
0V, establishing the D and G at a positive potential with respect
to the source
The positive potential at the gate will pressure the holes in the
p substrate along the edge of the SiO2 layer to leave the area
and enter deeper regions of the p-substrate
The result is a depletion region near the SiO2 insulating layer
void of holes
Enhancement-Type MOSFET
Construction
The electrons will in the p substrate will be
attracted to the +G and accumulate in the
region near the surface of the SiO2 layer
Enhancement-Type MOSFET
Construction
constant and increase
If VGS
the level of VDS, ID will
Enhancement-Type MOSFET
Construction
The Enhancement-type
MOSFET only operates in the enhancement mode.
VDsat VGS VT
Enhancement-Type MOSFET
Construction
I D k (VGS VT ) 2
p-Channel Enhancement-Type
MOSFETs
The p-channel Enhancement-type MOSFET is similar to the nchannel except that the voltage polarities and current directions
are reversed.
Symbols
Specification Sheet
MOSFET Handling
MOSFETs are very static sensitive. Because of the
very thin SiO2 layer between the external terminals
and the layers of the device, any small electrical
discharge can stablish an unwanted conduction.
Protection:
Always transport in a static sensitive bag
Always wear a static strap when handling MOSFETS
Apply voltage limiting devices between the Gate and
Source, such as back-to-back Zeners to limit any
transient voltage.
VMOS
CMOS
CMOS Complementary MOSFET p-channel and n-channel MOSFET on
the same substrate.
Advantage:
Useful in logic circuit designs
Higher input impedance
Faster switching speeds
Lower operating power levels
Summary Table