FULLY

INTEGRATED CMOS
GPS
By
V. Jyosthna
13311D0616

Objective

To Implement a stand alone GPS radio

into a single chip

Introduction

1)
2)

GPS L1 Signal is DSSS and hence Spread spectrum employed here is

BPSK DSSS
20 MHz Wideband signal broadcasting
Two DSSS signals are broadcast in this band are P code and the C/A
code
Received signal power=130 dBm
C/A code noise power=111 dBm
SNR=19 dB
IF usage is of 2 types
Dual Conversion Architecture
Using Single IF

GPS L1 band signal spectrum.

GPS Radio embedded in application from

down conversion to code de-spreading.

Chip design

RF Section

IF Filter

After downconversion, the signal is amplified

using a variable-gain amplifier (VGA) with 20-dB
gain programmability
Second order IF polyphase filter

PLL Synthesizer

Implementation

0.18 m RF CMOS process with six metal levels

nMOS in excess of 55 GHz
High linearity 0.85-fF/m MIM capacitances
10- cm substrate resistivity
The availability of the triple well allows isolation
of the nMOS transistors from the substrate.
High quality factor MOS varactors, while for
inductors it is about 7 at 1.6 GHz.

GPS radio plus DNS generators

Measured S11

Image rejection bandwidth at IF

PLL Phase noise measured at f0=4

RF Signal down converted by the GPS

Radio to 9.45 MHz

Experimental Results
The full GPS radio housed in a VFQFPN52
package and soldered into an application board
that has been characterized with the three DNS
generators turned off
The PLL with its on-chip loop filter has been
characterized and the total phase noise, integrated
between 500 Hz and 1.5 MHz, is below 7 rms in
all measured samples

Table for Receiver chain

GPS Radios-State of Art

IF interferer generated by DNS down

converted by the GPS radio to IF

The GPS radio net power consumption is

35.4mWat 1.8 V
For frequencies close to the GPS L1 signal, either
the Fnoise signal injected by the DNS over
supply and ground is down converted by the
LNA-mixer and amplified by the IF filter. The
measured amplitude is 33 dBm, therefore, the
input signal is 124 dBm.

Advantages

Less Cost

Compact in Size

Low Power Consumption

Highest level Integration

Applications

Mobile phones

Portable Computers

Watches, etc

Conclusion
A 3.6-mm^2 CMOS GPS radio with better performance can be
achieved by lower IF frequency that allows for a gainbandwidth reduction in the IF filters by using a low-power
quadrature LC VCO instead of a ring oscillator with over all
power consumption of 35.4 mW.The next step is the singlechip integration of the GPS radio together with a digital
baseband processor.