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Overview
Memory Hierarchy
RAM
Memory Chip Organization
ROM
Flash Memory
Memory Hierarchy
Increasing performance
and
increasing cost
Slow and
inexpensive
Main Memory
Main memory
a collection of storage locations,
each with a unique identifier called the address.
Main memory
Address Space
Although programmers use a name to identify a
word,
at the hardware level, each word is identified by
an address.
Address space The total number of uniquely identifiable locations in
memory.
For example:
a memory with 64KB and a word size of 1 byte has an
address space that range from 0 to 65535.
Memory units
Unit
-----------KB-kilobyte
MB-megabyte
GB-gigabyte
TB-terabyte
PB-petabyte
EB-exabyte
-----------------------210 bytes
220 bytes
230 bytes
240 bytes
250 bytes
260 bytes
Approximation
-----------103 bytes
106 bytes
109 bytes
1012 bytes
1015 bytes
1018 bytes
Note:
Memoryaddressesaredefinedusing
unsignedbinaryintegers.
Example 1
A computer has 32 MB (megabytes) of
memory. How many bits are needed to
address any single byte in memory?
Solution
The memory address space is 32 MB,
or 225 (25 x 220). This means you need
log2 225 or 25 bits, to address each
byte.
Example 2
A computer has 128 MB of memory.
Each word in this computer is 8 bytes.
How many bits are needed to address
any single word in memory?
Solution
The memory address space is 128
MB, which means 227. However,
each word is 8 (23) bytes, which
means that you have 224 words.
This means you need log2 224 or 24
bits, to address each word.
Data bus-
Static RAM
Static RAM (SRAM) based on flip flops
Contents of each location persist as long as
power is applied.
Fast but relatively large
Consume a lot of power
Used for memory applications that are small
but fast
Dynamic RAM
Dynamic RAM (DRAM) employ capacitors
Capacitor stores electric charge whose level
represents a 1 or 0
Capacitors dissipate with time and hence the
charge must be restored frequently
DRAMs
smaller, slower than SRAMs
support low cost, low power and high density and
hence used in main memory
RAM chip
A0 Am-1 : Address lines from 0 to m-1
CS : Chip Select (CS = 0, chip selected)
WR : ReadWrite (WR = 0, write operation)
RAM Grid
RAM Grid
During read operation:
Entire row is selected
It is fed into the column MUX
MUX selects a single bit for output
Flash Memory
A section of memory cells can be erased in a
References
Textbook: Computer Organization and
Architecture
Wiki pages
http://en.wikipedia.org/wiki/Computer_storage
http://en.wikipedia.org/wiki/Dynamic_random_ac
cess_memory
http://computer.howstuffworks.com/ram.htm
http://computer.howstuffworks.com/computer
-memory1.htm