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Passive

Components
Resistors

Capacitors
Inductors
Diodes
Interface components

Resistors
Values specified in ohms (), kiloohms (K), or mega-ohms (M)
Marked with value using a color
code
0 1 2 3 4 5 6 7 8 9 5% 10%
B B ROY of Great Britain had a Very Great Wife
2

Resistor ratings
Physical size of resistors
determines power handling
ability
Commonly available as 1/8,
1/4, 1/2, 1,
and 2 watt components
Much higher powers
available , usually as
wirewound or ceramic
encapsulated parts
3

Resistor handling and installation


Resistors are not polarized and may be installed
in either direction.
Resistors are not generally susceptible to ESD
damage, so special precautions are not
required.
Mechanical stress due to lead bending should
be minimized.
4

Capacitors
Values specified in microfarads (F) or
picofarads (pF)
Marked with actual value or a numeric code
Some varieties are +/- polarized

Capacitor types

Ceramic disk

Monolithic ceramic

Dipped siver-mica

Mylar

Mylar

Ceramic disk
Monolithic ceramic
Dipped silvered-mica
Mylar or polyester
Aluminum electrolytic (+/-)
Tantalum (+/-)

Solid tantalum, polarized

Radial aluminum electrolytic

Axial aluminum electrolytic


6

Capacitor ratings
Physical size of capacitors is related to voltage
handling ability WVDC working voltage DC
Temperature coefficient may also be
important can be + or or nearly zero
Temperature coefficient depends upon
dielectric material

Capacitor handling and


installation
Most capacitors are not polarized and may be installed
in either direction.
Electrolytic capacitors ARE polarized and MUST be
installed with proper polarity, else catastrophic failure!
Capacitors are not generally susceptible to ESD
damage, so special precautions are not required.
Mechanical stress due to lead bending should be
minimized.

Inductors
Values specified in henries (H), millihenries (mH) and
microhenries (H)
A coil of wire that may be wound on a core of air or
other non-magnetic material, or on a magnetic core
such as iron powder or ferrite.
Two coils magnetically coupled form a transformer.

Inductor types

Molded inductor & air-wound inductor

Ferrite core toroidal transformer

Adjustable air-wound inductor

Air wound inductor

Iron powder toroidal inductor


10

Inductor ratings
Wire gauge and physical size of the coil
determine the current handling capacity.
Core material will have a temperature
dependence. Air is best, followed by iron
powder, then ferrites.

11

Inductor handling and installation


Inductors are not polarized and may be installed in
either direction.
Inductors are not generally susceptible to ESD damage,
so special precautions are not required.
Mechanical stress due to lead bending should be
minimized.
Inductors in timing or frequency determining circuits
should be installed in a mechanically rigid fashion.

12

Transformers

Introduction
A transformer is a device that changes ac electric power at
one voltage level to ac electric power at another voltage
level through the action of a magnetic field.
There are two or more stationary electric circuits that are
coupled magnetically.
It involves interchange of electric energy between two or
more electric systems
Transformers provide much needed capability of changing
the voltage and current levels easily.
They are used to step-up generator voltage to an appropriate
voltage level for power transfer.
Stepping down the transmission voltage at various levels for
distribution and power utilization.

Transformer Classification
In terms of number of windings
Conventional transformer: two windings
Autotransformer: one winding
Others: more than two windings
In terms of number of phases
Single-phase transformer
Three-phase transformer
Depending on the voltage level at which the winding is operated
Step-up transformer: primary winding is a low voltage (LV)
winding
Step-down transformer : primary winding is a high voltage (HV)
winding

Primary and Secondary Windings

A two-winding transformer consists of two windings interlinked by


a mutual magnetic field.
Primary winding energized by connecting it to an input
source
Secondary winding winding to which an electrical load is
connected and from which output energy is drawn.

Primary winding

Secondary winding

Ideal Transformers
An ideal transformer is a lossless device with an input winding
and an output winding. It has the following properties:
No iron and copper losses
No leakage fluxes
A core of infinite magnetic permeability and of infinite
electrical resistivity
Flux is confined to the core and winding resistances are
negligible

Ideal Transformers

An ideal transformer is a lossless device with an input winding


and an output winding.

The relationships between the input voltage and the output voltage,
and between the input current and the output current, are given by
the following equations.
v p t is t

a
In instantaneous quantities
vs t i p t

Ideal Transformers
v p t

is t N p

a
vs t i p t N s

In rms quantities

Vp

I
s a
Vs I p

Np: Number of turns on the primary winding


Ns: Number of turns on the secondary winding
vp(t): voltage applied to the primary side
vs(t): voltage at the secondary side
a: turns ratio
ip(t): current flowing into the primary side
is(t): current flowing into the secondary side

Transformer Voltage Regulation


Because a real transformer has series impedance within it, the output voltage
of a transformer varies with the load even if the input voltage remains
constant. The voltage regulation of a transformer is the change in the
magnitude of the secondary terminal voltage from no-load to full-load.
V no load Vs full load
%Voltage Re gulation s
100
Vs full load

V p no load V p full load


V p full load

100

Referred to the primary side

Transformer Efficiency
Power Output
Power Input
Power Input Losses

Power Input
Losses
1
Power Input
Pcopper loss Pcore loss
1
Pcopper loss Pcore loss V s I s cos

Usually the efficiency for a power transformer is between 0.9 to 0.99.


The higher the rating of a transformer, the greater is its efficiency.

PN JUNCTION DIODES
What is a PN junction semiconductor and how it
is formed?
It is a combination of P-type semiconductor
with N-type semiconductor to achieve the
practical utility of both.
Its formed, when a P-type semiconductor
is joined to a N-type semiconductor.

CONT

PN

SPACE CHARGE REGION


Electrons near the junction moves to the N-type
to P-type.
This Phenomenon creates the SPACE CHARGE
REGION.
Electrons are available in P-region in the space
charge region and holes are available in Nregion in space charge region
Electric field will get created in this space
charge region because of the movement of
holes and electrons. The movement of EF is
from N-type to P-type region.

CONT

DIFFUSION CURRENT
Some electrons move back from P to N in the
space region.
Some holes move back from N to P in the space
region.
This continues to happen till the equilibrium is
reached.
This movement of electrons and holes in space
charge region gives rise to Diffusion Current.

DRIFT CURRENT
If the voltage
is
applied
to
a
semiconductor above
a specified region, the
electrons in the Nregion is drifts through
the
junction
and
migrate to the p region
and the holes in the Pregion drift through
the
junction
and
migrate to the Nregion.
The current
flow
across the circuit and
this current is called as

MOBILITY OF CHARGED
PARTICLES
Consider a material having large number of free
electrons, subject to external battery.
There exists a drift current due to drifting of free
electrons with a velocity called drift velocity (velocity
with which electrons drift) denoted as v, measured in
m/s.
It is the length of the material and V is the applied
voltage then the material gets subjected to an electric
field E is given by,
E=

The drift velocity is proportional to the magnitude of an


electric field.
E

i.e =E

units of are m2 / V-sec

CONDUCTIVITY OF
SEMICONDUCTORS
In a pure semiconductors the number of holes is
equal to number of electrons.
With each electron-hole pair created, two chargecarrying particles are formed.
One is negative which is the free electron with
mobility n.
Other is positive i.e holes with mobility p.
The electrons and holes move in opposite
directions in an electric field E. The current due to
each is in same direction.

THEORY OF PN JUCTION

PN JUNCTION DIODE IN EQUILIBRIUM WITH NO


APPLIED VOLTAGE

FORWARD BIAS CONDITION

CONT
V-I Characteristics of a diode under forward bias:
VF<V0
When forward bias voltage (VF) less than cut in voltage
(V0), the forward current IF is almost zero because the
potential barrier prevents the holes from P-region and
the electrons from N-region to flow across the depletion
region in the opposite direction.
VF>V0
The potential barrier at the junction completely
disappear and hence, the holes cross the junction from
P-type to N-type and the electron cross the junction in
opposite direction, resulting in relatively large current
flow in the external circuit.

REVERSE BIAS

CONT
For large applied reverse bias, the free electrons from
the N-type moving towards the positive terminal of the
battery acquire sufficient energy to move with high
velocity and knocks the valence electrons.
Thus a large number of free electrons are produced.
This lead to breakdown of the junction leading to very
large reverse current.
The reverse voltage at which the junction breakdown
occurs is know as breakdown voltage. This breakdown
may damage the diode.
So diode should be operate below this breakdown
voltage.

APPLICATION OF PN DIODE
i.

Rectifier in dc power supplies.

ii. Clippers in wave shaping circuits.


iii. Clampers in TV receivers.
iv. Voltage doublers in CRT.
v. Switching in digital logic circuits.
vi. Diode gates.
vii. Comparators.

Zener Diode
Zener diode operates only in the reverse-bias region.
As the reverse voltage increases, the reverse current
remains negligibly small upto the knee of the curve
point.
At this point, the effect of breakdown process begins.
From the bottom of the knee, the breakdown voltage
remains essentially constant.
This ability of the diode is called regulating ability and is
an important feature of a zener diode.
It maintains, an essentially a constant voltage across its
terminals over a specified range of zener current values.

ZENER DIODE AS VOLTAGE


REGULATOR
Under reverse bias condition, the voltage across the
diode remains almost constant even though the current
through the diode increases.
Thus the voltage across the zener diode serves as a
reference voltage. Hence the zener diode can be used as
In
this circuit,
zener diode is
voltage
regulator.
reverse biased and as long
as the input voltage does
not fall below VZ, the
voltage across the diode
will be constant and hence
the load voltage will also
be constant.

REGULATION CHARACTERISTICS
Line regulation
Load regulation
LINE REGULATION
For a fixed load resistance(RL), the variation of Vo with
respect to Vi is given by line regulation characteristics.
When the input voltage is less than the breakdown
voltage, the output varies linearly with the input voltage.
When the input voltage is above the breakdown voltage,
the output voltage Vo remains constant even though if
any variation in the input voltage.

CONT
LOAD REGULATION
For a fixed input voltage, variation of Vo with respect to
load resistor gives the load regulation characteristics.
The output voltage always remains constant even
though the load resistor value changes.
APPLICATION
Used as voltage regulator.
Used in voltage clipper circuits.
As a reference voltage in comparator circuits.
As a standard voltage in calibrating the instruments.

INTRODUCTION

BIPOLAR JUNCTION TRANSISTOR (BJT):


BJT is a three-terminal semiconductor device. The
operation of BJT depends on the interaction of both the
majority and minority carriers and the name bipolar.

Advantages of BJT:
1. Smaller in size and light weight.
2. Rugged construction.
3. Low operation voltage.
4. More efficient due to low power requirement.
APPLICATIONS:
1. It is used in amplifier and oscillator circuits.
2. Used as a switch in various digital circuits.

Point-Contact Transistor
first transistor ever made

TRANSISTOR CONSTRUCTION
Structure
The transistor is a threelayer
semiconductor
device
consisting
of
either two n-and one ptype layers of material
or two p- and one n-type
layers of material.
The former is called as
NPN transistor, while
later is called as PNP
transistor.

CONT
A BJT has, essentially, three region know as emitter, base
and collector. All these three regions are provided with
terminals which are labelled as E (for emitter), B (for base)
and C (for collector).
1. Emitter: It is a region situated in one side of transistor,
which supplies charge carriers (i.e electrons & holes) to
the other two regions. The emitter is a heavily doped
region.
2. Base: It is the middle region that forms two p-n
junctions in the transistor. The base of the transistor is
thin, as compared to the emitter and is a lightly doped
region.

CONT
3. Collector: It is a region situated in the other side of
transistor (i.e the side opposite to the emitter), which
collect charge carriers (i.e electrons and holes). The
doping of the collector is intermediate between the heavy
doping of emitter and the light doping of the base.

UNBIASED BJT
A transistor, with three terminals ( i.e emitter, base and
collector) left open, is called an unbiased transistor or an
open-circuited transistor.
Under these conditions, the diffusion of free electrons
across the junction produces two depletion layers.
The barrier potential, for each of these layers at 25 is
approximately 0.7V for silicon transistor and 0.3V for
germanium transistor.
Since the three regions having different doping levels,
therefore the depletion layers do not have the same width.
It may be noted that a more heavily doped region has the
greater concentration of ions near the junction.

CONT

CONT.
An emitter-base depletion layer penetrates slightly into the
emitter, as it is a heavily doped region, whereas it
penetrates deeply into the base as its a lightly doped
region.
Similarly, the collector-base depletion layer penetrates
more into the base region and less into collector region.
Emitter-base depletion layer width is smaller than that of
collector base depletion layer.

BJT BIASING

The application of a suitable dc voltages, across the


transistor terminals, is called biasing. Each junction of a
transistor may be forward biased or reverse-biased
independently.
There are different way of biasing a transistor, which are
also known as mode of transistor operation.
1. Forward-active: In this mode, the emitter-base
junction of a transistor is forward biased and collector base
junction is reverse biased.
In forward active biasing the negative terminal of the
battery is connected to N-side and positive terminal to Pside. The reverse biasing requires all the connections to be
opposite to those for forward biasing.

CONT

2.SATURATION: In this mode, both the emitter-base and


collector-base junctions of a transistor are forward-biased.
In this mode, the transistor has a very large value of
current. The transistor is operated in this mode, when it is
used as a closed switch.
3.CUT-OFF: In this mode, both the emitter-base and
collector-base junctions of a transistor are reverse-biased.
In this mode, the transistor has practically zero current.
This transistor is operated in this mode, when it is used as
open switch.

OPERATION OF AN NPN
TRANSISTOR

CONT
NPN transistor biased in forward-active mode..
i.e the emitter-base of a transistor is forward-biased
and collector-base junction is reversed biased.
The emitter-base is forward biased only if VEB is greater
than barrier potential which is 0.7V for silicon and 0.3 for
Ge transistors.
The forward bias on the emitter-base junction causes the
free electrons in the N-type emitter to flow towards the
base region. This constitute the emitter current IE.
We know that the direction of conventional current
is opposite to the flow of electrons.

CONT
Therefore electrons after reaching the base region tends to
combine with the holes.
These free electrons combine with holes in the base, they
constitute base current (IB).
Most of the free electrons do not combine with holes in the
base.
Most of the electrons will diffuse to the collector region
and constitute collector current (IC).
This collector current is also called injected current
because this current is produced due to electrons injected
from the emitter region.

CONT

NOTE: 1.The emitter current of a transistor consist of two
components namely base current and collector current.
The base current is about 2% of the emitter current, while
collector current is about 98% of the emitter current.
From the diagram that the emitter current is the sum of
the collector and base current.
IE=-(IC+IB)

Since the base current is very small, therefore


IE IC

OPERATION OF PNP
TRANSISTOR

CONT
The forward bias applied to the emitter-base junction of a
PNP transistor causes a lot of holes form the emitter
region to crossover to the base region as the base is
slightly doped with N-type impurity.
The number of electrons in the base region is very small
and hence the number of holes combined with electrons
in the N-type region is also very small.
Hence, a few holes combined with electrons to constitute
a base current IB.
The remaining holes (more than 95%) crossover into the
collector region to constitute a collector current I c.

CONT
Thus the collector and base current when summed up
gives the emitter current i.e IE = (IC+IB).

BJT CIRCUIT
CONFIGURATION
Transistor has three terminals namely emitter(E), base (B)
and collector(C).
When a transistor is connected in a circuit, we required
four terminals i.e., two for i/p and two for o/p.
To overcome this difficulty we use one of the three
terminal as common terminal to the input and the output
terminals.
Depending upon the terminals, which are used as a
common terminals, the transistor can be connected in the
following three different configurations:
Common-base (CB) configuration
Common-emitter (CE) configuration

CB CONFIGURATION
The transistor is connected with the base as a common
terminal.
The input is applied between the emitter and base
terminals. The output is taken between the collector and
base terminals.

CE CONFIGURATION
The transistor is connected with the emitter as a common
terminal.
The input is applied between the base and collector
terminals. The output is taken between the collector and
emitter terminals.

CC CONFIGURATION
The transistor is connected with the collector as a common
terminal.
The input is applied between the base and collector
terminals. The output is taken between the collector and
emitter terminals.

CB CONFIGURATION


Current Gain: The ratio of output current to the input
current is called current gain of a transistor.
In CB configuration the IE is the input current and IC is the
output current.
Since the input current and output current may be either
direct current or alternating current, therefore we define
two type of current gain namely d.c current gain and a.c
current gain.
Common-base d.c current gain (): It is defined as the
ratio of IC to IE and is usually designated by , DC or hFB.

CONT
In a transistor, the collector current is always less than the
emitter current.
Therefore current gain of a transistor in CB configuration is
always less than unity.
For example,
IC=9.8mA and IE = 10mA then the common-base d.c.
current gain,
=9.8/10 = 0.98
The above value of indicates that the (IC) is 98% of the IE.
Therefore the IB is just 2% of IE.
The value of is made closer to unity by making the width

CONT

The actual value of ranges from 0.95 to 0.998.
The collector current IC= IE
We also know that the emitter current,
IE = IB+IC

Therefore IB = IE-IC = IE- .IE = (1- )IE


Common-base a.c. current gain (0): It is defined as
the ratio of small change in collector current () to a small
change in emitter current () for a constant collector-tobase voltage(VCB).

0=
It is designated by 0, ac or hfb

CONT
The term 0 is also called CB short-circuit current gain or
small signal current gain.
The difference between d.c current gain (hFB) and a.c
current gain (hfb) should be carefully noted. The values of
0 is also less than unity and approximately the same as .
= 0
Current gain of a transistor in CB NPN is less than unity.
But still it is called as current gain.
Output resistance of the CB transistor is much higher than
the input resistance. This produces a large voltage gain
and hence the large power gain.

PROBLEMS
1.In a CB connection, the emitter current is 6.28mA and
the collector current is 6.20mA. Determine the CB d.c
current gain.
Given: IE=6.28mA and IC = 6.20mA

= IC/IE
Ans : = 0.987
2. The common-base d.c. current gain of a transistor is
0.967. IF the emitter current is 10mA, what is the value of
base current?
Given =0.967 and IE= 10mA
W.k.t 0.967=IC/IE = IC/10

W.k.t IE,
10 = IB+IC = IB+9.67
IB =10-9.67 =0.33mA

CONT
NPN transistor in the CB configuration.
Static characteristics curves
Input characteristics
Output characteristics
Input characteristics: These curves give the relationship
between the input current and input voltage for a given
output voltage.
Output characteristics: These curves give the
relationship between the output current and the output
voltage for a given input current.

CONT

INPUT CHARACTERISTICS OF CB
To determine the input characteristics,
The collector-base voltage VCB is kept constant at zero volt
The IE is increased from zero in suitable equal steps by increasing
VEB.
This is repeated for higher fixed values of VCB.
Knee voltage.

CONT
When VCB is equal to zero and the emitter-base junction is
forward biased, the junction behaves as a forward biased
diode.
So the emitter current IE increases rapidly with small
increase in VEB. When VCB is increased keeping VEB constant
the width of the base region will decreases.
This effect in an increase of IE.
Therefore, the curve shift towards the left as VCB is
increased.

OUTPUT CHARACTERISTICS OF
CB
To determine the output characteristics, the I is kept
E

constant at a suitable value by adjusting the VEB.


Then VCB is increased in suitable equal steps and the
collector current IC is noted for each value of IE. This is
repeated for different fixed values of IE.

CONT
From the characteristics, it is seen that for a constant
value of IE, IC is independent of VCB.
Further IC flow even when VCB is equal to zero.
As the emitter-base junction is forward biased, the
majority carrier i.e electrons, from the emitter are injected
into base region.
Due to the action of internal potential barrier at the
reverse biased CB junction, they flow to the collector
region and give rise to IC even when VCB is equal to zero.

EARLY EFFECT OR BASE WIDTH


MODULATION

As the collector voltage VCC is made to increase the


reverse bias, the space charge width between collector to
base tends to increase, with result that the effective width
of the base decreases. This dependency of base-width on
collector-to-emitter voltage is know as the Early effect.
This decrease in effective base-width has three
consequences:
(i) There is less chance for recombination within the
base region. Hence, increases with increasing |VCB|.

(ii) The charge gradient is increased within the base,


and consequently, the current of minority carriers

CONT
For extremely large voltages, the effective base-width may
be reduced to zero, causing voltage breakdown in the
transistor. This phenomenon is called the punch through.
Transistor parameters
The slope of the CB characteristics will give the following
four transistor parameters. They are commonly called as
common base hybrid parameters or h-parameters.
(i) Input impedance(hib): It is defined as the ratio of the
change in (input) emitter voltage to the change in (input)
emitter current with the (output) collector voltage VCB kept
constant.

CONT

hib = constant
The typical value of hib ranges from 20 to 50.
(ii) Output admittance (hob): It is defined as the ratio of
change in the (output) collector current to the
corresponding change in the (output) collector voltage
with the (input) emitter current IE kept constant.
Therefore,
hob=
The typical value of this parameter is of the order of 0.1 to
10 mhos.

CONT
(iii) Forward current
of the change in the
corresponding change
keeping the (output)
Hence,
hfb=

gain (hfb): It is defined as a ratio


(output) collector current to the
in the (input) emitter current
collector voltage VCB constant.

Its typical value varies from 0.9 to 1.0.


(iv) Reverse voltage gain (hrb): It is defined as the ratio
of the change in the (input) emitter voltage and the
corresponding change in (output) collector voltage with
constant (input) emitter current IE. Hence,

hrb= typical value is of the order 10-5 to 10-4.

CE CONFIGURATION
Current Gain: The current gain of a transistor in the CE
configuration is the ratio of IC to that of IB.
(i) Common-emitter d.c. current gain (): It is defined
as the ratio of collector current (IC) to base current (IB) and
is designated by , dc, or hFE. Mathematically, the CE d.c.
current gain
= IC/IB , IC = (1+ )ICB0+ IB
W.k.t IC of a transistor is much larger than the base current
(IB).
Therefore the value of is much greater than unity.
Example, if IC =5mA and IB = 0.05mA, then common-

CONT

Collector current is 100 times that of base current. Typical
value of may range from 20 to 250. Sometimes of a
transistor is also know as large-signal CE current gain.
(ii) Common emitter a.c. current gain (0): It is
defined as the ratio of small change in collector current ()
to the small change in base current () for a constant
collector-to-emitter voltage (VCE).
It is designated by 0, ac or hFE. Mathematically commonemitter a.c. current gain,
0=/

0 is also called common-emitter short circuit

RELATION BETWEEN CURRENT


GAIN and

W.k.t IE of a transistor is the sum of its base current (IB) and


collector current (IC). i.e.,

IE = IB+IC
Dividing the above equation on both side by IC,
=
Since IC/IE = and IC/IB = therefore

= +1=
=

CONT

From the equation of we can get
(+1) =
. + =
= - . = (1- )
=

INPUT CHARACTERISTICS
To determine the input characteristics, the collector to
emitter voltage is kept constant at zero volt.
Base current is increased from zero in equal steps by
increasing VBE.

CONT
A knee voltage is exists, where the base current below
knee voltage is very small. The value of knee voltage is
0.7 and 0.3.
Beyond the knee voltage the IB increases with increase in
VBE for constant VCE.

CONT
It may be noted that the value of base current does not
increases rapidly as that of the i/p characteristics of a CB
transistor.
It mean that input resistance of a transistor in CE is higher
than CB configuration.
As the VCE is increased above 1v, the curve shift
downwards. It occur because of the fact that as VCE is
increased, the depletion width in the base region
increases. The reduces effective base width, which in turn
reduces the base current.

OUTPUT
CHARACTERISTICS
To determine the output characteristics, the base current I

is kept constant at a suitable value by adjusting baseemitter voltage, VBE.


The magnitude of collector-emitter voltage VCE is increased
in suitable equal steps from zero and the collector current
IC is noted.

CONT


W.k.t
=, for large value of VCE, due to Early effect, a very
small change in is reflected in a very large change in .
For example, when =0.98, = 49. If increases to
0.985, then = 66.
Here, a slight increase in by about 0.5% results in an
increase in by about 34%.
The output characteristics have three regions, namely
Saturation region
Cut-off region
Active region

CONT

Saturation region: In this region, both junctions are


forward biased and an increase in the base current does
not cause a corresponding large change in IC.
The ratio of VCE(sat) to IC in this region is called saturation
resistance.
Cut-off region: The region below the curve for IB=0 is
called the cut-off region. In this region both junctions are
reverse biased.
When the operating point for the transistor enters the cutoff region the transistor is OFF.
Hence the collector current almost zero and the collector
voltage almost equals VCC, the collector supply voltage.


Transistor parameters
The slope of the CE characteristics will give the following
four transistor parameters. They are commonly called as
common base hybrid parameters or h-parameters.
(i) Input impedance(hie): It is defined as the ratio of the
change in (input) base voltage to the change in (input)
base current with the (output) collector voltage VCE kept
constant.
hib = constant
The typical value of hie ranges from 500 to 2000.

CONT

(ii) Output admittance (hoe): It is defined as the ratio of


change in the (output) collector current to the
corresponding change in the (output) collector voltage
with the (input) base current IB kept constant. Therefore,

hob=
The typical value of this parameter is of the order of 0.1 to
10 mhos.

CONT

(iii) Forward current gain (hfe): It is defined as a ratio


of the change in the (output) collector current to the
corresponding change in the (input) base current keeping
the (output) collector voltage VCE constant. Hence,
hfe=
Its typical value varies from 20 to 200.
(iv) Reverse voltage gain (hrb): It is defined as the ratio
of the change in the (input) base voltage and the
corresponding change in (output) collector voltage with
constant (input) base current IB. Hence,
hre=typical value is of the order 10-5 to 10-4.

CC CONFIGURATION

Current gain: In a common-collector transistor circuit, the
input current is the base current (IB) and the output current
is the emitter current (IE).
Therefore the common-collector current gain is given by
the relation,
= =
Substituting the value of = in the above equation, CC
current gain
=

The output current of a common-collector transistor circuit


is (1+) times that of the input current.
W.k.t >>1, therefore common-collector current gain

FIELD EFFECT TRANSISTORINTRODUCTION

FET is an another semiconductor device like a BJT which


can be used as an amplifier or switch.
Like BJT, FET is also a three terminal device; however,
the principle of operation of FET is completely different
from that of BJT.
The three terminals of FET are named as Drain (D),
Source (S) and Gate (G). Out of these three terminals
gate terminal acts as a controlling terminal.

FEATURES OF FET
Voltage Controlled Device:
In BJT the output current IC is controlled by the base
current IB.
Hence BJT is a current controlled device.
In FET, voltage applied between gate and source (VGS)
controls the drain current ID.
Therefore FET is a voltage controlled device.
The name field effect is derived from the fact that the
output current flow is controlled by an electric field set up
in the device by an externally applied voltage between
gate and source terminals.

CONT
Unipolar Device: We know that in BJT the current is
carried by both electrons and holes, and hence the name
bipolar junction transistor.
In FET, current is carried by only one type of charge
particles, either electrons or holes. Hence FET is called
unipolar device.
Like BJT, the parameter of FET are also temperature
dependent.
In FET, as temperature increases drain resistance also
increases, reducing the drain current.
FET is more temperature stable compare to BJT.
FET has very high input impedance. --- preferred in
amplifiers where high input impedance is required.

CLASSIFICATION OF FET
The FETs are categorised as:
Junction Field Effect Transistor (JFET)
Metal Oxide Semiconductor Field Effect Transistor
(MOSFET)
JFET
n-channel JFET
p-channel JFET

MOSFET
Depletion MOSFET
Enhancement MOSFET

CONSTRUCTION OF N-CHANNEL JFET


A
small
bar
of
extrinsic
semiconductor material, n type is
taken and at its two ends, two
ohmic contacts are made which are
the drain and source terminals of
FET.
Heavily doped electrodes of p type
material form p-n junctions on each
side of the bar. The thin region
between the two p gates is called
the channel.
Since this channel is in the n type
bar, the FET is known as n-channel
JFET.
The electrons enter the channel
through the terminal called source

OPERATION OF N-CHANNEL JFET


VDD = Drain supply voltage
VDS = Drain to source voltage
VGG = Gate supply voltage
VGS = Gate to source voltage
ID = Drain current
IS = Source current and
IG = Gate current

CONT
First the gate has been reverse-biased by the gate
voltage source VGG and the drain supply voltage is not
connected.
We know that there exist space charge regions on either
side of a reverse biased P-N junction. Now, depletion
layer located symmetrically about the gates are formed.

CONT

Consider the effect of drain voltage VDD while VGG is
removed.

The voltage VDD is dropped across the N-channel


resistance (say RDS) giving rise to a drain current ID = .
Due to this current flow there will be a uniform voltage
drop while going from drain to source.

CONT
Consider two points A and B in N-channel. Let VA and VB
be potential drop at these points. Certainly, VA>VB.
So due to the progressive voltage drop along the length
of the channel, the reverse biasing effect on P-N junction
is stronger near drain than near source.
Due to this reason, the penetration of depletion region at
A is more than at B.
When both VDD and VGG are applied.
Let no potential is applied between drain and source.
Now a current ID flow from drain to source which is
maximum because the channel is widest.

CONT
Let the gate is reverse-biased by applying a voltage V GG
between the gate and source.
This gate bias, increases the depletion region and thereby
decreases the cross-section of N-channel. Since there are no
current carriers available in depletion region, its conductivity
is zero.
Due to the decrease of cross sectional area of N-channel, the
drain current ID decreases.
When gate-bias is increased further, a stage is reached when
two depletion regions touch each other and the drain current
becomes zero.
So, according to a fixed drain to source voltage, the drain
current is a function of reverse bias voltage at gate.

CHARACTERISTICS OF N-CHANEL JFET


Drain characteristics: The curves between drain
current (ID) and drain to source voltage (VDS) for different
fixed values of gate to source voltage (VGS) are known as
drain characteristics.
Transfer Characteristics: The curves between drain
current (ID) and gate to source voltage (VGS) for a fixed
value of drain to source voltage (VDS) and known as
transfer characteristics.

CONT

DRAIN CHARACTERISTICS
In order to draw the drain characteristics set the VGS to zero.
Now, increase VDS in small suitable steps and record the
corresponding values of ID at each step.
VGS and VDS both = 0: When VGS = 0 the channel is entirely
open. VDS = 0, so there is no attractive force for the majority
carriers (electrons in n-channel JFET) and drain current does not
flow.
Self pinch-off at no bias (VGS = 0): At VGS = 0, in response to
a small applied voltage VDS, the n-type bar acts as a simple
semiconductor resistor, and the current ID increases linearly
with VDS.
AS VDS increases, the voltage drop along the channel also
increases.

CONT
This increase in voltage drop increases the reverse bias on
gate-source junction and cause the depletion regions to
penetrate into the channel, reducing channel width.
The effect of reduction in channel width provides more
opposition to increase in drain current ID.
Thus, rate of increase in ID with respect to VDS is now reduced.
At some value of VDS, drain current ID cannot be increase
further, due to reduction in channel width.
Any further increase in VDS does not increase the drain
current ID. ID approaches the constant saturation value.
The voltage VDS at which the current ID reaches to its constant
saturation level is called Pinch-off Voltage, Vp.

CONT
VGS with negative bias: When an external bias, of say
-1V, is applied between the gate to source, the gate
channel junction are further reverse biased , reducing
the effective width of the channel available for the
conduction.
Because of this, drain current will reduced and pinch off
voltage is reached at a lower drain current than when
VGS=0.
By applying several values of negative external bias
voltage (VGS), it is observed from the graph that for more
negative values of VGS, the pinch-off voltage is reached
at lesser values of ID.

CONT
Breakdown region: If we increase value of VDS beyond
pinch-off voltage, Vp, the drain current ID remains constant,
upto certain value of VDS.
If we further exceed VDS, the voltage will be reached at
which the gate-channel junction breakdown, due to
avalanche effect.
At this point the drain current increases very rapidly and the
device ma be destroyed.
Ohmic and Saturation regions:
It is seen that the drain characteristics of JFET is divided into
two regions:
Ohmic region
Saturation region

CONT

In the ohmic region, the drain current ID varies with VDS and
the JFET is said to behave as voltage variable
resistance.
In the saturation region, the drain current ID remains fairly
constant and does not vary with VDS.
Cut-off : As we know, for an n-channel JFET, the more
negative VGS cause drain current to reduce and pinch-off
voltage to reach at a lower drain current.
When VGS is made sufficiently negative, ID is reduced to 0.
This is caused by the widening of the depletion region to a
point where it completely closes the channel. The value of
VGS at the cut-off point is designated as VGS(OFF).

TRANSFER CHARACTERISTICS
The

relationship between the drain current ID and gate to


source voltage VGS is non-linear.
This relationship is defined by Shockleys equation
ID = IDSS(1-)^2
The square term of the equation will results in a non-linear
relationship between ID and VGS, producing a curve that
grows exponentially with decreasing magnitudes of VGS.
From equation we can also write,
VGS = VP(1-)
In this eqn., IDSS and VP are constants, value of VGS controls
ID.

CONT
ID =0 when VGS = VGS
(off)

ID = IDSS when VGS =0

COMPARISON OF BJT AND FET


PARAMETERS

BJT

FET

Control element

Current controlled device.

Voltage controlled
device.

Device type

Current flows due to both, Current flows only due


majority and minority carriers to majority carriers and
and hence bipolar device.
hence unipolar
device.

Types

n-p-n and p-n-p

n-channel and pchannel

Configurations

CE, CB and CC

CS, CG and CD

Input resistance

Less compare to JFET

High compare to BJT

Size

Bigger than JFET

Smaller in construction
than BJT, thus making
them useful in IC.

Symbols

COMPARISON OF BJT AND FET


PARAMETERS

PARAMETERS
Less

BJT

Thermal stability

Thermal
Relation
betweenstability
Linear
input and output

Relation between
Ratio input
of o/p and
to i/p output

BJT More

Less

FET

Non-Linear

Linear

FET
More
Non-Linear

Ratio of o/p to i/p


Thermal noise

More in BJT as more charge


carriers cross junctions

Much lower in JFET as


very few charge carrier
cross the junction.

Thermal noise

More in BJT as more charge


low
carriers cross junctions

Much lower in JFET as


very few charge carrier
cross the junction.

Gain bandwidth
product

High

low

Gain bandwidth
product

High

CHARACTERISTIC PARAMETERS OF THE


JFET

In a JFET, the drain current ID depends upon the drain


voltage VDS and the gate voltage Vgs.
As one of these variables may be fixed and the relation
between the other two are determined.
1. Mutual conductance or transconductance, g m It is
the slope of the transfer characteristic curves, and is
defined by

gm = )

VDS

= , VDS held constant.

It is the ratio of a small change in the drain current to the


corresponding small change in the gate voltage at a
constant drain voltage. Unit of conductance in mho.

CONT

2. Drain resistance, r It is the reciprocal of the slope


d
of the drain characteristics and is defined by
rd = VGS = , VGS held constant.

It is the ratio of a small change in the drain voltage to


the corresponding small change in the drain current at a
constant gate voltage. It has the unit of resistance in
ohms.
The drain resistance at Vgs=0V i.e., when the depletion
region of the channel are absent, is called as drainsource ON resistance, RDS or RDS(ON).
The reciprocal of rd is called the drain conductance. It is
denoted by gd or gos.

CONT

Amplification factor, It is defined by
= = - , ID held constant.
It is ratio of small change in the drain voltage to the
corresponding small change in the gate voltage at a
constant drain current.

MOSFET
Metal Oxide Semiconductor Field Effect Transistor MOSFET
The mode of operation of the MOSFET is divided into two
types.
1. Depletion Mode
2. Enhancement Mode
In depletion mode of operation the bias voltage on the gate
reduces the number of charge carriers in the channel and
therefore reduces the drain current.
In enhancement mode of operation the bias voltage on the
gate increases the number of charge carriers in the channel
and therefore increases the drain current .

CONT

DEPLETION MOSFET

DEPLETION MOSFET
Construction of an n-channel depletion MOSFET
It consists of a lightly doped p-type substrate in which two highly
doped n-region are diffused.
The two heavily doped n-regions act as the source and drain.
A lightly doped n-type channel is introduced between the two
heavily doped source and drain.
A thin layer of (1m thick) silicon dioxide is coated on the surface.
Due to SiO2 layer the gate is completely insulated from the
channel.
This permits operation with G-S or gate-channel voltages above
and below zero.
In addition, the insulating layer of SiO2 accounts for very high
input impedance of MOSFET.

CONT
BASIC OPERATION: A voltage VDS is applied between the
drain and source terminals and the gate-to source voltage is
set to zero.
Current is established from drain to source similar to JFET.
Like in JFET, the saturation drain current I DSS flows during
pinch-off and it is labelled as IDSS.
If the negative voltage is applied to gate with respect to
source then holes are induced in the channel.
These holes recombine with electrons and reduce the number
of free electrons in the n-channel available for conduction.
The more negative the bias, lesser the number of free
electrons in the channel.

CONT
Since the negative voltage of the gate depletes the
channel, the device is referred to as a depletion
MOSFET.
If a positive voltage is applied to gate with respect to
source then the electrons are induced in the channel.
The induced electrons constitute additional current from
source to drain.
If we increase VGS more in positive direction more number of
electrons are induced and hence the drain current increases.
The mode in which the MOSFET operates for positive
values of gate-to-source voltage is known as
enhancement mode.

CHARACTERISTICS OF DEPELTION MOSFET

ENHANCEMENT MOSFET

CONT
Enhancement MOSFET consists of a p-type substrate and
two heavily doped n-regions that act as source and
drain.
The SiO2 layer is present to isolate the gate from the
region between the drain and source.
The source and drain terminals are connected through
metallic contacts to n-doped regions.
Enhancement MOSFET does not contain diffused channel
between the source and drain.
When the drain is made positive with respect to source
and no potential is applied to gate, due to absence of the
channel, a small drain current flows.

CONT
If we apply a positive voltage to the gate with respect to
source and substrate, negative charge carriers are induced in
the substrate.
The negative charge carriers which are minority carriers in
the P-type substrate from an inversion layer.
As the gate potential is increased more and more negative
charge carriers are induced.
These negative carriers that are accumulated between
source and drain constitute an n-type channel.
Thus a drain current flows from source to drain through the
induced channel.
The magnitude of the drain current depends on the gate
potential.

CONT
Since the conduction of the channel is enhanced by the
positive bias voltage on the gate the device is known as
enhancement MOSFET.
DRAIN CHARACTERISTICS:
The current IDSS for VGS = 0 is very small of the order of
Nano amperes.
Note that the drain current increases with positive
increases in gate source bias voltage.

CHARACTERISTICS

CONT
The n-channel enhancement MOSFET requires a positive
gate to source voltage for its operation.
Since the drain current is zero for VGS=0, the IDSS is zero
for this device.
As VGS is made positive the current ID increases slowly at
first and then more rapidly with an increase in VGS.
The gate source voltage at which there is significantly
increase in drain current is called the threshold voltage
(VT) or VGS(th).
The equation for transfer characteristics is
ID = k(VGS VGS(th))2

DUAL-GATE MOSFET

CONSTRUCTION
The operation of conventional MOSFET is limited at high
frequencies by its high gate-to-channel capacitance.
The meta plate used for the gate is a conductor.
The silicon dioxide between the gate and channel is a
dielectric layer. Since the channel itself is considered a
conductor, the combination of the three forms a capacitor.
In a dual-gate MOSFET, two gate terminals are provided
as compared to a conventional single-gate MOSFET.
A dual-gate MOSFET uses two gates to reduce the overall
high gate-to-channel capacitance at high frequencies.
The voltages at both the gate terminals control the flow of
current through the MOSFET.

CONT
The device is normally wired so that the two gates are in
series.
Here, the N+ region in the middle acts as drain
forMOSFET-1 and source for MOSFET-2.
When the dual-gate MOSFET is used as two series
MOSFETS, the effect is similar to connecting the two
gates in series, the overall capacitance is reduced.

OPERATION
In the N-channel dual-gate MOSFET, the voltages at both
the gate terminals control the flow of current.
When the voltages applied to the gate terminals such as
gate-1 and gate-2 are greater than the threshold
voltage, a channel is formed between the corresponding
source and drain.
When the gate voltage of either of the two gate
terminals is made negative, the drain current decreases.
The drain current gets enhanced when the gate voltage
applied to both gate terminals (gate-1 and gate-2) are
made positive.

APPLICATIONS
Mixers
Demodulators
Cascade amplifiers
RF amplifiers
AGC amplifiers

INPUT CHARACTERISTICS
To determine the input characteristics, VEC is kept at a
suitable fixed value.
The base-collector voltage VBC is increased in equal steps
and the corresponding increase in IB is noted.

CURRENT AMPLIFICATION
FACTOR

In a transistor amplifier with AC input signal, the ratio of


change in output current to the change in input current is
know as the current amplification factor.
In the CB configuration the current amplification factor,
In the CE configuration the current amplification factor,
In the CC configuration the current amplification factor,

UNIJUNCTION TRANSISTOR (UJT)


UJT is a three terminal semiconductor switching device.
It consists of lightly doped n type silicon slab/bar to
which aluminium rod is alloyed at the one end with a p
type materials, forming a p-n junction.
At the other end
of slab, two base
contacts B1 and
B2 are attached.
The
third
terminal emitter
E is taken out
from aluminium

CONT

It has only one p-n junction hence called unijunction.

The p-n junction can be treated as a diode D while


internal resistances of two bases are denoted as R B1 and
RB2. The resistance RB1 is greater than RB2.
When emitter diode is not conducting, the resistance
between two bases is called interbase resistance
given by RBB = RB1+RB2.
When IE = 0, then the voltage drop across RB1 is given by,
Therefore VRB1 = = VBB
= FOR IE=0 =

typical value of = 0.56 to 0.75

Where = Intrinsic stand off ratio

WORKING OF UJT
The supply voltage
VBB is connected
between B1 and B2
while
variable
emitter voltage VE is
applied to emitter.
The VE is used to
forward bias the
diode.
The
drop
across diode is VD.
The potential of A is
decided by and is

CONT

Case 1 : VE < VA
As long as VE is less than VA, the p-n junction is reverse biased.
Hence emitter current IE will not flow. This UJT is said to be OFF.
Case 2 : VE > VP
The diode drop VD is generally between 0.3 to 0.7 V. Hence we can
write,

VP = VA + VD = VBB +VD

When VE become equal to or greater than VP the p-n junction


becomes forward biased and current I E flows.
Due to this the charge carriers are injected in the R B1 region of the
bar.
Due to these additional charge carriers, the conductivity of the R B1
region increases i.e resistance and due to which the drop across it
also decreases.

CONT

This make the p-n junction more forward biased which


further increases the current and more charge carriers
are injected.
The current IE is increases to a value determined by the
source resistance.
Under these conditions, the UJT is said to be ON and
remains in this condition till the input is open or the
current IE gets reduced to very low value.

UJT CHARACTERISTICS

1. Cut-off region : The emitter


voltage VE is less than VP and the
p-n junction is reverse biased. A
small
amount
of
reverse
saturation
current
IE0
flow
through the device, which is
negligibly small of the order of
This condition remains till the
peak point.
2. Negative resistance region :
when the emitter voltage VE
becomes equal to VP the p-n
junction become forward biased
and IE starts flowing. The voltage
across the device decreases in
this region, thought the current
through the device increases.

UJT CHARACTERISTICS
3. Saturation region: Increase in IE further valley point
current IV drives the device in the saturation region. The
voltage corresponding to valley point is called valley point
voltage VV. In this region, further decrease in voltage does
not take place. The characteristics is similar to that of a
semiconductor diode, in this region.
The active region i.e. negative resistance region, the holes
which are larger in number on p-side, get injected into n-side.
This cause increase in free electrons in the n-type slab. This
increase the conductivity i.e. decrease the resistivity. Hence
the resistance RB1 decreases in this region.
As the VBB increases, the potential VP corresponding to peak
point will increase.

APPLICATIONS
The various applications of UJT are,
1. Triggering of other devices like SCR.
2. In a sawtooth waveform generator.
3. In a relaxation oscillator.
4. In timing circuits.
5. In automobile ignition circuits.

UJT RELAXATION OSCILLATOR


For generating sawtooth waveform.
It consists of a UJT and a capacitor C
which is discharged through R as the
supply voltage VCC or VBB is
switched ON.
The voltage across the capacitor
increases exponentially and when the
capacitor voltage reaches the peak
point voltage Vp, the UJT starts
conducting and the capacitor voltage
is discharged rapidly through EB1 and
R1.
After the peak point volatge of UJT is
reached,
it
provides
negative
resistance to the discharge path
which is useful in the working of the
relaxation oscillator.

SCR / Thyristor
Circuit Symbol and Terminal Identification

ANODE

GATE

SCR
2N3668

CATHODE

SCR / Thyristor
Anode and Cathode
terminals as conventional
pn junction diode
Gate terminal for a
controlling input signal

ANODE

GATE

SCR
2N3668

CATHODE

SCR/ Thyristor
An SCR (Thyristor) is a controlled rectifier (diode)
Control the conduction under forward bias by applying a
current into the Gate terminal
Under reverse bias, looks like conventional pn junction
diode

SCR / Thyristor
Anode

4-layer (pnpn) device


Anode, Cathode as for a
conventional pn junction
diode
Cathode Gate brought out
for controlling input

N
Gate
P

Cathode

ANODE Circuit
Equivalent
ANODE

P
Q1

N
GATE

BJT_PNP_VIRTUAL

Q2

P
GATE
BJT_NPN_VIRTUAL

N
CATHODE

CATHODE

Apply Biasing
Variable
50V

With the Gate terminal


OPEN, both transistors are
OFF. As the applied
voltage increases, there will
be a breakdown that
causes both transistors to
conduct (saturate) making
IF > 0 and VAK = 0.

IF

ANODE (A)

Q1

IC2=IB1

BJT_PNP_VIRTUAL

GATE (G)

IC1 = IB2

Q2

BJT_NPN_VIRTUAL

VBreakdown = VBR(F)

IF
CATHODE (K)

Volt-Ampere Characteristic
IF

Holding Current IH

VBR(F)

VAK

Breakdown Voltage

Apply a Gate Current


For 0 < VAK < VBR(F),

Variable
50V

Turn Q2 ON by applying a
current into the Gate

IF

ANODE (A)

Q1

This causes Q1 to turn ON, and


eventually both transistors
SATURATE
VAK = VCEsat + VBEsat

BJT_PNP_VIRTUAL

GATE (G)

VG
If the Gate pulse is removed, Q1
and Q2 still stay ON!

IC2 = IB1

IB2

Q2

BJT_NPN_VIRTUAL

IF
CATHODE (K)

How do you turn it OFF?


Cause the forward current to fall below the value if the
holding current, IH
Reverse bias the device

SCR Application Power Control


XSC1
G
A

R
25kOhm
Key = a
Vs
170V
120.21V_rms
60Hz
0Deg

60%

When the voltage across


the capacitor reaches the
trigger-point voltage of
the device, the SCR turns
ON, current flows in the
Load for the remainder of
the positive half-cycle.

D1
2N1776

Rload
15ohm

C
0.01uF

Current flow stops when


the applied voltage goes
negative.

Input / Output Voltages

Look at the LOAD Current

Conduction time Conduction Angle = 180 -


Firing time Firing Angle ()

Average Load Current

1 V

sin td(t)

2 R
V

(1 cos )
2 R

L ,AVE

LOAD

L ,AVE

tan (RC )
1

TRIODE AC SWITCH (TRIAC):


The TRIAC is another important member of the thyristor family.
It is basically two parallel SCRs turned in opposite directions,
with common gate terminal.

Note: It is a bidirectional device and can conduct in both the


directions.
The TRIAC, is thus, a bidirectional thyristor with three terminals.
It is widely used for the control of power in ac circuits.
The two main electrodes are called main terminals MT1 and
MT2 while common control terminal is called gate G. The gate
terminal is near MT1.
The traic can be turned ON by applying either a positive or
negative voltage to the gate G with respect to the main terminal
MT1.

WORKING OF TRIAC

CONT
With gate open, either MT1 is positive with respect to MT2
or MT2 is positive with respect to MT1.
Forward blocking region: when gate is open and MT2 is
positive with respect to MT1 but the voltage is less than
forward breakdown voltage then triac does not conduct. This
region is called forward blocking region. If this voltage is
increased beyond breakdown voltage, the triac conducts in
the forward direction.
Reverse blocking region: when gate is open and MT2 is
negative with respect to MT1 but the voltage is less than
breakdown voltage then triac does not conduct. This region is
called reverse blocking region. But note that if this voltage is
increased beyond the breakdown voltage, triac conducts in
reverse direction.

In forward or reverse blocking, now if gate is made positive


or negative with respect to MT1 then also the triac
conducts. This is the gate control of triac and easy way of
switching triac ON.
Note: when MT2 is positive and MT1 is negative, triac is
forward biased while when MT1 is positive and MT2 is
negative, triac is reverse biased.
Operation modes of triac: In each biased state, gate can
be positive or negative.
Four different operating modes of triac.
Mode 1: In this mode triac is forward biased and gate is
made positive with respect to MT1. The terminal MT2 is
positive with respect to MT1 as triac is forward biased.

In this arrangement the breakdown occurs as a normal SCR.


The gate current is positive and the triac is said to be
operating in the first quadrant of its V-I characteristics.
Hence this mode is also called I + mode of operation.
Mode 2: In this mode, triac is forward biased and gate is
made negative with respect to MT1. In this arrangement also
the breakdown occurs as a normal SCR.
The sensitivity to gate current is less in this mode. The gate
current is negative but triac still operates in first quadrant
of its V-I characteristics.
Due to negative gate, this mode is also called I - mode of
operation.

Mode 3: In this mode, triac is reverse biased i.e MT1 is


positive with respect to MT2 and the gate is made positive.
The gate current initiates the conduction and due to
regenrative action, the triac is turned ON .
In this mode, direction of main SCR i.e triac current
reverses compared to mode 1 and 2 and the polarities of
voltage between MT1 and MT2 are also reversed compared
to mode 1 and 2 hence triac operates in third quadrant of
its V-I characteristics. But due to positive gate, it is called
III+ mode.
Mode 4: In this mode, triac is reverse biased but gate is
made negative.

In this mode, gate current is negative and due to


regenerative action, the triac starts conducting.
Compared to III+ mode, in this mode only gate current
direction is reversed. Hence this mode is called III- mode.
The triac operation is in the third quadrant of its V-I
characteristics. In this mode triac is more sensitive than
III+ mode.

CHARCTERISTICS OF TRIAC

Advantages of the TRIAC:

The TRIAC has the following advantages:

1. It conducts in both the directions hence power control in


both the half cycles is possible.
2. Triac turns off when voltage is reversed, no external
circuit is required to turn off.
3. Single gate
directions.
4. Triacs with
available.

controls
high

the

voltage

5. More economical than SCR.

conduction
and

current

in

both

the

ratings

are

Disadvantages of the TRIAC:

1. Not suitable for d.c. power applications.

2. Gate has no control over the conduction when triac is


on.
3. Triacs have very small switching frequencies.
4. Power rating is less than SCR.
5. The reliability is less than SCR.
6. Low dv/dt and di/dt rating than SCR hence accidental
turning on due to high dv/dt of source voltage is
possible.

Applications of the TRIAC


1. Static a.c. switching of applications.
2. In a three position static switch.
3. A.C. power flashers.
4. Heater controllers or temperature controllers
5. As a triggering device for SCRs.
6. Light dimmer circuits.
7. The power control to the load.
8. Proximity detector circuit.
9. A.C. voltage stabilizers.

DIAC (DIODE AC SWITCH)


DIAC is a three layer, two
terminal
semiconductor
device. MT1 and MT2 are the
two main terminals which
are interchangeable.
It acts as a bidirectional
Avalanche diode. It does not
have any control terminal.
It has two transistor, the
central layer is free from any
connection
with
the
terminals.
From the characteristics of a
DIAC, it acts as a switch in
both directions.
As the doping level at the
two ends of the device is the

During the positive half cycle, MT1 is positive with respect to


MT2 whereas MT2 is positive with respect to MT1 in the
negative half cycle.
At voltage less than the breakdown voltage, a very small
amount of current called leakage current flows through the
device and the device remains in OFF state.
When the voltage level reaches the breakdown voltage, the
device start conducting and it exhibits negative resistance
characteristics. i.e current flowing in the device starts
increasing and the voltage across it starts decreasing.
The DIAC is not a control device. It is used as triggering
device in TRIAC phase control circuits used for light dimming,
motor speed control & heater control.

I-V characteristics of the DIAC:

Light Emitting
Diode: LED

What is an LED?
Light-emitting diode
Semiconductor
Has polarity

LED: How It Works


When current flows
across a diode

Negative electrons move one


way and positive holes move
the other way

LED: How It Works


The wholes exist at
a lower energy
level than the free
electrons

Therefore when a free electrons


falls it losses energy

LED: How It Works


This energy is
emitted in a form
of a photon, which
causes light

The color of the light is


determined by the fall of the
electron and hence energy level
of the photon

Inside a Light Emitting Diode

1. Transparent
Plastic Case
2. Terminal Pins
3. Diode

Kinds of LEDs

How to Connect a LED:


Requires 1.5~2.5V and 10 mA
To prevent overloading, use resistor 470

How to Connect a LED:

Connect LED to BS2


LED is on when P0
is high

LED is on when P1
is low

Connect Multiple LEDs to BS2


8 LEDs are connected to BS2 each I/O pin
(P0-P7) is allowed to sink 6.25mA

Case Study: Blinking LED

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