MOSFET I-Vs

ECE 663

Operation of a transistor
VSG > 0
n type operation
VSG
Gate
Insulator
More
electrons

Source Channel
Substrate

Positive gate bias attracts electrons into channel

Channel now becomes more conductive

VSD
Drain

Some important equations in the

inversion regime (Depth direction)
Gate
Insulator

VT = ms + 2B + ox
ox = Qs/Cox

Source Channel

Qs = qNAWdm
Wdm = [2S(2B)/qNA]
VT = ms + 2B + [4SBqNA]/Cox

Qinv = -Cox(VG - VT)

Substrate

Drain

MOSFET Geometry
VG
Z
VD

D
z
y

x
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How to include y-dependent potential

without doing the whole problem over?

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Assume potential V(y) varies slowly along

channel, so the x-dependent and y-dependent
electrostats are independent
(GRADUAL CHANNEL APPROXIMATION)

i.e.,
Ignore Ex/y
Potential is separable in
x and y
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How to include y-dependent potentials?

VG = S + [2SSqNA]/Cox
S = 2B + V(y)
Need VG V(y) > VT to invert
channel at y (V increases
threshold)
Since V(y) largest at drain end, that
end reverts from inversion to
depletion first (Pinch off)
SATURATION [VDSAT = VG VT]

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So current:
j = qninvv = (Qinv/tinv)v
I = jA = jZtinv = ZQinvv
Qinv = -Cox[VG VT - V(y)]

v = -effdV(y)/dy

ECE 663

So current:
I = eff ZCox[VG VT - V(y)]dV(y)/dy

Continuity implies Idy = IL

I = eff ZCox[(VG VT )VD- VD2/2]/L

ECE 663

But this current behaves like a parabola !!

I = eff ZCox[(VG VT )VD- VD2/2]/L

ID

IDsat

VDsat

VD

We have assumed inversion in our model (ie, always above pinch-off)

So we just extend the maximum current into saturation
Easy to check that above current is maximum for V Dsat = VG - VT
Substituting, IDsat = (CoxeffZ/2L)(VG-VT)2

ECE 663

Whats Pinch off?

V0G

V0G

VG

VG

VD

Now add in the drain voltage to drive a current. Initially you get
an increasing current with increasing drain bias
When you reach VDsat = VG VT, inversion is disabled at the drain
end (pinch-off), but the source end is still inverted
The charges still flow, just that you cant draw more current

W
NE

Square law theory of MOSFETs

I = eff ZCox[(VG VT )VD- VD2/2]/L,

I = eff ZCox(VG VT )2/2L,

V D > VG - V T

J = qnv
n ~ Cox(VG VT )
v ~ effVD /L

V D < VG - V T

Ideal Characteristics of n-channel

enhancement mode MOSFET

ECE 663

Drain current for REALLY small VD

Z
1 2

I D nCi VG VT VD VD
L
2

Z
I D nCi VG VT VD
L
VD VG VT

Linear operation

Channel Conductance:

I D
Z
gD
nCi (VG VT )
VD V
L
G

Transconductance:

I D
Z
gm
nCiVD
VG V
L
D

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In Saturation
Channel Conductance:

I D
gD
0
VD V
G

Transconductance:

I D sat

Z
2
nCi VG VT
2L

I D
Z
gm
nCi VG VT
VG V
L
D

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Equivalent Circuit Low Frequency AC

Gate looks like open circuit

S-D output stage looks like current source with channel
conductance
I D
I D

I D

VD V

VD

VG V

VG

i g D v d g mv g
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Equivalent Circuit Higher Frequency AC

Input stage looks like capacitances gate-to-source(gate) and

gate-to-drain(overlap)
Output capacitances ignored -drain-to-source capacitance
small

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Equivalent Circuit Higher Frequency AC

Input circuit:

i in jCgs Cgd v g j 2fCgatev g

Input capacitance is mainly gate capacitance

i out g mv g

Output circuit:

i out
gm

i in
2fCgate
gm

I D
Z
nCiVD
VG V
L
D

ECE 663

Maximum Frequency (not in saturation)

Ci is capacitance per unit area and Cgate is total capacitance
of the gate

C gate Ci ZL

F=fmax when gain=1 (iout/iin=1)

fmax

gm

2Cgate

fmax

Z
nVDCi
nVD
L

2Ci ZL 2L2
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NE

Maximum Frequency (not in saturation)

f max

max

nVD
2L2

L/v

v VD / L

(Inverse transit time)

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Switching Speed, Power Dissipation

ton = CoxZLVD/ION
Trade-off: If Cox too small, Cs and Cd take over and you lose
control of the channel potential (e.g. saturation)
(DRAIN-INDUCED BARRIER LOWERING/DIBL)
If Cox increases, you want to make sure you dont control
immobile charges (parasitics) which do not contribute to
current.
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Switching Speed, Power Dissipation

Pdyn = CoxZLVD2f
Pst = IoffVD

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CMOS
NOT gate
(inverter)

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CMOS

Vin = 1

Vout = 0

NOT gate
(inverter)

Positive gate turns nMOS on

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CMOS

Vin = 0

Vout = 1

NOT gate
(inverter)

Negative gate turns pMOS on

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So what?

If we can create a NOT gate

we can create other gates
(e.g. NAND, EXOR)

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So what?

Ring Oscillator

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So what?

More importantly, since one is open and one is shut at steady

state, no current except during turn-on/turn-off
Low power dissipation

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Getting the inverter output

ON

Gain

OFF
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I D
gD
0
VD V
G

gm

I D
Z
nCi VG VT
VG V
L
D

Whats the gain here?

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Signal Restoration

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NEW

BJT vs MOSFET
RTL logic vs CMOS logic
DC Input impedance of MOSFET (at gate end) is infinite
Thus, current output can drive many inputs FANOUT
CMOS static dissipation is low!!

~ IOFFVDD

Normally BJTs have higher transconductance/current (faster!)

IC = (qni2Dn/WBND)exp(qVBE/kT)
gm = IC/VBE = IC/(kT/q)

ID = CoxW(VG-VT) 2/L
gm = ID/VG = ID/[(VG-VT)/2]

Todays MOSFET ID >> IC due to near ballistic operation

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What if it isnt ideal?

If work function differences and oxide charges are present,
threshold voltage is shifted just like for MOS capacitor:

VT VFB

ms

2 s qN A (2 B )
2 B
Ci

Q
f
Ci

2 s qN A (2 B )
2 B
Ci

If the substrate is biased wrt the Source (VBS) the

threshold voltage is also shifted

VT VFB

2 s qN A (2 B VBS )
2 B
Ci

ECE 663

Threshold Voltage Control

Substrate Bias:

VT VFB

2 s qN A (2 B VBS )
2 B
Ci

VT VT (VBS ) VT (VBS 0)
2 s qN A
VT
Ci

2 B VBS 2 B

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Threshold Voltage Control-substrate bias

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It also affects the I-V

VG

The threshold voltage is increased due to the depletion region

that grows at the drain end because the inversion layer shrinks
there and cant screen it any more. (Wd > Wdm)
Qinv = -Cox[VG-VT(y)], I = - effZQinvdV(y)/dy
VT(y) = + 2 sqNA /Cox
= 2 B + V(y)

ECE 663

It also affects the I-V

IL = effZCox[VG (2 B+V) - 2 sqNA(2 B+V)/Cox]dV

I = (Z effCox/L)[(VG2 B)VD VD2/2

-22 sqNA{(2 B+VD)3/2-(2 B)3/2}/3Cox]

ECE 663

We can approximately include this

Include an additional charge term from the
depletion layer capacitance controlling V(y)
Q = -Cox[VG-VT]+(Cox + Cd)V(y)
where Cd = s/Wdm
Q = -Cox[VG VT - MV(y)], M = 1 + Cd/Cox

ID = (ZeffCox/L)[(VG-VT - MVD/2)VD]

ECE 663

Comparison between different models

Square Law Theory
Bulk Charge Theory

Body Coefficient

Still not good below threshold or above saturation

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Mobility
Drain current model assumed constant mobility in channel
Mobility of channel less than bulk surface scattering
Mobility depends on gate voltage carriers in inversion
channel are attracted to gate increased surface scattering
reduced mobility

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Mobility dependence on gate voltage

1 (VG VT )

ECE 663

Sub-Threshold Behavior
For gate voltage less than the threshold weak inversion
Diffusion is dominant current mechanism (not drift)

n
n(o ) n(L)
I D J D A qADn
qADn
y
L

n(0) ni e

q ( s B ) / kT

n(L) ni e

q ( s B VD ) / kT
ECE 663

Sub-threshold

qADn ni e
ID
L

B / kT

1 e

qVD / kT

q s / kT

We can approximate s with VG-VT below threshold since all

voltage drops across depletion region

qADn ni e
ID
L

/ kT

1 e

qVD / kT

q VG VT / kT

Sub-threshold current is exponential function of applied gate voltage

Sub-threshold current gets larger for smaller gates (L)
ECE 663

Subthreshold Characteristic

Subthreshold Swing

log ID

VG

ECE 663

Much of new research depends on reducing S !

Tunneling transistor

Band filter like operation

Ghosh, Rakshit, Datta

(Nanoletters, 2004)
(Sconf)min=2.3(kBT/e).(etox/m)

Hodgkin and Huxley, J. Physiol. 116, 449 (1952a)

J Appenzeller et al, PRL 04

Subthreshold slope = (60/Z) mV/decade

Much of new research depends on reducing S !

Increase q by collective motion (e.g. relay)
Ghosh, Rakshit, Datta, NL 03
Effectively reduce N through interactions
Salahuddin, Datta
Negative capacitance
Salahuddin, Datta
Non-thermionic switching (T-independent)
Appenzeller et al, PRL
Nonequilibrium switching
Li, Ghosh, Stan
Impact Ionization
Plummer

More complete model sub-threshold to

saturation
Must include diffusion and drift currents
Still use gradual channel approximation
Yields sub-threshold and saturation behavior for long
channel MOSFETS
Exact Charge Model numerical integration

Z s n
ID

L LD 0

VD s
B

e
F

np0

,V ,
p p 0
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Exact Charge Model (Pao-Sah)

Long Channel MOSFET

http://www.nsti.org/Nanotech2006/WCM2006/WCM2006-BJie.pdf
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ECE 663