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Introduction
Analysis: Example #2
Analysis: Example #3
EE10
Design: Example #1
Design: Example #2
Design: Example #3
EE10
Introduction
EE10
Models of Sequential
Q(t+1)
Comments
Q(t+1)
0
0
1
1
0
1
0
1
Q(t)
0
1
Q(t)'
No change
Reset
Set
Toggle
0
0
1
1
0
1
0
1
Q(t)
0
1
?
JK Flip-flop
D
Q(t+1)
0
1
0
1
EE10
No change
Reset
Set
Unpredictable
SR Flip-flop
Reset
Set
D Flip-flop
Comments
Q(t+1)
0
1
Q(t)
Q(t)'
No change
Toggle
T Flip-flop
Flip-flop Characteris
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Sequential Circuit A
Output function:
y = (A + B).x'
CP
Q'
A'
Q'
B'
y
Figure 1.
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Sequential Circuit A
State table
Similar to truth table.
Inputs and present state on the left side.
Outputs and next state on the right side.
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Sequential Circuit A
EE10
0
0
1
1
0
0
1
1
Output function:
y = (A + B).x'
Input
x
0
1
0
1
0
1
0
1
Next
State
A+ B+
0
0
0
1
0
1
0
1
Output
y
0
1
0
1
0
0
0
0
Sequential Circuit A
0
0
1
0
1
0
1
0
Next
State
Input
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
A+
0
0
0
1
0
1
0
1
Present
State
AB
00
01
10
11
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Output
B+
0
1
0
1
0
0
0
0
y
0
0
1
0
1
0
1
0
Next State
x=0
x=1
+ +
A B A +B +
00
00
00
00
01
11
10
10
Output
x=0 x=1
y
y
0
1
1
1
Sequential Circuit A
0
0
0
0
10
State diagram
Each state is denoted by a circle.
Each arrow (between two circles) denotes a transition of the
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Sequential Circuit A
11
Next State
x=0
x=1
+ +
A B A +B +
00
00
00
00
01
11
10
10
Output
x=0 x=1
y
y
0
1
1
1
0
0
0
0
0/0
00
1/0
0/1
01
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0/1
Sequential Circuit A
0/1
1/0
1/0
10
1/0
11
12
The part of the circuit that generates inputs to the flipflops are described algebraically by the flip-flop input
functions (or flip-flop input equations).
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13
B
C'
x
B'
C
x'
J
B
y
K Q'
CP
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14
CP
Figure 1.
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D Q
Q'
A'
D Q
Q'
B'
y
15
Analysis: Example #2
Given Figure 2, a sequential circuit with two JK flipflops A and B, and one input x.
J
x
K Q'
K Q'
Figure 2.
CP
EE10
JB = x'
KB = A'.x + A.x' = A x
Analysis: Example
16
Analysis: Example #2
JB = x'
JB = A'.x + A.x' = A x
Q(t+1)
Comments
0
0
1
1
0
1
0
1
Q(t)
0
1
Q(t)'
No change
Reset
Set
Toggle
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Present
state
A
B
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Input
x
0
1
0
1
0
1
0
1
Next
state
A+ B+
0 1
0 0
1 1
1 0
1 1
1 0
0 0
1 1
Analysis: Example
Flip-flop inputs
JA KA
JB KB
0
0
1
1
0
0
1
1
0
0
1
0
0
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
1
0
1
0
17
Analysis: Example #2
0
0
1
1
0
0
1
1
Input
x
0
1
0
1
0
1
0
1
Next
state
+
+
A
B
0
0
1
1
1
1
0
1
1
0
1
0
1
0
0
1
Flip-flop inputs
JA KA
JB KB
0
0
1
1
0
0
1
1
0
0
1
0
0
0
1
0
1
0
1
0
1
0
1
0
0
1
0
1
1
0
1
0
1
00
0
01
0
0
1
11
0
10
1
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Analysis: Example
18
Analysis: Example #3
K Q'
K Q'
CP
y
Figure 3.
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Analysis: Example
19
Analysis: Example #3
JA = B
KA = B'
State table:
Present
state
A
B
0
0
0
0
0
1
0
1
1
0
1
0
1
1
1
1
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Input
x
0
1
0
1
0
1
0
1
Next
state
A+ B+
0
0
1
1
0
0
1
1
1
0
0
1
0
1
1
0
Output
y
0
1
1
0
1
0
0
1
Analysis: Example
Flip-flop inputs
JA KA
JB KB
0
1
1
1
0
1
0
0
1
0
1
1
1
0
0
0
0
1
0
0
0
1
1
1
1
0
0
0
1
0
1
1
20
Analysis: Example #3
State diagram:
Present
state
Next
state
Input
Output
+
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
0
1
1
0
0
1
1
1
0
0
1
0
1
1
0
0
1
1
0
1
0
0
1
Flip-flop inputs
JA KA
JB KB
0
0
1
1
0
0
1
1
1
1
0
0
1
1
0
0
1
0
1
0
0
1
0
1
1
0
1
0
0
1
0
1
1/1
00
0/0
01
0/1
10
0/1
1/1
1/0
1/0
11
0/0
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Analysis: Example
21
EE10
Flip-flop Excitation
22
0
1
0
1
0
1
X
X
X
X
1
0
JK Flip-flop
0
1
0
1
0
1
0
X
X
0
1
0
SR Flip-flop
Q+
Q+
0
0
1
1
0
1
0
1
0
1
0
1
0
0
1
1
0
1
0
1
0
1
1
0
D Flip-flop
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0
0
1
1
Flip-flop Excitation
T Flip-flop
23
Design procedure:
Start with circuit specifications description of circuit
behaviour.
Derive the state table.
Perform state reduction if necessary.
Perform state assignment.
Determine number of flip-flops and label them.
Choose the type of flip-flop to be used.
Derive circuit excitation and output tables from the state
table.
Derive circuit output functions and flip-flop input functions.
Draw the logic diagram.
EE10
Sequential Circuit
24
Design: Example #1
1
01
11
0
10
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Design: Example #
25
Design: Example #1
Present
State
AB
00
01
10
11
00
1
11
01
0
10
0
Q
Q+
0
0
1
1
0
1
0
1
0
1
X
X
X
X
1
0
JK Flip-flops
excitation table.
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0
Present
state
A
B
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
Input
x
0
1
0
1
0
1
0
1
Next State
x=0
x=1
A+B+ A+B+
00
01
10
01
10
11
11
00
Next
state
A+ B+
0
0
1
0
1
1
1
0
0
1
0
1
0
1
1
0
Design: Example #
Flip-flop inputs
JA KA
JB KB
0
0
1
0
X
X
X
X
X
X
X
X
0
0
0
1
0
1
X
X
0
1
X
X
X
X
1
0
X
X
0
1
26
Design: Example #1
Block diagram.
A
Q'
Q'
CP
KA
A'
A
B
B'
What are to
go in here?
EE10
JA
KB
JB
Combinational
circuit
x
External
output(s)
(none)
External
input(s)
Design: Example #
27
Design: Example #1
Input
x
0
0
1
1
0
0
1
1
A
0
1
0
1
0
1
0
1
0
0
1
0
1
1
1
0
Flip-flop inputs
JA KA
JB KB
0
1
0
1
0
1
1
0
0
0
1
0
X
X
X
X
Bx
00
0
Next
state
A+ B+
01 11 10
1
X X
1
X
x
JB = x
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A
A
X
X
X
X
0
0
0
1
0
1
X
X
0
1
X
X
00
0 X
X
01 11
X
X
10
1
00
01 11
10
1
0
A
JA = B.x'
A
Bx
X
X
1
0
X
X
0
1
Bx
Bx
00
0 X
01 11 10
X X X
1
1
x
KA = B.x
KB = (A x)'
Design: Example #
28
Design: Example #1
JB = x
KB = (A x)'
Logic diagram:
A
Q'
Q'
CP
EE10
Design: Example #
29
Design: Example #2
Present
state
A
B
0
0
0
0
1
1
1
1
EE10
0
0
1
1
0
0
1
1
Input
x
0
1
0
1
0
1
0
1
Next
state
A+ B+
0
0
1
0
1
1
1
0
0
1
0
1
0
1
1
0
Output
y
0
1
0
0
0
1
0
0
Design: Example #
30
Design: Example #2
0
0
1
1
0
0
1
1
Input
x
0
1
0
1
0
1
0
1
Next
state
A+ B+
0
0
1
0
1
1
1
0
Output
y
0
1
0
1
0
1
1
0
0
1
0
0
0
1
0
0
Bx
00
01 11
10
1
0
A
1
x
Bx
00
0
01 11
1
1
DA(A, B, x) = m(2,4,5,6)
DB(A, B, x) = m(1,3,5,6)
y(A, B, x) = m(1,5)
A
A
Bx
00
DA = A.B' + B.x'
01 11
1
10
DB = A'.x + B'.x +
1
A.B.x'
B
10
y = B'.x
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Design: Example #
31
Design: Example #2
CP
Q'
A'
Q'
B'
y
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Design: Example #
32
Design: Example #3
Given these
Unused
state 000:
0 0 0
0
0
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X
X
Derive these
X
X
X
X
X
X
X
X
X
X
Design: Example #
X
X
X
X
X
X
X
X
33
Design: Example #3
SA = B.x
Cx
C
00
01 11
00 X
01
11 X
10 X
A
B
10
Cx
C
00
00 X
01 11
X
A
B
11 X
00 X
01 11
X
SB = A'.B'.x
A
B
10
01 X
11 X
10
X
X
X
1
10
B
A
Cx
RA = C.x'
C
00
01 11
10
00 X
01
11 X
10 X
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x
C
00
01 X
x
Cx
10
Design: Example #
RB = B.C
+ B.x'
34
Design: Example #3
Cx
C
00
00 X
01 11
X
01 1
SC = x'
11 X
A
B
10
X
10 1
Cx
C
00
01 11
00 X
01
11 X
10
x
A
B
Cx
RC = x
x
C
00
00 X
01 11
10
01
A
10
11 X
10
y = A.x
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Design: Example #
35
Design: Example #3
SB = A'.B'.x
RB = B.C + B.x'
SC = x'
RC = x
y
S
R Q'
A'
R Q'
B
B'
R Q'
CP
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Design: Example #
36
111
010
110
011
101
100
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Present
state
A2 A1 A0
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1
A2+
0
0
0
1
1
1
1
0
Next
state
A1+ A0+
0
1
1
0
1
1
0
0
0
1
1
0
1
1
0
0
Design of Synchron
Flip-flop
inputs
TA2 TA1 TA0
0
0
1
0
1
1
0
0
1
1
1
1
0
0
1
0
1
1
0
0
1
1
1
1
37
A2+
0
0
0
1
1
1
1
0
Next
state
A1+
0
1
1
0
0
1
1
0
A0+
1
0
1
0
1
0
1
0
Flip-flop
inputs
TA2 TA1 TA0
0
0
1
0
1
1
0
0
1
1
1
1
0
0
1
0
1
1
0
0
1
1
1
1
A1
A1
1
A2
1
A0
TA2 = A1.A0
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A2
A1
A2
A0
A0
TA1 = A0
TA0 = 1
Design of Synchron
38
TA1 = A0
TA0 = 1
A2
A1
A0
CP
1
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Design of Synchron
39
110
010
101
100
JA = B
KA = B
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Present
state
A B C
0 0 0
0 0 1
0 1 0
1 0 0
1 0 1
1 1 0
Next
state
+
A B+ C+
0 0 1
0 1 0
1 0 0
1 0 1
1 1 0
0 0 0
Flip-flop inputs
JA KA JB KB JC KC
0
X
0
X
1
X
0
X
1
X
X
1
1
X X
1
0
X
X
0
0
X
1
X
X
0
1
X
X
1
X
1
X
1
0
X
JB = C
KB = 1
Design of Synchron
JC = B'
KC = 1
40
JB = C
KB = 1
JC = B'
KC = 1
Q'
Q'
Q'
CP
000
001
110
010
101
EE10
111
Design of Synchron
100
011
41
Summary
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Summary
42
End of segment
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