A Seminar on

IC
By:

DEEKSHITH D P

Contents
Introduction
Structure of I2C
Communication in I2C
Standards of I2C
Features
Disadvantages
Application
Conclusion

Introduction

I square C=Inter integrated circuit

Developed by Philips semiconductors in 1980s
Synchronous bi-directional half duplex two wire serial

interface bus
To attach lower speed peripheral ICs to processors and

microcontrollers in television sets

Structure of I2C
I2C bus consist of two bus lines
1) Serial Clock (SCL)
2) Serial Data (SDA)
) SCL is responsible for generating synchronization clock

pulses
) SDA is responsible for transmitting the serial data across

the devices. SDA is bi-directional

 I2C Bus is a shared bus system to which many number of

I2C devices can be connected

Connected device either act as MASTER or SLAVE

device
Master

device

is

responsible

for

controlling

the

communication by initiating or terminating data transfer

It sends data and generates necessary synchronization

clock pulses

Slave devices waits for the command from the master and

responds upon receiving the commands

Master and Slave can act as either transmitter or receiver
But synchronization clock signal is generated by master

only
Most of the I2C Supports multi master on the same bus

I2C Bus interfacing diagram

18F242

Vdd

2.2k

Microchip 24LC515
SCL

SCL

A2

Vdd
A1
SDA

SCL clock line

2.2k
SDA

SCL

A0

A2

SDA data (bidirectional)

A1
SDA

A0

Communication in I2C
I2C Bus is IDLE when both SDA and SCL is high
1) The master device pulls the clock line(SCL) bus to high
2) The master device pulls the data line(SDA) to LOW when

the SCL line at logic HIGH ,this is the start condition for
data transfer. After start condition bus will be considered as
busy
3)

The master device sends the address (either 7bit or 10 bit)of

the slave device to which it wants to communicate over the
SDA line

The clock pulses are generated at SCL line for

synchronizing the bit reception by the slave device

The MSB of the data always transmitted first
4) The master device sends the read or write bit (Bit value=1
read operation , bit value=0 write operation) according to
the requirement
5)The master device waits for the acknowledgement bit
from the slave device whose address is sent on the bus
along with Read/Write operation command
Slave devices compares the address with address assigned
to them

6)The slave device with the address requested by the master

device responds by sending an acknowledge bit(Bit
value= 1) over the SDA line
7)Upon receiving the acknowledge bit The master device
sends the 8 bit data to the slave device over SDA line , if
the requested operation is write to device if the requested
operation is read from the device,the slave device sends
data to the master over the SDA line
8)The master device waits for the acknowledgement bit
from the device upon byte transfer complete for a write
operation and sends an acknowledge bit to the slave
device for a read operation

9)The master device terminates the transfer by pulling the

SDA line HIGH when the clock line SCL is at logic
HIGH ..this is the stop condition

Fig : Start and stop condition of I2C

Standards of I2C
I2C Bus supports three different data rates they are
1) Standard mode (data rate up to 100kbps)
2) Fast mode(data rate up to 400kbps)
3) High speed mode (data rate up to 3.4Mbps)
) The first generation I2C devices were designed to

support data rates only up to 100kbps

) The new generation I2C devices are designed to
operate at data rates up to 3.4Mbps

I2C Features
Only two bus lines are required SCL&SDA lines
SDA is bidirectional, communication is half duplex
Multiple receivers do not require separate select lines
Devices have simple master/slave relationship

Allows multi master configuration

V 0.3

15

Disadvantages of I2C
Certain ICs support the protocol and certain do not.
Open collector drivers at the master need a pull-up

resistance of 2.2 K on each line

I2C draws more power than other serial communication
due to open drain topology of the communication lines

Applications
Accessing NVRAM that keep user settings
Accessing low speed DACs and ADCs
Changing contrast , hue, and color balance settings in

monitors
Controlling OLED/LCD displays
Reading real-time clocks

Conclusion
I2C Bus is used by many integrated circuits and is simple

to implement
Any microcontroller can communicate with I2C devices
even if it has no special I2C interface
Here shows I2C master controller, where I2C master will
sends and receives data from the salve. We can say that
any low speed peripherals can be used with I2C bus. In
future multiple masters can be implemented in real time
clock domain using different arbitration and clock
synchronization techniques.