Beruflich Dokumente
Kultur Dokumente
Sephiroth Kwon
GRMA
26-05-2009
OUTLINE
+ 12
+5
5VSB
-5
PWOK
5VSB
1
GND GND
5VSB to 3VSB
Linear Reg.
Cap./
Res.
PWRBTN
3VSB
PANNEL
1/0
1
GND + 5
GND GND
PSON + 5
GND GND
- 12V + 3V
+ 3V
IT8282
+ 3V
PSON
0
PWRBTN
0
Super I/O
South
Bridge
+5
+ 12
+5
5VSB
-5
PWOK
CPU SOCKET
(2)
CPURST
GND GND
GND + 5
PG1
IDERST
GND GND
Circuit
IDE SLOT
(4)
PWROK
PSON + 5
PCIRST
(3)
GND GND
PCI SLOT
North Bridge
- 12V + 3V
+ 3V
(5)
+ 3V
Circuit
PSON
South Bridge
(1)
PWRBTN
PANNEL
GMCH
H_CPURST#
USER PRESS
CRTL+ATL+DEL
B_ATX_PWROK POWER
SUPPLY
O_PWROKO_PWROK_NB
7
7
USER PRESS
POWER BTN
O_PCIRST#_SLOT
S_PCIRST#
8
TPM
JMB363
VA6308P
VCORE
H_CPUPWRGD
9
O_PWROK
O_PWRBTN
CPU
4
S_SLPS4#
User clear
CMOS
ICH10R
S_TRCRST#
9
O_PCIRST#_PCIEX16_12 PCI_PCIEX16
O_PCIRST#_PCIEX1_123
S_SLPS3#
RSTCON#
5
O_RSMRST#
P_VRM_G
D
7
2
O_KB_RST#
O_PWRBTNIN#
EPU
User
press
Rest
button
Super I/O
6 O_PSON#
8
S_PLTRST#
LAN
PCI_PCIEX1
PCI SLOT
Power On Sequence(M3N78-VM)
14. CPU_RST#
13. PCI_RST#
CPU
12. CPU_PWROK#
13. PCIE_RST#
10. 1.2VHT_EN
MCP78
PCIE X1
9. VCORE_PG
1.RSMRST#
4.SUSC#
4.SUSB#
6. 3V
3.SIO_PWRBTN#
6. 12V
11.SIO_RST#
VRM
7.PWROK_SB
8. VCORE_EN
6. 5V
ATX
Power
5. PSON#
SIO
ITE8712F
13.PCIERST#
11. IDE_RST#
2. PWR_BTN#
PCIE X16
IDE Port
Thank You!