Timer Circuits

RC Timer Basics
RC TIMER MODES OF
OPERATION:
1. Monostable mode
2. Astable mode

Capacitor
A capacitor is an electrical component that
can temporarily store a charge (voltage).
The rate that the capacitor
charges/discharges is a function of the
capacitors value and its resistance.
To understand how the capacitor is used in
the 555 Timer oscillator circuit, you must
understand the basic charge and
discharge cycles of the capacitor.
3

Capacitor Charge
Cycle
Capacitor is initially

Equation for Charging

Capacitor

discharged.
Switch is moved to position
A.
Capacitor will charge to +12
v.
Capacitor will charge
through the 2 K resistor.

VC VFinal VInitial 1 - e

-t/RC

Initial

Where :
VC The voltage across the capacitor
VFinal The voltage across the capacitor that is fully charged
VInitial Any initial voltage across the capacitor as it begins to charge
4

Capacitor Discharge
Cycle
Capacitor is initially

charged.
Switch is moved to position
B.
Capacitor will discharge to
+0 v.
Capacitor will discharge
through the 3 K resistor.

Equation for Discharging

Capacitor
-t/RC

VC VInitial VFinal e

Where :
VC The voltage across the capacitor
VFinal The voltage across the capacitor that is fully discharged
VInitial Any initial voltage across the capacitor as it begins to discharge
5

Capacitor Charge &

Discharge

12 v
5V

VC

20 mSec

Time

0v

Switch has been at position

B for a long period of time.
The capacitor is completely
discharged.

Switch is moved to
position A. The
capacitor charges
through the 2K
resistor.

Switch is moved back to

position B. The
capacitor discharges
through the 3K
resistors.

The 555 timer is composed of 2 primary

building blocks

Two Comparator
A set/reset (SR) Flip-Flop

Because of the flexible way

these simple building blocks are
arranged in the device hundreds
of useful circuits can be built.

Comparator - a device that simply compares two input voltages.

The voltages are often referred to as the input and the

reference.

The inputs to the comparator are :

The Non-inverting input designated
with a + sign
The Inverting input designated with a
- sign
NOTE: The + and sign have
nothing to do with polarity

Comparators

are ANALOG devices with DIGITAL

outputs that can be connected to compare input
voltages in two ways:

Sense if the input voltage (+) is

greater than the reference
voltage (-) and drive the output
high otherwise the output
remains low.
Sense if the input voltage (-) is
less than the reference voltage

Flip-Flop Often we need a way for devices to

remember things. A flip-flops is a DIGITAL building

block that remembers the last thing that happened
to it. The SR (set/reset) Flip-flop can respond in two
ways:

If the SET (S) input goes high the Q

output will go high and stay high.
The Q output does the exact opposite
of the Q output.
If the RESET (R) input goes high the
Q output will go low and stay low.
The Q output does the exact opposite
of the Q output so it will be high.

MONOSTABLE RC
TIMER
or ONE-SHOT

555 for monostable

T = 1.1RC

555 for monostable

T = 1.1RC

ASTABLE RC
TIMER

What is a 555 Timer?

The 555 timer is an 8-pin IC that is
capable of producing accurate time
delays and/or oscillators.
In the time delay mode, the delay is
controlled by one external resistor
and capacitor.
In the oscillator mode, the frequency
of oscillation and duty cycle are both
controlled with two external resistors
and one capacitor.
This presentation will discuss how to
use a 555 timer in the oscillator
mode.

26

Block Diagram for a 555

Timer
Discharge (7)

Vcc (8)

Control Voltage (5)

Threshold Voltage (6)

COMP2

Flip-Flop
RESET

SET

T1

Output (3)

Trigger Voltage (2)

COMP1

Ground (1)

Reset (4)

27

Comparator
The comparator is an operational
amplifier (op-amp) configuration.
The comparator compares 2 analog
voltages and provides a digital output.
+
If V+ > V-, the output is a digital 1

If V- > V+, the output is a digital 0

555.28

Reference and Comparators

A 3-resistor voltage
divider provides
reference voltages

The Comparators
provide digital logic to
an SR Latch

Comparators compare voltage

levels.
If + is higher, output = 1
If - is higher, output = 0
555.29

Reference and Comparators

Pin 8: Vcc
connection

Pin 6: Threshold
connection (high
Comparator)

Pin 5: Control
connection, used
with filter cap.

Pin 1: Gnd
connection

Pin 2: Trigger
connection (low
Comparator)

555.30

Schematic of a 555 Timer in Oscillator

Mode
5 Volts

RA
Discharge

RB

N/C

3.333 V

Output

1.666 V

Threshold /
Trigger

C
Ground

N/C

33

Schematic of a 555 Timer in Oscillator

Mode
5 Volts

RA
Discharge

N/C

RB

Output

Threshold /
Trigger

C
Ground

N/C

34

555 Timer Design Equations

tHIGH : Calculations for the Oscillators HIGH Time
THE OUTPUT IS HIGH WHILE THE
CAPACITOR IS CHARGING THROUGH RA
+ RB.
5v
3.333 v

Vc

1.666 v
0v

tHIGH

HIGH

Output
HIGH

0.693 R A RB C
LOW

35

555 Timer Design Equations

tLOW : Calculations for the Oscillators LOW Time
THE OUTPUT IS LOW WHILE THE
CAPACITOR IS DISCHARGING THROUGH
RB.
5v
3.333 v

Vc

1.666 v
0v

Output
LOW

tLOW

0.693R BC

HIGH

LOW

36

555 Timer Period / Frequency /

DC
Period:

Duty Cycle:

t HIGH 0.693 R A RB C

DC

t HIGH
100%
T

DC

0.693 R A RB C
100%
0.693 R A 2RB C

DC

R
R

t LOW 0.693 RBC

T t HIGH t LOW
T 0.693 R A RB C 0.693 RBC
T 0.693 R A 2RB C

RB
100%
2RB

Frequency:
F
F

1
T
1

0.693 R A 2RB C

37

Example: 555 Oscillator

Example:
For the 555 Timer oscillator shown below, calculate the
circuits, period (T), frequency (F), and duty cycle (DC).

38

Example: 555 Oscillator

Solution
:

R A 390

RB 180

C 6.8 F

Period:

T 0.693 R A 2RB C

T 0.693 390 2 180 6.8 F

T 3.534 mSec
Frequency:

1
F
T
1
F
3.534 mSec
F 282.941 Hz

Duty Cycle:

R R 100%
R 2R
390 180 100%
DC
390 2 180
DC

DC 76%

39

Example: 555 Oscillator

Example:
For the 555 Timer oscillator shown below, calculate the
value for RA & RB so that the oscillator has a frequency of
2.5 KHz @ 60% duty cycle.

40

Example: 555 Oscillator

Solution
: Frequency:

Duty Cycle:

1
1

400 Sec
f 2.5 kHz
T 0.693 R A 2RB C 400 Sec
T

T 0.693 R A 2RB 0.47 f 400 Sec

R A 2 RB

400 Sec
1228.09
0.693 0.47 f

R A 2 RB 1228.09

DC

R
R

R
R

RB
100% 60%
2RB

RB
0 .6
2RB

R A RB 0.6 R A 2RB
R A R B 0. 6 R A 1 . 2 R B
0 .4 R A 0 . 2 R B
R A 0 .5 R B

Two Equations & Two Unknowns!

41

Example: 555 Oscillator

Solution
: Frequency:

Duty Cycle:

R A 2 RB 1228.09

R A 0 .5 R B

Substitute and Solve for RB

R A 2 RB 1228.09
0.5 RB 2 RB 1228.09
2.5 RB 1228.09
RB 491.23
Substitute and Solve for RA

R A 2 RB 1228.09

R A 2 491.23 1228.09
R A 982.472 1228.09
R A 245.618
42

555 Timer Design Equations

tHIGH : Calculations for the Oscillators HIGH Time

VInitial 1 - e RC VInitial

VC VFinal

RC
2
1

1
e

31 VCC
3
3
CC
CC
CC

VCC VCC 1 - e RC 31 VCC

t
2
1

3 VCC 3 VCC

RC

1
e

2
V

3
CC
t

2
3

2
3

1 - e RC

1
2

1 - e RC

1
2

21 e

t
RC

1
ln 2 ln e RC

t
0.693
RC
t HIGH 0.693 R C
t

t HIGH 0.693 R A RB C
43

555 Timer Design Equations

tLOW: Calculations for the Oscillators LOW Time
VC VInitial

VFinal e RC

RC
1
2

3
3
CC
CC

RC
1
2

e
3
3

CC
CC

t
1

3 VCC

RC

2
V

3
CC
t

e RC

1
2

1
ln 2 ln e RC

t
0.693
RC
t LOW 0.693 R
t

t LOW 0.693 RBC

e RC

1
2

44

Animated Slides
The following slides contain
animations to demonstrate the
operations of:
555 as an astable: charge cycle
555 as an astable: discharge
cycle
555.47

+ <> -

0
1

10

01

- <> +

10
Vc

Capacitor
Ra and Rb
Latch
in aCharges
set
statevia
Q
is
low;
Q
output
is
high
Capacitor
continues
to
charge
Lower
comparator
provides
low.
Upper
comparator
+
input
islogic
greater
Latch
receives
a reset
state
Q
is
high;
Q
output
is
low
Transistor
is
on
and
a
connection
to
Capacitor
to discharge
Latch
in hold
state.
than
2/3
Vccbegins
reference
ground is made.
Animated charge cycle

555.48

- >< +

1
0
01

10

+ <> -

10

Vc

Capacitor
is discharging.
Q output
is
Upper
comparator
++voltage
less
than
Latch
in
a
hold
state.
Lower
comparator
voltage
is
Latch
is set.
Q is low.
low.
Q
output
isishigh.
reference
voltage.
Transistor
Capacitor begins to
greater than off.
voltage.
charge.
Animated discharge cycle

555.49

Design Exercises
1. Using a 555 timer, design an
oscillator with an output of 6Hz with
a duty cycle of 60%. Use a 100F
capacitor.

2. Using a 555 timer, design an

oscillator with an output of 10KHz
with a duty cycle of 50%. Use a
3.3F Capacitor.

555.50

Schematic of a 555 Timer in Oscillator

Mode
5 Volts

RA
Discharge

N/C

RB

Output

Threshold /
Trigger

C
Ground

N/C

52