CAN Protocol

At HCL
CAN (Controller Area Network)

CAN Fundamentals

CAN Physical Layer

CAN Data Link Layer

CAN Fundamentals

How it all began

User benefits

Overview
How it all began
(before introduction of CAN)
Pictorial view of Point to point wiring connections
How it can be better
(CAN Network)
One serial bus connecting all control systems
Why CAN
Advantages of CAN, to list a few:

CAN is of low cost. Serial bus with two wires: good

price/performance ratio.

CAN is fast and flexible. Maximum data rate is 1MBits/s @40m bus
length

CAN provides reliable operation in the EMI environment of a

vehicle due to differential signals (will be explained later)

CAN provides high reliability transmission due to Sophisticated

error detection and error handling

CAN supports broadcast capability

CAN is internationally standardized by the International

Standardization Organization (ISO) and the Society of Automotive
 Overview
Specified by Robert Bosch Industrial
CAN
GmbH, Germany
Spec
ISO/OSI Automotive
SAE
Distributed Controls

CAL, CANopen (CiA),

7 Application Layer DeviceNet (ODVA),
SDS (Honeywell)
...

}
2 Data Link Layer
CAN
1 Physical Layer

Protocols Similar to CAN: A-BUS, VAN (Vehicle Area Network)

 Basic Concepts

Multi Easy
CAN
master connectio
Nodes
Concept n/
disconnec
Node A Node n
Number of tion
nodes e.g. e.g. of nodes
not limited ABS Dash-
by protocol board

Broadcast
No node capability
addressing,
Message CAN-Bus Event
identifier (logical) driven
specifies system
content &
priority
 Basic Concepts

Node A Node n
Sophisti-
Application e.g. ABS e.g. Dash- cated
board Error
e.g. Detection
e.g.
Host-Controller 80C166 C167CR /
or C515C Handling

CAN-Controller 81C9x CAN NRZ

Code +
CAN-
Bit
Transceiver
Stuffing
CAN_H UDiff
120 120 for
CAN-Bus Synchroniza
Ohm Ohm
CAN_L EMI 40m / 130 ft tion
@ 1 Mbps
Bus
access via
Standardization Issues

CAN
High
Speed
bit rate / kbps CAN
ISO-IS
Low
11898
Speed
ISO-IS
1000 11519-2 Engine
Class C management,
125 Gearbox, ABS
Class B dashboard,
diagnostics
10
Class A body
control
Real-time capability
CAN Protocol Versions

Two CAN protocol versions available:

V2.0A (Standard) - 11 bit Message IDs
- 2048 IDs available

Start of Identifier Control Data Field CRC ACK End

Frame 11 bits Field (0..8 Bytes) Field Field of Frame

V2.0B (Extended) - 29 bit Message IDs

-Start
more of
than 536 millions IDs available
Data Field CRC ACK End
Identifier Control
Frame 29 bits Field (0..8 Bytes) Field Field of Frame
CAN Protocol Versions (Cont.)

Three Types of CAN Modules available

2.0A - Considers 29 bit ID as an error
2.0B Passive - Ignores 29 bit ID messages
2.0B Active - Handles both 11 and 29 bit ID Messages

Frame with Frame with

11 bit ID 29 bit ID Note:

V2.0B Active Care must be

CAN Module Tx/Rx OK Tx/Rx OK taken when
mixing protocol
versions !
V2.0B Passive
CAN Module Tx/Rx OK Tolerated

V2.0A CAN
Module Tx/Rx OK Bus ERROR
Basic CAN Controller

CAN
Status/Control
Registers

low high
Host
CPU
CAN
Bus Protocol
Host CPU load
Controller Transmit
Inter-
Bus Interface

Buffer
face Tx Rx
Acceptance Receive
Filtering Buffer(s)

Only used in CAN networks with very low baud rates and/or
very few messages
Full-CAN Controller

Status/Control
CAN CAN Registers
Bus Protocol
Controller Message
Host
Inter-
Bus Interface

Object 1
face low high

Acceptance Message
Filtering Object 2 CPU load

...
Host CPU
Message
Object n
Receive
Buffer(s)
CAN Controller
An Example: Freescale S12

MSCAN: Multi-scalable Controller Area Networks

CAN (Controller Area Network)

CAN Fundamentals

CAN Physical Layer

CAN Data Link Layer

CAN Physical Layer

ISO-IS 11898 CAN Bus (there exists more than one physical
layer standard)
Bit Levels / Bit Representation

Bit Stuffing

Bit Timing / Bit Construction

Synchronization
Physical Layer according to
ISO-IS 11898
CAN
Node 1 Node 30 High
Speed
ISO-IS
11898
...

CAN Bus CAN Bus

Driver Driver
40 m / 130 ft 0.3 m / 1 ft
CAN_H @ 1 Mbps @ 1 Mbps
120 120
Ohm Ohm
CAN_L
 Relation between Baud
Rate and Bus Length
Up to 1Mbit / sec @40m bus length (130 feet)

1000
500
Bus lines
assumed to be
200 an electrical
medium
100
Bit Rate (e.g.twisted
50 pair)
[kbps]
20
10
5

0 10 40 100 200 1000 10,000

CAN Bus Length [m]

Bus Levels according to ISO-IS
11898

CAN
High
V Recessive Dominant Recessive Speed
ISO-IS
5
11898
4 UCAN_H
3.5 V
3
2.5 V
2 Udiff= 2V
1.5 V
1 UCAN_L
CAN and EMI
The usual CAN-realization is insensitive to electromagnetic interference

V
Node A Node B Node C
CAN_H

Udiff =2V
CAN_L
t
CAN_H
120 120
Ohm Ohm
CAN_L EMI CAN-Bus
 Why 120 Ohm terminations
Needed to limit wave reflection at high frequency in electronically
harsh environments. If not terminated there could be miss-matched
impedances

For details read through Basic wave mechanics and Transmission Line
theory
Basic Concepts -Message Coding

Message Coding: NRZ-Code

Signal to Signal to
transmit a 0 transmit a 1
HIGH HIGH
LOW LOW

1
0
0 1 0 ...
 Basic Concepts -Bit Stuffing
Bit Stuffing ensures enough recessive to dominant edges (also needed
due to limitation of NRZ)
Stuff Bit inserted after 5 consecutive bits at the same state
Stuff Bit is inverse to previous bit
De-Stuffing done at receiver

1 2 3 4 5 6 7 8 ... 1 2 3 4 5 6 7 8 ...

data stream
Nr. of
consecutive
bits with
Stuff Stuff Stuff
same polarity
Bit Bit Bit
bit stream

1 2 3 4 5 1 2 3 4 51 2 3 4 5
Bus Synchronization
Hard Synchronization at Start Of Frame bit

Intermission / SOF ID10 ID9 ID8 ID7

Idle
All nodes synchronize on
leading edge of SOF bit
(Hard Synchronization)

Re-Synchronization on each recessive to dominant edge

Re- Re- Re- Re-

synch synch synch synch
Bus Synchronization -Bit
Construction
4 Segments, 8-25 Time Quanta (TQ) per bit time
CAN Baud Rate (= 1 Bit /Time) programmed by selection of
appropriate TQ length + appropriate number of TQ per bit
Sampling after segment 3

CAN frame
1 Bit Time
1 2 3 4

1 Time Sample
Quantum Point
Bus Synchronization -
Synchronization Segment
1 Bit Time
1

Transmit Synchronization Segment

Point

Next bit is output at start of this segment

(Transmit only)
Bus State change (if any) expected to occur within this
segment by the receivers
Fixed length of 1 Time Quantum
Bus Synchronization -
Propagation Segment
1 Bit Time
2

Propagation Time Segment

Allows for signal propagation

(across network and through nodes)
Programmable length (1..8 Time Quanta)
Bus Synchronization -
Phase Buffer Segment 1

1 Bit Time
3

Phase Buffer Sample

Segment 1 Point

Allows for lengthening of bit during Re-synchronization

Bus state is sampled at the end of this segment
Programmable length (1..8 Time Quanta)
Bus Synchronization -
Bit Lengthening
Needed Sample Point
tq
Phase Phase Next
Sync- Propagation Buffer Buffer Sync-
Segment Time Segment Segment 1 Segment 2 Segment
Transmitter
(slower)

next edge for Re-synchronization delayed by 1 TQ ...

Phase Phase Next
Sync- Propagation Buffer Buffer Sync-
Segment Time Segment Segment 1 Segment 2 Segment
Receiver
(faster)

expected Sample Point

Bus Synchronization -
Bit Lengthening (cont.)

tq Needed Sample Point

Phase Phase Next
Sync- Propagation Buffer Buffer Sync-
Transmitter Segment Time Segment Segment 1 Segment 2 Segment
(slower)

Phase Buffer Segment 1 lengthened by 1 TQ

Phase Phase Next

Sync- Propagation Buffer Buffer Sync-
Segment Time Segment Segment 1 Segment 2 Segment
Receiver
(faster)

New Sample Point

Bus Synchronization -
Phase Buffer Segment 2

1 Bit Time
4

Sample Phase Buffer

Point Segment 2

Allows for shortening of bit during Re-synchronization

Programmable length (1..8 Time Quanta)
Bus Synchronization -
Bit Shortening
bit n+1
Needed Sample
bit n
Point for bit n+1

Phase Buffer Phase Buffer Sync- Propagation Phase Buffer Phase Buffer Sync-
Segment 1 Segment 2 Segment Time Segment Segment 1 Segment 2 Segment

Transmitter
(faster) next edge for Re-synchronization is 1 TQ too early...

Phase Buffer Phase Buffer Sync- Propagation Phase Buffer Phase Buffer Sync-
Segment 1 Segment 2 Segment Time Segment Segment 1 Segment 2 Segment

Receiver
(slower) tq expected Sample Point
for bit n+1
 Bus Synchronization -
Bit Shortening (cont.)
bit n bit n+1 Needed Sample
Point for bit n+1

Phase Buffer Phase Buffer Sync- Propagation Phase Buffer Phase Buffer Sync-
Segment 1 Segment 2 Segment Time Segment Segment 1 Segment 2 Segment

Transmitter
(faster) Phase Buffer segment 2 in bit n is shortened by 1 TQ
Phase
Buffer
Phase Buffer SegmentSync- Propagation Phase Buffer Phase Buffer Sync-
Segment 1 2 Segment Time Segment Segment 1 Segment 2 Segment

Receiver
(slower) new Sample Point
for bit n+1
Bus Synchronization -
Synchronization Jump
Width
Amount by which bit length can be adjusted
during Re-synch is defined as Synchronization
Jump Width

No. of TQ by which Phase Buffer Segment 1 can be

lengthened

No. of TQ by which Phase Buffer Segment 2 can be

shortened

Programmability of Synchronization Jump

Width is mandatory
Minimum of 1 TQ, maximum of 4 TQ
 Bus Synchronization -
Bit Timing
For easier programming many CAN Modules combine
Propagation Time Segment and Phase Buffer Segment 1 (i.e. they
only use 3 segments)

1 Bit Time

Propagation Phase Buffer

Time SegmentSegment 1

= Timing Segment 1Timing

Segment 2
Bus Synchronization -
Why Program the Sample
Position ?
Early sampling decreases
tolerances
the sensitivity to oscillator

Lower cost oscillators (e.g. ceramic resonators) can be used

1 Bit Time
Maximum
Synchronization
Jump Width (4)

Transmit Early
Point Sample
Point
Bus Synchronization -
Why Program the Sample
Position ? (cont.)
Late sampling allows maximum signal
propagation time
Maximum bus length / Poor bus topologies can be handled

1 Bit Time

Time for signal propagation

Transmit Late
Point Sample
Point
CAN (Controller Area Network)

CAN Fundamentals

CAN Physical Layer

CAN Data Link Layer

CAN Data Link Layer

Bus Arbitration

Frame formats

Error Detection and Handling

Basic Concepts - Bus Access
and Arbitration: CSMA/CD
w/AMPCarrier Sense Multiple Access/Collision Detection
with Arbitration on Message Priority

Node X
Node A
Node B
Node C

Start
Identifier Field
Arbitration Bit
Node A
phase
Node B
Rest of
Node C
Frame
CAN Bus
Transmit
Request Node B loses Arbitration Node C loses Arbitration
Frame Formats -
Data Frame
Standard Data Frame Inter Frame Space

recessive
1 11 1 1 1 4 0...64 15 1 1 1 7 3
dominant

Bus Idle
ACK Slot
IDE Bit (D)

Data Field
RTR Bit (D)

Intermission
End of Frame
Identifier Field

CRC Delimiter
( reserved (D))
Start of Frame

ACK Delimiter
CRC Sequence
Data Lenght Code

Arbitration Control CRC Acknowledge

Field Field Field Field

The numbers indicate the length of each bitfield

Frame Formats -
Extended Data Frame
Format

The numbers indicate the length of each bitfield

Basic Concepts -Max. Frame
Length
Standard Data Frame Extended Data Frame
1 Startbit 1 Startbit
+ 11 Identifier bits + 11 Identifier bits
+ 1 RTR bit + 1 SRR bit
+ 6 Controlbits + 1 IDE bit
+ 64 Databits + 18 Identifier bits
+ 15 CRC bits + 1 RTR bit
+ 1 CRC Delimiter + 6 Controlbits
+ 19 Stuffbits* + 64 Databits
+ 1 ACK Slot + 15 CRC bits
+ 1 ACK Delimiter + 1 CRC Delimiter
+ 7 EOF bits + 23 Stuffbits*
+ 3 IFS bits + 1 ACK Slot
= 130bits + 1 ACK Delimiter
+ 7 EOF bits
IFS = Inter Frame Space
* = max. number + 3 IFS bits
= 154 bits
Frame Formats -
Remote Frame
Standard Data Frame Inter Frame Space

recessive
1 11 1 1 1 4 0...64 15 1 1 1 7 3
dominant

Standard Remote Frame Inter Frame Space

recessive
The numbers
1 11 1 1 1 4 15 1 1 1 7 3 indicate the
dominant length of
each bitfield
 Frame Formats -
InterFrame Space
Separates a frame (of whatever type) from a
following Data or Remote Frame

Can frame Interframe Space Can frame

3 0.....

Bus Idle
I ntermission Field
Error Handling -
Frame Formats - Overload
Frame
Overload Frame:
Used to delay next CAN message

Interframe
Space or
Interframe Overload
Space Overload Frame Frame

6 0-6 8
Flag

Error
of Active

Delimiter
Overload

(recessive)
Overload Frame
Superimposition
Error Detection - Overview

Detected Errors

CRC Form Stuff

Error Error Error

ACK Bit
Error Error
Error Detection -
Cyclic Redundancy Check
Calculated and received CRC checksum must match...

Node A Node B
Calculated Calculated
Idle CRC Checksum: CRC Checksum: Idle
Receive 1234h 1234h Receive
Transmit Transmit
Transmitted Received
CRC Checksum: CRC Checksum:
1234h 1234h match

CAN_H Data Frame

CAN_L
CRC Sequence
Error Detection -
Cyclic Redundancy Check
(cont.)
otherwise Frame was not received correctly (CRC
Error)

Node A Node B
Calculated Calculated
Idle CRC Checksum: CRC Checksum: Idle
Receive 1234h 1235h Receive
Transmit Transmit
Transmitted Received
CRC Checksum: CRC Checksum:
1234h 1234h mismatch

CAN_H Error Frame

CAN_L
Error Detection - Frame
Check
No dominant bits
allowed in: CRC
Delimiter, ACK
Delimiter, End of
Frame, Intermission
->(Form Error)
Error Detection - Bit
Monitoring
A transmitted bit
must be correctly
read back from the
CAN bus (otherwise
Bit Error)
Dominant bits may
overwrite recessive
bits only in the
Arbitration Field and
in the Acknowledge
Slot
Error Detection - Bit
Stuffing Check
6 consecutive bits with
same polarity are not
allowed between
Start Of Frame and
CRC Delimiter

(otherwise Bit Stuffing

Error)
Error Handling

Node A Node B Node C

Error Error Error

reco- reco-
detected gnized gnized
Idle Idle Idle
Receive Error Frame Receive Receive
Transmit Transmit Transmit

CAN_H Data Frame

CAN_L
Error Handling

REC<=127 REC>127
and or TEC>255
TEC<=127 TEC>127

Error Error Bus

Reset active passive off

Re-Initialization only
 Error Handling -
Frame Formats - Error Frame
Active Error Frame: Used for error signaling

Interframe
Field within Space or
Data or Overload
Error Frame Error Frame Frame
Error Active

6...12 8 Error Passiv

Field
Error
Field

Delimiter
Error Flag
Common Misunderstandings

Shorting of CAN-Tx and Rx pins instead of CAN-H and CAN-L pins to

simulate Bus-Off

Connecting CAN-Tx to CAN-Rx pin to simulate a Loopback. Loopback

mode to be used if needed to loopback without any additional node

Misunderstandings on termination resistance.

Tendency to connect termination resistance to every node newly added
on network
Tendency to connect termination resistance between Tx and Rx pins

Attempting to send messages again after leaving the node open for a
while
 Quiz
1. Which of the following logic CAN follows?
a) Wired OR logic
b) Wired NAND logic
c) Wired AND logic
d) Wired NOT logic

2. What is the value of terminal resistance used in general?

e) 60 ohms
f) 130 ohms
g) 120 ohms
h) 220 ohms
 Quiz
3. Extended CAN frame has _____ bit identifier?
a) 11
b) 19
c) 23
d) 29

4. In Bit stuffing, when the stuff bit will be inserted?

e) After 6 consecutive bits of same polarity
f) After 5 consecutive bits of same polarity
g) After 6 consecutive dominant bits
h) After 5 consecutive recessive bits
 Quiz
5. The length of the Synchronization segment is _____ Time
Quantum?
a) 1
b) 2
c) 4
d) 6

6. If Node 1 sends 764 and Node 2 sends 744 which will get the
arbitration?
e) None
f) 764
g) 744
h) both
Quiz
7. CAN Bus is _______?
a) Parallel Synchronous
b) Serial Synchronous
c) Serial Asynchronous
d) Parallel Asynchronous

8. If Standard CAN and Extended CAN co-exist,

which one will have priority?
e) Standard CAN
f) Extended CAN
g) Both cant co-exist on a Network
h) None of the above
Questions?
Thank
you