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The Architecture models
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Von-Neumann Architecture
Microcontrollers using this architecture have only one
memory block and one 8-bit data bus.
As all data are exchanged by using these 8 lines. The CPU
can either read an instruction or read/write data from/to the
memory. Both cannot occur at the same time since the
instructions and data use the same bus system.
Thus, the bus is overloaded and communication itself is very
slow and inefficient.
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Harvard Architecture
Microcontrollers using this architecture have two different data
buses.
1. One is 8 bits wide and connects CPU to RAM.
2. Another consists of several lines (12, 14 or 16) and connects CPU to
ROM.
Since a program (ROM) and temporary data (RAM) are separate,
the CPU can execute two instructions simultaneously.
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INSTRUCTION SET
Instructions that can be understood by the microcontroller are
known as an instruction set. Write a program in assembly language,
is actually specifying instructions in the order they should be
executed.
RISC (Reduced Instruction Set Computer)
CISC (Complex Instruction Set Computer)
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RISC & CISC
RISC (Reduced Instruction Set Computer)
In this case, the microcontroller uses simplified (as opposed to
complex) instructions which recognizes and executes only basic
operations (addition, subtraction, copying etc.). This enables much
faster execution and provide higher performance. All other more
complicated operations are performed by combining these (for
example, multiplication is performed by performing successive
addition). Ex. PIC16F877
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CISC vs RISC
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Inside the 8051
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Inside Architecture of 8051
External interrupts
On-chip Timer/Counter
CPU
Bus Serial
4 I/O Ports
OSC Control Port
P0 P1 P2 P3 TxD RxD
Address/Data
Figure 1-2. Inside the 8051 Microcontroller Block Diagram
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Common Features of the 8051 Family
l Common features,
8-bit processor
4 I/O ports each 8bits wide
max of 64K on-chip ROM (usually 0k to 4k)
max of 64K external data memory
max of 64K external code memory
2 timers, one serial port
128 bytes of on-chip RAM
various speeds from 12MHz
l Clones may have different on-chip memory, timers etc
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Memory in the 8051
On-chip ROMto save your program
Program is burn in ROM.
Program is fixed and changeless.
On-chip RAMto save some temporary data generated in
execution time
Data can be changed.
Data is lost when the 8051 powers down.
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8051 Registers
The 8051 has 8-bit registers and 16-bit registers.
a lot of 8-bit registers
two 16-bit registers
The 8051 use register to store data type/information temporarily.
Exampleinteger and character are 8 bits.
Some registers are used for internal operations of the 8051.
Any data larger than 8-bits must be broken into 8-bit chunks before it is
processed.
D7 D6 D5 D4 D3 D2 D1 D0
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8051 Register Banks
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RAM in the 8051
128 bytes of RAM in the 8051
These 128 bytes are divide into three
different groups:
32 bytes for register banks and the stack
00 to 1FH RAM
16 bytes for bit-addressable read/write memory
20H to 2FH RAM
80 bytes for scratch pad
30H to 7FH RAM
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RAM Allocation in the 8051
7F
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SPECIAL FUNCTION REGISTER (SFR)
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Table 51 8051 Special Function Register (SFR) Addresses
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8051 Core Registers
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8051 Registers (RAM)
8-Bit Address
8-Bit Register
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8051 Program Counter & ROM Space
8-Bit Register
(Machine Codes)
16-Bit Address
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Special Function Registers (SFRs)
Special Function Registers (SFRs) are a sort of control
table used for running and monitoring the operation of the
microcontroller.
Each of these registers as well as each bit they include, has
its name, address in the scope of RAM and precisely
defined purpose such as timer control, interrupt control,
serial communication control etc.
Even though there are 128 memory locations intended to
be occupied by them, the basic core, shared by all types of
8051 microcontrollers, has only 21 such registers.
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A Register (Accumulator)
A Register (Accumulator)
A register is a general-purpose register used for storing intermediate results
obtained during operation.
Prior to executing an instruction upon any number or operand it is necessary to
store it in the accumulator first.
All results obtained from arithmetical operations performed by the ALU are
stored in the accumulator.
The A register is the most commonly used register. More than half instructions
use the accumulator.
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B Register
B Register
Used as a temporary register
Multiplication and division can be performed only upon numbers stored
in the A and B registers.
MUL AB
DIV AB
B register holds the second operand and will hold part of the result.
Upper 8 bits of multiplication result
Remainder in case of division
All other instructions in the program can use this register as a spare
accumulator (A).
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R Registers (R0-R7)
This is a common name for 8 general-purpose registers (R0, R1, R2 ...R7).
They occupy 4 banks within RAM.
They are used for temporary storing variables and intermediate results
during operation.
Active bank is a bank the registers of which are currently used depends on
two bits of the PSW Register.
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The following example best illustrates the purpose of these registers.
Suppose it is necessary to perform some arithmetical operations upon
numbers previously stored in the R registers: (R1+R2) - (R3+R4).
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Program Status Word (PSW) Register
PSW register is one of the most important SFRs. It contains several status bits
that reflect the current state of the CPU.
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Data Pointer Register (DPTR)
It consists of two separate registers:
DPH (Data Pointer High) and (Data Pointer Low).
For this reason it may be treated as a 16-bit register
or as two independent 8-bit registers.
Their 16 bits are primarly used for external memory
addressing.
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Stack Pointer (SP) Register
Stack pointer is used to access the stack. A value stored in
the Stack Pointer points to the last used location of the stack.
PUSH operation increments the value in the SP by 1.
POP operation decrements its value by 1.
Upon any reset and power-on, the value 7 is stored in the
Stack Pointer, which means that the space of RAM reserved
for the stack starts at this location.
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Input/Output Port
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Program Counter (PC) / Instruction Pointer
The Program CounterPC) points to the address of the next instruction
to be executed.
As the CPU fetches the opcode from the program ROM, the program
counter is incremented to point to the next instruction.
The PC in the 8051 is 16-bits wide.
The 8051 can access program addresses 0000 to FFFFH, a total of 64K
bytes of code.
10000H (in hex) 24*4 216 26 210 = 64 K
The exact range of program addresses depends on the size of on-chip
ROM.
When the 8051 is powered up, the PC has the value of 0000 in it.
That is, the address of the first executed opcode at ROM address is
0000H.
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