Sie sind auf Seite 1von 23

Different Types of MOS Inverters & MOS Logic Structure

Lecture
on
MOS Inverters & MOS Logic
Structure

Hemant Kumar Sharma


Assistant Professor ECE Department
Vivekananda Global University, Jaipur
Different Types of MOS Inverters & MOS Logic Structure

MOS Inverter

Objectives:
To learn working of different types of MOS inverter.
To understand limitation and advantages of each type
of MOS inverter.

Outcome:
At the end of this module the students will be able to
understand the comparison of different types of
CMOS inverter circuits.

2
Different Types of MOS Inverters & MOS Logic Structure

Ideal Inverter

3
Different Types of MOS Inverters & MOS Logic Structure

MOS- Inverter Resistor Load

4
Different Types of MOS Inverters & MOS Logic Structure

MOS Inverter- Resistor Load

Effect of Load Resistor on Transfer Characteristics

5
Different Types of MOS Inverters & MOS Logic Structure

Serious Issue? if we increase

Yes there is serious issue


Putting a larger resistance mean:
Larger resistance length
Greater Switching delays
Main disadvantage is occupies larger chip area
( 10s or 100s times the area of single transistor)

6
Different Types of MOS Inverters & MOS Logic Structure

Enhancement Transistor as Load

Why ?

Because resistor occupies much space

7
Different Types of MOS Inverters & MOS Logic Structure

Saturated Enhancement Load

8
Different Types of MOS Inverters & MOS Logic Structure

Saturated Enhancement Load

9
Different Types of MOS Inverters & MOS Logic Structure

Linear Enhancement Load

10
Different Types of MOS Inverters & MOS Logic Structure

Linear Enhancement Load

Advantage
VOH = VDD
Disadvantage
Additional Voltage Source
KR must be larger than for
saturated load for decent
slope

11
Different Types of MOS Inverters & MOS Logic Structure

MOS Inverter with Depletion Load

Depletion type NMOS VGS = 0V


VGS > VT always conducting

No additional voltage source and VOH = VDD


But additional fabrication steps 12
Different Types of MOS Inverters & MOS Logic Structure

CMOS INVERTER

13
Different Types of MOS Inverters & MOS Logic Structure

Transfer Characteristics of CMOS Inverter

14
Different Types of MOS Inverters & MOS Logic Structure

Pseudo nMOS Logic


In the old days, nMOS processes had no pMOS
Instead, use pull-up transistor that is always ON
In CMOS, use a pMOS that is always ON
Ratio issue
Make pMOS about effective strength of pulldown
network

15
Different Types of MOS Inverters & MOS Logic Structure

Pseudo nMOS Logic Design

Y= (A1 + A2 + A3 ) (B1 + B2 ) C1

16
Different Types of MOS Inverters & MOS Logic Structure

Pseudo nMOS Logic


Features/merits/demerits
Load device is p-transistor with gate connected to VSS
Equivalent to nMOS gate except that load(depletion or
enhancement) is replaced by p-device
Select proper gain ratio to yield sufficient gain to generate
consistent levels.
In CMOS capacitive load on each input is at least two unit
gate loads but in this logic minimum load can be one unit
gate load as a result of using only one transistor for each
term of the input function
Packaging density advantage over CMOS
Main problem is static power dissipation
Slow rise time
17
Different Types of MOS Inverters & MOS Logic Structure

Dynamic CMOS Logic

18
Different Types of MOS Inverters & MOS Logic Structure

Dynamic CMOS Logic Design

19
Different Types of MOS Inverters & MOS Logic Structure

Dynamic CMOS Logic Design


Features
It consists of n-transistor logic structure whose output node is
pre-charged to VDD by a p-transistor (precharge) and
conditionally discharged by n-transistor (evaluate) connected
to VSS .
Input capacitance is same as pseudo nMOS gate.
Pull up time is improved but pull down time is decreased.
Another problem is simple single phase dynamic CMOS
gates can not be cascaded. 20
Different Types of MOS Inverters & MOS Logic Structure

Dynamic CMOS Logic Design


If cascaded then
When the gates are
precharged output nodes
are charged to VDD
During evaluate phase
output of first gate will
conditionally discharge
Delay occurred due to
finite pull down time

Solution is two or four phase logic is used


21
Different Types of MOS Inverters & MOS Logic Structure

Summary:

22
For any query drop me an e-mail
kumar.hemant@vgu.ac.in 23

Das könnte Ihnen auch gefallen