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Instruction format is
<label> opcode<.field> <operands> <;comments>
where
<label> pointer to the instructions memory location
opcode operation code (i.e., MOVE, ADD)
<.field> defines width of operands (B,W,L)
<operands> data used in the operation
<;comments> for program documentation
Data movement instructions
Arithmatic Instruction
Addressing Modes
Data Register Direct Mode
In the data register direct mode, the effective address field specifies
the data register containing the operand.
*In synchronous operation , bus control is clocked using a common system clock
signal
*Pins required:
*E (Enable) : The E clock is output at a frequency that is one-tenth of the 68000 input
clock.
*VPA' (Valid Peripheral Address) : VPA is an input and tells the 68000 that a 6800 device
is being addressed and therefore that data transfer must be synchronized with the E
clock.
*VMA (Valid Memory Address) : VMA is the processors response to VPA
*AS' (Address Strobe) : LOW when the address on the address bus is valid.
Peripheral Interfacing Sequence
Exception Handling
Group 0 Reset (the highest level in this group), address error (the next level), and
bus error (the lowest level)
Group 1 Trace (the highest level), interrupt (the next level), illegal op-code (next
level), and privilege violation (the lowest level)
Group2 TRAP, TRAPV, CHK, and ZERO DIVIDE (no individual priorities assigned in
group 2)