SRI RAMAKRISHNA ENGINEERING COLLEGE

(An Autonomous Institution,Accredited by NAAC with A grade

ISO 9001:2008 certified, Approved by AICTE
and Permanently Affiliated to Anna University, Chennai)
(All eligible programmes Accredited by NBA)
COIMBATORE-641022
DEPARTMENT OF ELECTRICAL AND ELECTRONICS ENGINNERING
PROJECT PHASE-I

GENERALIZED DESIGN OF TRANSFORMERLESS

PHOTOVOLTAIC INVERTER FOR ELIMINATION OF LEAKAGE
CURRENT AND PULSATING POWER IN GRID CONNECTED
SYSTEM

SUBMITTED BY, UNDER THE SUPERVISION OF,

JANARTHANAN.S.K, Dr. S.U.PRABHA,
1561003, PROFESSOR AND HEAD,
M.E. PED (II YEAR). DEPARTMENT OF EEE.
Introduction
Now a days Transformerless grid connected photovoltaic inverters
are widely accepted due to high efficiency and low cost .

In such inverters the leakage current is adverse to the system

performance leading to problems such as harmonic current,
increased power loss and electromagnetic interference.

In this proposed system the basic idea is to introduce Common

Mode conducting path into the inverter so the PV panel can be
isolated isolated from the AC grid during free wheeling mode.

By injecting CM voltages to the output capacitors second order

pulsating power originated from the Ac side can be decoupled.

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 Objectives
To eliminate the leakage current by introducing a common mode
conducting loop .

To reduce the pulsating power by injecting CM signals to the

modulation of inverter .

To reduce the size ,cost and complexity of inverter without adding

additional components.

To use film capacitors instead of electrolytic capacitors for improving

the reliability of PV system .

3
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 Overview
Introduction
Objective
Literature Survey
Block Diagram
Methodology
Advantages and application
Work plan
References

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Literature Review

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S.NO AUTHOR NAME TITLE AND INFERENCE
PUBLICATION

1 Davide Barater and Active Common-Mode This paper proposed a

Emilio Loranzeni Filter for Ground solution for reducing the
Leakage ground leakage current in
Current Reduction in transformerless single-
Grid-Connected PV phase gridconnected
Converters photovoltaic converters.
Operating With Arbitrary
Power Factor. IEEE
Transaction on industrial
Electronics, Vol. 61, No.
8, August 2014

2 Youngsang Bae and Rae- Suppression of Common- This paper described an

Young Kim, Mode Voltage Using a optimal configuration for
Multicentral Photovoltaic 6
multicentral inverters in
Inverter Topology a medium-voltage (MV)
With Synchronized grid, which is
PWM. IEEE Transaction suitable for large-scale
on industrial Electronics, photovoltaic (PV) power
Vol. 61, No. 9, plants.
September 2014

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6
S.NO AUTHOR NAME TITLE AND
PUBLICATION
3 Giampaolo Buticchi, A Nine-Level Grid-
Davide Barater, Emilio Connected Converter
Lorenzani, Topology
Carlo Concari and for Single-Phase
Giovanni Franceschini Transformerless PV
Systems. IEEE
Transaction on industrial
Electronics, Vol. 61, No. 8,
August 2014
4 Tan Kheng Suan Freddy, Modulation Technique to
Nasrudin A. Rahim, Wooi- Reduce Leakage Current in
Ping Hew and Hang Seng Three Phase
Che Transformerless
Photovoltaic Inverter.
IEEE Transaction on
industrial Electronics, Vol.
61, No. 8, September 2013
5 Li Zhang, Student A Family of Neutral Point
Member, Lanlan Feng, Clamped Full-Bridge
Hongfei Wu, Topologies for
and Yan Xing Transformerless
Photovoltaic
Grid-Tied Inverters. IEEE requirement for
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Transaction on industrial
INFERENCE
This paper presented a single-
phase transformerless
grid-connected photovoltaic
converter based on two
cascaded full
bridges with different dc-link
voltages.
This paper reduces common-
mode voltage by pulse width
modulation (RCMV-PWM)
method and reduce the
leakage current in three-phase
transformerless photovoltaic
(PV) systems.
This paper used Neutral point
clamped (NPC)
topology in an effective way to
eliminate the leakage current.It
also met the safety
7
Transformerless Grid-Tied PV
 Methodology
To introduce a CM conducting path with in the inverter
that will suppress the leakage current.

To inject proper CM signals to the modulation of the

inverter to eliminate the pulsating power.

PI control algorithm is used to control the PV inverter.

PROJECT PHASE II 8
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 Circuit diagram

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 Q1

IRF840
L1
2 3 1 2
4
10uH
C1

4
2

4
2
1n
Q1 Q1

1
C1 1 IRF840 1 IRF840
0
1n

3
L2 L2 L2

PV 1
10uH
2 1
10uH
2 1
10uH
2
V2

4
2
1Vac
Q1 L3 L2 L2 0Vdc
1 2 1 2 1 2
1 IRF840
10uH 10uH 10uH

4
2
C1
Q1

4
2
1n

3
1 IRF840 Q1
C1 C1
1 IRF840
1n 1n R1

3
R

3
C1
1n

22
1 13
LO VSS
5 C1
VS 9
6 VDD

1
LM7805 VB
D6 2
1 2 1 3 COM 12
VI VO 3 LIN

32
11

2
GND

VCC
2 15 7 10

VDD
VDD
TX3 R1 3 RA0/AN0 RC0/T1OSO/T1CKI 16 HO HIN
D7 4 RA1/AN1 RC1/T1OSI/CCP2 17 22
2

1k RA2/AN2 RC2/CCP1
230V 1 2 5
RA3/AN3/VREF RC3/SCK/SCL
18

AC 15V C6
6
7 RA4/TOCKI RC4/SDI/SDA
23
24
IR2110

C5 RA5/AN4/SS RC5/SDO 25
D5 10uf 33 RC6/TX/CK 26
2 1 1000uf 34 RBO/INT RC7/RX/DT
U4
D8 35 RB1 19 2 18
36 RB2 RD0/PSP0 20 4 1A1 1Y 1 16 22
LED 37 RB3 RD1/PSP1 21 6 1A2 1Y 2 14 1 13
38 RB4 RD2/PSP2 22 8 1A3 1Y 3 12 LO VSS
39 RB5 RD3/PSP3 27 11 1A4 1Y 4 9 5 C1
D4 33Pf 40 RB6 RD4/PSP4 28 13 2A1 2Y 1 7 VS 9
2 1 C7 RB7 RD5/PSP5 29 15 2A2 2Y 2 5 6 VDD

1
13 RD6/PSP6 30 17 2A3 2Y 3 3 VB
14 OSC1/CLKIN RD7/PSP7 2A4 2Y 4 2
OSC2/CLKOUT 8 1 COM 12
C8 4MHz 1 RE0/RD/AN5 9 19 1G 3 LIN

2
MCLR/VPP RE1/WR/AN6 10 2G VCC
RE2/CS/AN7 7 10
74ALS244A

VSS

VSS
HO HIN
33Pf 22
100 R3

12

31
IR2110

PIC16F877A

TLP250 V1

12 22

R1

0
0

TLP250 V1

12 22

R1

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Circuit diagram explanation
The inverter is derived from a conventional full bridge inverter with an output
LC filter.

The LC filter is split into two identical parts .

The midpoint of the capacitor is connected to the negative terminal of the dc

bus to provide path for the CM current .

Because of the symmetrical circuit configuration active power injection and

reactive power support will not be affected.

The leakage current is induced by CM voltage at switching frequencies where

the impedance of the capacitors is very small.

The CM voltage and its induced CM current can be represented as below

The leakage current is induced by CM voltage at switching frequencies where the
impedance of the capacitors is very small.

The CM voltage and its induced CM current can be represented as below

The amplitude of the CM current is usually in the range of several amperes which
significantly exceeds the 300-mA if there is no leakage current suppression method
applied to the system.

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 Simulation diagram

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 CONTROL BLOCK DIAGRAM

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Over All Kit

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Desing specifications
INDUCTOR CALCULATION

L= Vin+(Vout Vin)
IL*Fs*Vout (4.6.1)

Vin= 12V,Vout=18V
IL=0.1 (4.6.2)

Substitute ILvalue in equation 4.6.1

L=12+(18-12)
0.01*10000*24 (4.6.3)
L=1mH

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cont..
CAPACITOR CALCULATION

Cout=Iout(max)*D
Fs*vout (4.6.4)

Vout=ESR+(Iout + IL)
(1-D 2)

Vout=1.49V (4.6.5)

Substitute (4.6.5) in (4.6.4)

Cout= 47F

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Cont..
SINGLE PHASE INVERTER

Vo(avg)={s2()dt}1/2 (4.6.7)

Vo(avg)={ + }1/2

Vo(avg)=17.8V. (4.6.8)

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 Input Voltage obtained during test

Input voltage given from the PV emulator is 15.55V

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 Output Voltage

Output Voltage obtained is 17.67 V during the test

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 Advantages of Proposed System
The ground leakage current issue will be resolved
without adding any additional component to the circuit.

The pulsating power in single phase PV system can be

eliminated.

The system cost and the complexity can be reduced.

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 Application
Used in HVDC Transmission
Electric Motor Speed control
Agricultural Applications

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 Conclusion
This topology can simultaneously eliminate the leakage
current and pulsating power in grid-connected PV
systems.
Its attractiveness is that it does not require any additional
switches to resolve these two difficulties, and the circuit
configuration is very simple.

PROJECT PHASE II
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 Paper Published

PROJECT PHASE II
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 References
1. T. Kerekes, R. Teodorescu, P. Rodrguez, G. Vzquez, and E. Aldabas, A
new high-efficiency single-phase transformerless PV inverter topology,
IEEE Trans. Ind. Electron., vol. 58, no. 1, pp. 184191, Jan. 2011.

2. Y. Bae and R. Y. Kim, Suppression of common-mode voltage using a

multicentral photovoltaic inverter topology with synchronized PWM, IEEE
Trans. Ind. Electron., vol. 61, no. 9, pp. 47224733, Sep. 2014.

3. D. Barater, G. Buticchi, E. Lorenzani, and C. Concari, Active

commonmode filter for ground leakage current reduction in grid-connected
PV converters operating with arbitrary power factor, IEEE Trans. Ind.
Electron., vol. 61, no. 8, pp. 39403950, Aug. 2014.

4. M. C. Cavalcanti, A.M Farias, F. A. S. Neves, and J. L. Afonso,

Eliminating leakage currents in neutral point clamped inverters for
photovoltaic systems, IEEE Trans. Power Electron., vol. 59, no. 1, pp. 435
443,Jan. 2012.

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 5. B. Yang, W. Li, Y. Gu, W. Cui, and X. He, Improved transformerless
inverter with common-mode leakage current elimination for a photovoltaic
grid-connected power system, IEEE Trans. Power Electron., vol. 27, no. 2,
pp. 752762, Feb. 2012.

6. H. F. Xiao, X. P. Liu, and K. Lan, Zero-voltage-transition full-bridge

topologies for transformerless photovoltaic grid-connected inverter, IEEE
Trans. Ind. Electron., vol. 61, no. 10, pp. 53935401, Oct. 2014.

7. Yu, J. Lai, H. Qian, and C. Hutchens, High-efficiency MOSFET inverter

with H6-type configuration for photovoltaic nonisolated ac-module
applications, IEEE Trans. Power Electron., vol. 26, no. 4, pp. 12531260,
Apr. 2011.

8. S. V. Araujo, P. Zacharias, and R.Mallwitz, Highly efficient single-phase

transformerless inverters for grid-connected photovoltaic systems, IEEE
Trans. Ind. Electron., vol. 57, no. 9, pp. 31183128, Sep. 2010.

9. B. Gu et al., High reliability and efficiency single-phase transformerless

inverter for grid-connected photovoltaic systems, IEEE Trans. Power
Electron., vol. 28, no. 5, pp. 22352245, May 2013.
26
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 THANKYOU

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