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Scaling
Technology shrinks by 0.7 times every generation
Design Abstraction
SYSTEM
MODULE
+
GATE
CIRCUIT
DEVICE
G
S D
n+ n+
CKV
Design Metrics
Cost
Performance
Die Cost
Single die
Wafer
Going up to 12 (30cm)
CKV
cost:
-per-transistor
1
0.1 Fabrication capital cost per transistor (Moores law)
0.01
0.001
0.0001
0.00001
0.000001
0.0000001
1982 1985 1988 1991 1994 1997 2000 2003 2006 2009
CKV
Yield
cost of die + cost of die test + cost of packaging
variable cost = ----------------------------------------------------------------
final test yield
cost of wafer
cost of die = -----------------------------------
dies per wafer die yield
Defects
Process variations
CKV
Noise Sources
from two wires placed side by side
capacitive coupling
- voltage change on one wire can influence
signal on the neighboring wire
- cross talk
inductive coupling
- current change on one wire can influence
signal on the neighboring wire
Thank You