Link Layer Functionalities

Reporter: Robert John T. Lemu

 Frame Synchronization
 Can be defined as the process of
identifying valid data from a framed data
transmission.
 When data frames are transmitted to a
receiver from the sender but get
interrupted, the receiver must
resynchronize.
 The process used for the synchronization
between the sender and the receiver is
known as frame synchronization.
 Frame Synchronization
 In data link layer, it needs to pack bits into
frames, so that each frame is distinguishable
from another.

 \

 The source sends data in blocks called

frames to the destination. The starting and
ending of each frame should be recognized
by the destination.
Frame Synchronization
Common frame synchronization schemes
 Framing bit
Framing bits indicate the beginning or
end of a frame. They occur at specified
positions in the frame, do not carry
information, and are usually repetitive.
 Syncword framing
Some systems use a special syncword at
the beginning of every frame.
 CRC-based framing
A kind of frame synchronization used in
Asynchronous Transfer Mode (ATM).
Four Major methods of frame
synchronization:
 Time based -- Uses a specific period of
time between frames for the
synchronization.
 Character counting -- Uses the count of
the remaining characters in the frame
header.
 Byte stuffing -- Uses special byte
sequences like DLE (data link escape), STX
(start of text) and ETX (end of text).
 Bit stuffing -- Uses special bit patterns to
denote the start and the end of a frame.
Error Detection
• Error detection means to decide whether
the received data is correct or not
without having a copy of the original
message.

 Error detection uses the concept of

redundancy, which means adding
extra bits for detecting errors at the
destination.
Error Detection
 Parity Check
◦ This is the simplest error-detection mechanism. A
parity bit is appended to a block of data, normally at
the end of a 7-bit ASCII character.
◦ Two techniques- even parity & odd parity, depends on
the user what will be used. In even parity, a parity bit
is selected so that the character has an even number
of 1s. In odd parity, the parity bit is selected so that
the character has an odd number of 1s.
Error Detection
 Vertical Redundancy Check (VRC)
Append a single bit at the end of data
block such that the number of ones is
even
 Even Parity (Odd Parity is similar).
0110011  01100110
0110001  01100011
Error Detection
 Longitudinal Redundancy Check
(LRC)
◦ Organize data into a table and create a parity
for each column
11100111 11011101 00111001 10101001

11100111
11011101
00111001
10101001
10101010

11100111 11011101 00111001 10101001 10101010

Original Data LRC
Error Detection
 Cyclic Redundancy Check (CRC)
◦ The CRC method operates on blocks of data
called frames. Basically, the sender appends a bit
sequence to every frame, called the FCS (frame
check sequence).
◦ The divisor is generated using polynomials.
◦ The sender performs a division operation on the
bits being sent and calculates the remainder.
◦ Before sending the actual bits, the sender adds
the remainder at the end of the actual bits.
◦ Actual data bits plus the remainder is called a
codeword. The sender transmits data bits as
codewords.
Error Detection

The receiver performs division operation on codewords using the

same CRC divisor. If the remainder contains all zeros the data bits are
accepted, otherwise it is considered as there some data corruption
occurred in transit.
Checksum
 In checksum error detection scheme, the data is
divided into k segments each of m bits.
 In the sender’s end the segments are added using
1’s complement arithmetic to get the sum. The
sum is complemented to get the checksum.
 The checksum segment is sent along with the
data segments.
 At the receiver’s end, all received segments are
added using 1’s complement arithmetic to get the
sum. The sum is complemented.
 If the result is zero, the received data is accepted;
otherwise discarded.
Checksum
Error Control including ARQ
 There are three types of techniques
available which Data-link layer may deploy
to control the errors by Automatic
Repeat Requests (ARQ).
◦ Stop-and-wait ARQ
◦ Go-Back-N ARQ
◦ Selective Repeat ARQ
Stop-and-wait ARQ
 The following transition may occur in Stop-and-Wait
ARQ:
 The sender maintains a timeout counter.
 When a frame is sent, the sender starts the timeout
counter.
 If acknowledgement of frame comes in time, the
sender transmits the next frame in queue.
 If acknowledgement does not come in time, the
sender assumes that either the frame or its
acknowledgement is lost in transit. Sender
retransmits the frame and starts the timeout counter.
 If a negative acknowledgement is received, the sender
retransmits the frame.
Stop-and-wait ARQ
Go-Back-N ARQ
 In Go-Back-N ARQ method, both sender and receiver
maintain a window. The sending-window size enables the
sender to send multiple frames without receiving the
acknowledgement of the previous ones.
 The receiving-window enables the receiver to receive
multiple frames and acknowledge them. The receiver keeps
track of incoming frame’s sequence number.
 When the sender sends all the frames in window, it checks
up to what sequence number it has received positive
acknowledgement.
 If all frames are positively acknowledged, the sender sends
next set of frames. If sender finds that it has received NACK
or has not receive any ACK for a particular frame, it
retransmits all the frames after which it does not receive any
positive ACK.
Go-Back-N ARQ
Selective Repeat ARQ
 In Go-back-N ARQ, it is assumed that the
receiver does not have any buffer space for
its window size and has to process each
frame as it comes.
 This enforces the sender to retransmit all
the frames which are not acknowledged.
 In Selective-Repeat ARQ, the receiver while
keeping track of sequence numbers, buffers
the frames in memory and sends NACK for
only frame which is missing or damaged. The
sender in this case, sends only packet for
which NACK is received.
Selective Repeat ARQ