Sie sind auf Seite 1von 42

Addressing Modes

Centurion Institute of Technology

Addressing Modes
by
Shivani Nanda

Shivani Nanda 1
Addressing Modes
Addressing Mode
Centurion Institute of Technology

An addressing mode refers to the


“mechanism in which operands are specified
in a machine instruction”

Opcode Mode ...


The addressing mode indicates where the
operands are located
The assembler decodes which addressing
mode is being used from the syntax of the
operand field.
Shivani Nanda 2
Addressing Modes
Indicating an Addressing Mode
Centurion Institute of Technology

 A separate mode field in the instruction indicates the


addressing mode used as shown below:-

Addressing 1st Operand 2nd Operand


Opcode Field
Mode Field

The Opcode itself explicitly specifies the addressing


mode used in the instruction

Shivani Nanda 3
Addressing Modes
Operand Reference
Centurion Institute of Technology

Operand reference
“ in an instruction it refers to either the actual
value of the operand”
or
“a reference to the address of the operand”

 In general the effective address of an operand


is either a main memory location or a CPU
register
Shivani Nanda 4
Addressing Modes
Centurion Institute of Technology

 Main Objective – to refer a large range of


locations in memory( or virtual memory )
 General terminologies used :-
A = Contents of an address field in the
instruction
EA = Actual( effective ) address of the
location containing the referenced
operand
( X ) = Contents of location X

Shivani Nanda 5
Addressing Modes
Implied Mode
Centurion Institute of Technology

• In this mode the operands are specified


implicitly in the definition of the instruction.
• All register reference instructions that use an
accumulator are implied mode instruction.
• Example: CMA compliment accumulator.
– AC is implied in “ADD M[AR]” in “One-Address”
instr.
– TOS is implied in “ADD” in “Zero-Address” instr.

Shivani Nanda 6
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

7
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

8
Addressing Modes
Centurion Institute of Technology

MOVE 200immediate R0

MOVE #200, R0

MOVE #26, R1

MVI 26, R1

Shivani Nanda 9
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

10
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

11
Addressing Modes
Centurion Institute of Technology

 LOAD X, R1
Load contents of memory location X to register R1

 MOVE X, Y
Copy the contents of memory location X to Y

 JUMP X
Transfer the program control to instruction at memory
location X by loading X in PC

Shivani Nanda 12
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

13
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

14
Addressing Modes
Centurion Institute of Technology

Add (A), R0 Add (R1), R0

A B
B Operand

R1 B
B Operand

(a) Through a memory (b) Through general


purpose registers
location

Shivani Nanda 15
Addressing Modes
Using Indirect Addressing in a program to add n number
Centurion Institute of Technology

Address Contents
Move N,R1
Move #NUM1,R2
Clear R0
LOOP Add (R2),R0
Add #4,R2
Decrement R1
Branch>0 LOOP
Move R0,SUM

Shivani Nanda 16
Addressing Modes
Comparing with Direct Addressing
Centurion Institute of Technology

In direct addressing, the length of the address


field is usually less than word length thus
limiting the address range
Indirect addressing as a solution :-
“ One solution is to have the address field
refer to the address of a word in memory
which in turn contains a full-length
address of the operand.”

Shivani Nanda 17
Addressing Modes
Merits Demerits
Centurion Institute of Technology

 Although the number of words


 Flexibility in that can be addressed is now
2N,the number of effective
programming addresses that can be referenced
at any given time is 2K where K
 Indirection is achieved is the length of the address field

 Two main memory accesses


 For a word length of N, required to fetch the operand
address space available
is 2N  Instruction cycle time increases
since two memory accesses
required for a single level
indirect addressing
Shivani Nanda 18
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

19
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

20
Addressing Modes
Merits Demerits
Centurion Institute of Technology

 Faster operand fetch  Addressing space is very


as absolutely no limited as the number of
memory access bits assigned for address
required field is between 3 to 5 bits
 Only a small address
field is required in the  Number of registers is
instruction limited and hence
 It is useful in case of effective utilization by the
long programs as programmer is essential
intermediate results else program execution
can be stored in time increases
registers than in main unnecessarily
memory
Shivani Nanda 21
Addressing Modes
Centurion Institute of Technology

 Add R1,R2
Contents of R1 added to contents of R2 and
stored in R2
Both R1 and R2 addressed in register addressing
mode
 Store R1,MEM1
Contents of register R1 stored in memory
location MEM1
Register addressing used for R1 and direct
addressing used for second operand
Shivani Nanda 22
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

23
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

24
Addressing Modes
Relative Addressing
Centurion Institute of Technology

INSTRUCTION
OPCODE OFFSET
•In this mode the instruction specifies the operand address(
memory ) as the relative position of the current instruction
address i.e. contents of PC

EA = < PC > + Offset

Implicit Explicit

Shivani Nanda 25
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

26
Addressing Modes
Base Register Addressing
Centurion Institute of Technology

INSTRUCTION

OPCODE BASE REGISTER OFFSET

EA = < BASE REGISTER > + OFFSET

may be implicit/ explicit

Shivani Nanda 27
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

28
Addressing Modes
Index Addressing
Centurion Institute of Technology

INSTRUCTION
OPCODE ADDRESS

EA = Address + < Index Register >


= X + [ IndR ]

Shivani Nanda 29
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

30
Addressing Modes
Indexed Addressing( contd… )
Centurion Institute of Technology

Add 20(R1),R2

Offset is
1000 given as a
constant
Offset

1020 Operand

1000 R1

Shivani Nanda 31
Addressing Modes
Indexed Addressing( contd… )
Centurion Institute of Technology

Add 1000(R1),R2

Offset is
1000 in index
register
20 = Offset

1020 Operand

20 R1

Shivani Nanda 32
Addressing Modes
Additional Modes
Centurion Institute of Technology

• Autoincrement Mode
The effective address of the operand is the contents of
a register specified in the instruction. After accessing the
operand, the contents of this register are automatically
incremented to point to the next item in a list
( Ri )+
• Autodecrement Mode
The contents of a register specified in the instruction
are first automatically decremented and are then used as
the effective address of the operand
-( Ri )

Shivani Nanda 33
Addressing Modes
Autoincrement mode used to add ‘n’ numbers
Centurion Institute of Technology

Move N,R1
Move #NUM1,R2
Clear R0
LOOP Add (R2)+,R0
Decrement R1
Branch>0 LOOP
Move R0,SUM

Shivani Nanda 34
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

35
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

36
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

37
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

38
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

39
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

40
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

41
Centurion Institute of Technology

Shivani Nanda
Addressing Modes

42

Das könnte Ihnen auch gefallen