Microcontroller

Why do we need to learn

microcontrollers or microprocessors?
• The microprocessor is the core of
computer systems.
• Nowadays many communication, digital
entertainment, portable devices, are
controlled by them.
• A designer should know what types of
components he needs, ways to reduce
production costs and product reliable.
 The necessary tools for
microprocessors/controller
• CPU: Central Processing Unit
• I/O: Input /Output
• Bus: Address bus & Data bus
• Memory: RAM & ROM
• Timer
• Interrupt
• Serial Port
• Parallel Port
 Microprocessor
General-purpose microprocessor
• CPU for Computers
• No RAM, ROM, I/O on CPU chip itself
• Example：Intel’s x86, Motorola’s 680x0

Many chips on mother’s board

CPU Data Bus

General-
Purpose Serial
RAM ROM I/O Timer
Micro- COM
Port
processor Port

Address Bus

General-Purpose Microprocessor System

 Microcontrollers
• A smaller computer
• On-chip RAM, ROM, I/O ports...
• Example：Motorola’s 6811, Intel’s 8051, Zilog’s Z8 and PIC
16X

CPU RAM ROM

A single chip
Serial
I/O Timer COM
Port
Port
Microcontroller
 Microprocessor vs. Microcontrollers
Microprocessor
• CPU is stand-alone, RAM,
ROM, I/O, timer are separate
• designer can decide on the
amount of ROM, RAM and
I/O ports.
• expensive
• versatility
• general-purpose
Microcontroller
• CPU, RAM, ROM, I/O and
timer are all on a single chip
• fix amount of on-chip ROM,
RAM, I/O ports
• for applications in which cost,
power and space are critical
• single-purpose
 Embedded Systems

• Embedded system means the processor is embedded into that

application.
• An embedded product uses a microprocessor or microcontroller to
do one task only.
• In an embedded system, there is only one application software that
is typically burned into ROM.
• Example：printer, keyboard, video game player
Three criteria in choosing a Microcontroller
1. meeting the computing needs of the task efficiently and cost
effectively
• speed, the amount of ROM and RAM, the number of I/O ports
and timers, size, packaging, power consumption
• easy to upgrade
• cost per unit
2. availability of software development tools
• assemblers, debuggers, C compilers, emulator, simulator,
technical support
3. wide availability and reliable sources of the microcontrollers.
 Features of 8051
• ROM - 4K bytes
• RAM - 128 bytes
• Timer - 2
• I/O pins - 32
• Serial port - 1
• Interrupt sources - 6
 Features of 8051

• 8051 is based on CISC architecture.

• It is based on Harvard architecture. So, it

has separate program and data memory.
 Architecture

Based on the instruction set used:

• CISC
• RISC
 CISC Architecture
• Complex Instruction Set Controller.
• It invariably employ a microcode for decoding the instructions and
generate the necessary control signals for performing the intended
operation.
• Microcode is nothing but a pre-stored bit pattern inside decode &
control unit.
• When an instruction is fetched from memory, it is compared with the
existing bit pattern, when match is found it generates the associated
control signals to ALU and registers.
• CISC designs are commonly used for non-numerical computations
because they provide special instructions to handling character data.
• It takes good amount of time to decode the meaning of complex
instructions which perform more than one operation.
• Also microcode requires more number of transistors that are used in
fabricating the CISC architecture based processors.
• It has variable instruction width. As more
operations are performed on a single instruction,
more number of bits are required to indicate
these operations, which invariably increases the
size of the instruction.
• With more number of operations per instructions,
the time taken per instruction is also increased.
• CISC based systems use register-memory
technique to execute instructions.
 RISC Architecture
• Reduced Instruction Set Controller.
• These are fast at numerical computations required in science,
graphics and engineering applications.
• We either use little or no microcode to decode the meaning of the
given instruction.
• The decode & control unit is usually hardwired, because of which
the instruction decoding takes less time and also complexity of the
decoder unit is reduced.
• The total number of transistors used for the design of RISC is half
the number used in CISC.
• This reduced number of transistors reduces the power consumption.
• It uses register-register technique. Here the data used for
performing the execution of given instruction is always specified in
the registers.
 Computer Architecture

Depending on how external memory is

connected to the processors:
 Von-Neumann machine.
 Harvard machine.
 Von-Neumann
• It has 3 hardware subsystems; a CPU, a main
memory system and an I/O system.
• It uses stored program concept i.e., the program
and data are stored in the same memory unit.
• It carries out instruction execution sequentially.
• It has a single path between the main memory
system and the control unit of the CPU. Because
the common path is used to access both the
program as well as the data, there is possibility
of congestion on the bus. This situation is called
Von Neumann Bottleneck.
 Harvard Architecture
• It uses separate memories for storing the
program and data.
• To connect these separate memories, it uses a
separate set of address, data and control lines.
• As separate memories and buses are used,
simultaneous access to the memory is possible
without any congestion over the bus, which in
turn increases the performances.
• It increases the cost of the system as separate
memories & separate buses are used.
 Block Diagram
External interrupts
On-chip Timer/Counter

Interrupt ROM for

On-chip Timer 1 Counter
Control program
code RAM Timer 0 Inputs

CPU

Bus Serial
4 I/O Ports
OSC Control Port

P0 P1 P2 P3 TxD RxD
Address/Data
 Pin description of 8051

P1.0 1 40 Vcc
P1.1 2 39 P0.0(AD0)
P1.2 3 38 P0.1(AD1)
P1.3
P1.4
4
5
8051 37
36
P0.2(AD2)
P0.3(AD3)
P1.5 6 (8031) 35 P0.4(AD4)
P1.6 7 34 P0.5(AD5)
P1.7 8 33 P0.6(AD6)
RST 9 32 P0.7(AD7)
(RXD)P3.0 10 31 EA/VPP
(TXD)P3.1 11 30 ALE/PROG
(INT0)P3.2 12 29 PSEN
(INT1)P3.3 13 28 P2.7(A15)
(T0)P3.4 14 27 P2.6(A14)
(T1)P3.5 15 26 P2.5(A13)
(WR)P3.6 16 25 P2.4(A12)
(RD)P3.7 17 24 P2.3(A11)
XTAL2 18 23 P2.2(A10)
XTAL1 19 22 P2.1(A9)
GND 20 21 P2.0(A8)
 Pin description of 8051

• Vcc（pin 40）：
– Vcc provides supply voltage to the chip.
– The voltage source is +5V.
• GND（pin 20）：ground
 Pin description of 8051

• RST（pin 9）：reset
– It is an input pin and is active high（normally low）.
• The high pulse must be high at least 2 machine cycles.
– It is a power-on reset.
• Upon applying a high pulse to RST, the microcontroller will
reset and all values in registers will be lost.
• Reset values of some 8051 registers
– Way 1：Power-on reset circuit
– Way 2：Power-on reset with debounce
 Reset value of 8051

Register Reset Value

PC 0000
ACC 0000
B 0000
PSW 0000
SP 0007
DPTR 0000
RAM are all zero.
 Pin description of 8051

• /EA（pin 31）：external access

– There is no on-chip ROM in 8031 and 8032 .
– The /EA pin is connected to GND to indicate the
code is stored externally.
– /PSEN ＆ ALE are used for external ROM.
– For 8051, /EA pin is connected to Vcc.
– “/” means active low.
• /PSEN（pin 29）：program store enable
– This is an output pin and is connected to the OE pin
of the ROM.
 Pin description of 8051

• ALE（pin 30）：address latch enable

– It is an output pin and is active high.
– 8051 port 0 provides both address and data.
– The ALE pin is used for de-multiplexing the address and data by
connecting to the G pin of the 74LS373 latch.
• I/O port pins
– The four ports P0, P1, P2, and P3.
– Each port uses 8 pins.
– All I/O pins are bi-directional.
 Pin description of 8051

The 8051 has an on-chip oscillator but

requires an external clock to run it.
• A quartz crystal oscillator is connected to
inputs XTAL1 and XTAL2.
• It also needs 2 capacitors of 30pF value.
• One side of each capacitor is connected to
the ground as shown below:
 Pin description of 8051

C2
XTAL2
30pF

C1
XTAL1
30pF

GND
 Pin description of 8051

If you want to use a frequency N XTAL2

source other than a crystal C
oscillator, such as TTL
EXTERNAL
oscillator, it will be connected OSCILLATOR
to XTAL1; XTAL2 is left SIGNAL XTAL1
unconnected.

GND
 Pins of I/O Port

• The 8051 has four I/O ports

– Port 0 （pins 32-39）：P0（P0.0～P0.7）
– Port 1（pins 1-8） ：P1（P1.0～P1.7）
– Port 2（pins 21-28）：P2（P2.0～P2.7）
– Port 3（pins 10-17）：P3（P3.0～P3.7）
– Each port has 8 pins.
• Named P0.X （X=0,1,...,7）, P1.X, P2.X, P3.X
• Ex：P0.0 is the bit 0（LSB）of P0
• Ex：P0.7 is the bit 7（MSB）of P0
• These 8 bits form a byte.
• Each port can be used as input or output (bi-direction).
 Pin Description of the 8051
• P1, P2, and P3 have internal pull-up resisters.
– P1, P2, and P3 are not open drain.
• P0 has no internal pull-up resistors and does not
connects to Vcc inside the 8051.
– P0 is open drain.
– Compare the figures of P1.X and P0.X.
• However, for a programmer, it is the same to program
P0, P1, P2 and P3.
• All the ports upon RESET are configured as output.
 Registers
In CPU, registers are used to
store information temporarily. That
information could be a byte of data to be
processed, or an address pointing to the
data to be fetched. 8051 have 8-bit
registers

D7 D6 D5 D4 D3 D2 D1 D0
MSB LSB
 The most widely used registers
are A (accumulator), B, R0-R7,DPTR
(Data Pointer), PC (Program Counter). All
the registers except DPTR and the
program counter are 8 bits. DPTR and PC
are 16 bits.
 Registers
A

R0
DPTR DPH DPL
R1

R2 PC PC
R3

R4 Some 8051 16-bit Register

R5

R6

R7

Some 8-bitt Registers of

the 8051
 Registers
Program Counter (PC)
PC points to the address of the next
instruction to be executed. As the CPU fetches
the opcode from the program ROM, the PC is
incremented to point to the point to the next
instruction. This means that the 8051 can
access program address 0000-FFFFH, a total of
64Kbytes of code. It is also called instruction
pointer
 Flag Bit

8051 has a flag register to

indicate arithmetic conditions such as
carry bit. The flag register of 8051 is called
Program Status Word (PSW) register.
 PSW (Program Status Word)
• Its an 8 bit register.
• Although it is an 8 bit register, only 6 bits of it are
used.
• The two unused bits are user definable flags.
• Four bits are called conditional flags, they
indicate some conditions that result after an
instruction is executed. These 4 are CY (carry),
AC (Auxiliary Carry), P (Parity) and OV (Over
Flow).
• The bits PSW.3 and PSW.4 are designated as
RS0 and RS1, respectively are used to change
the bank registers.
 CY AC F0 RS1 RS0 OV -- P

CY PSW.7 Carry Flag.

AC PSW.6 Auxiliary Carry Flag.
F0 PSW.5 Available to the user for general purpose.
RS1 PSW.4 Register bank selector bit 1.
RS0 PSW.3 Register bank selector bit 0.
OV PSW.2 Overflow flag.
-- PSW.1 User-definable bit.
P PSW.0 Parity flag.
RS1 RS0 Register bank Address
0 0 0 00H-07H
0 1 1 08H-0FH
1 0 0 10H-17H
1 1 1 18H-1FH
• CY flag:- This flag is set when there is a carry out from
the D7 bit. This flag bit is affected after an 8-bit addition
or subtraction.

• AC flag :- If there is a carry from D3 to D4 during ADD or

SUB operation, this bit is set; otherwise cleared.

• P flag :- It reflects the number of 1’s in the A

(accumulator) register only. If A register contains an odd
number of 1’s, then P=1.If its even, then P=0.
• OV Flag :- This is set whenever the result
of a signed number operation is too large,
causing the high order bit to overflow into
sign bit.
Examples:
1)38h+2Fh=67

0001 1100
+0010 1111
0110 0111

CY=0no carry beyond D7.

AC=1carry from D3 to D4.
P=1 since accumulator has an odd number of 1’s.
8051 register banks and stacks
• 128 bytes of RAM
• Address range from 00-7Fh
• 128bytes are divided into 3 different
groups.
 32 bytes (00h-1Fh)Register banks and stacks.
 16bytes (20h-2Fh) bit addressable read/write
memory.
 80bytes (30h-7Fh)scratch pad area.
7F

30
2F

20
1F
18
17
10
0F
08
07
00
 Register banks in 8051
32 bytes are set for register banks and
stack.32 bytes are divided into 4 banks of
registers in which each bank has 8
registers, R0-R7.
RAM location Register bank
00-07 0
08-0F 1
10-17 2
18-1F 3
 Stack in 8051
• It is a section of RAM.
• Stack is used to store information
temporarily.
• The information could be data or address.
• CPU needs this storage area since there
are only a limited number of registers.
 How stack is accessed?
• Since stack is a section of RAM, there must be
register inside the CPU to point to it.
• The register used to access the stack is called
Stack Pointer (SP).
• SP is 8 bits wide. It can take values 00-FFh.
• When powered up SP contains value 07.
• Storing of a CPU register in stack is called
PUSH and pulling the contents is called POP.
 Addressing Modes
• The CPU can access data in various ways. The
data could be in a register or in memory or be
provided as an immediate value. These various
ways of accessing data are called addressing
modes.
• Total 5 addressing modes:
1)Immediate
2)Register
3)Direct
4)Register indirect
5)Indexed
 Immediate addressing mode
• The source operand should be a constant.
• Immediate data must be preceded by the pound sign “#”.
• This mode can be used to load information into any of the registers,
including the DPTR register.
• Ex:
MOV A,#25h ;load 25h into A
• Although DPTR is 16 bit, it can be accessed as two 8-bit registers,
DPH and DPL.
• Ex:
MOV DPTR, #2550h
is same as,
MOV DPL, #50h
MOV DPH,#25h
 Immediate addressing mode
• Value>65535(FFFFFh) is illegal, since it is
16-bit.
• This addressing mode can also be used to
send data to 8051 ports.
 Register Addressing Modes
• Involves the use of registers to hold the data to be manipulated.
• Ex:
MOV A, R0 ;copy contents of R0 into A
• The source and destination registers must match in size.
• Ex:
MOV DPTR,A ;error
Because DPTR (Destination) is 16 bit and A (Source) is 8 bit.
• We can move data between Accumulator and Rn (for n=0 to7), but
movement of data between Rn is not allowed.
• Ex:
MOV R4,R7 ;Invalid
 Register Addressing Modes
• In the above 2 addressing modes, the operands
are either inside one of the registers or tagged
along with the instruction itself.
• But in most programs, data to be processed is
often in some memory location of RAM or in the
code space of ROM. The ways to access these
data are:-
• Direct, Register Indirect, Indexed
• Inorder to access data stored in RAM or register
of 8051, we can use Direct or Register indirect.
 Direct addressing Mode
• Entire RAM (128bytes) can be accessed using this addressing
mode.
• It is most often used to access RAM location 30-7Fh.
• This is because register bank location are accessed by the register
names of R0-R7, but there is no such name for other RAM locations.
• The ‘#’ symbol distinguishes between the direct addressing and
immediate addressing mode.
• In this addressing mode, the data is in a RAM memory location
whose address is known, and this address is given as part of
instruction.
• Ex:
MOV R0,40h ;save the contents of RAM location 40h in R0
MOV 56h,A ;save the contents of A in RAM location 56h.
 Direct addressing Mode
• RAM locations 0 to 7 are allocated to bank 0 registers R0-R7. These
registers can be accessed in 2 ways.
• Ex:
MOV A,4 ;is same as
MOV A,R4 ;which means copy R4 into A
Register Indirect addressing Mode
• Here register is used as a pointer to the data.
• If the data is inside CPU, only registers R0 and
R1 are used for this purpose.
• When R0 and R1 are used as pointers, i.e.,
when they hold the address of RAM, they must
be preceded by “@” sign.
• Ex:
MOV A,@R0 ;move contents of RAM location whose address is
;held by R0 into A.
 Register Indirect addressing Mode
MOV @R1,B ;move contents of B into RAM location whose address is held
;by R1.

In the absence of @ sign, MOV will be interpreted as an

instruction moving the contents of register R0 to A,
instead of contents of memory location pointed to by R0.
Register Indirect addressing Mode
Limitations
R0 and R1are the only registers
that can be used for pointers in register
indirect addressing mode. Since R0 and
R1 are 8 bits wide, their use is limited to
accessing any information in the RAM.
If we need to access data stored
in external RAM or in code-space of on-
chip of ROM, we need to use 16-bit
address.
 Indexed addressing mode
• It is used in accessing data elements located in the
program ROM space of 8051.
• Instructions for this purpose is
MOVC A,@A+DPTR.
• The 16 bit register DPTR and register A are used to form
the address of the data elements stored in on-chip ROM.
• Because these data elements are stored in the program
space ROM of 8051.
• Instruction MOVC represents code space ROM of 8051.
• Here the contents of A are added with 16 bit DPTR to
form 16 bit address of needed data.
• Inorder to access external memory, we have to use
MOVX instruction.
 Checksum byte
To ensure the data integrity of
ROM contents every system must perform
the checksum byte calculation. The
process of checksum will detect any
corruption of the contents of ROM.
One of the causes of ROM
corruption is current surge, when the
system is turned on or during operation.
 Checksum byte
To ensure data integrity in
ROM, the checksum process uses what is
called checksum byte.
Checksum byte is the extra
byte that is tagged to the end of a series of
bytes of data.
 Checksum byte
To calculate checksum byte of a series of
bytes of data, the following steps can be
taken:
1.Add the bytes together and drop the
carries.
2.Tke the 2’s compliment of the total sum;
this is the checksum byte, which becomes
the last byte of the series.
 Reasons for writing programs in C
instead of Assembly
• It is easier and less time consuming to
write in C than Assembly.
• C is easier to modify and update.
• You can use available in-function libraries.
• C code is portable to other
microcontrollers with little or no
modification.
 C data types for 8051
Unsigned char

• 8-bit datatype.
• value range from 0-255(00-FFh).

Signed char

• 8-bit datatype.
• D7 of D7-D0 represent sign(-ve or +ve).
• We have 7 bits for value of signed number.
• Range from -128 to 127.
• Default is signed value.
Unsigned int

• 16bit datatype.
• value in a range of 0-65535.
• used to define 16-bit memory address.
• 8051 is 8-bit microcontroller, so int datatype take
2bytes of RAM.
Signed int
• 16 bit datatype.
• Uses MSB (D15 of D15-D0) to represent
sign(-ve or +ve).
• 15 bit for magnitude.
• Value range from -32768 to 32767.
sbit (single bit)
• Keyword used to access single bit addressable
registers.
• Allows access to the single bits of the SFR
registers.
bit and sfr
• bit datatype allows to access single bit of bit
addressable memory space of RAM 20-2Fh.
• sfr is used to access byte size SFR registers i.e.,
memory space 80-FFh.
 Time Delay
There are two ways to create a
time delay 8051:

1.Using a simple loop

2.Using the 8051 timers
 8051 Timers
There are two timers/counters:
Timer 0
Timer 1

They can be used as either timers to

generate the time delay or as counters to
count the events happening outside the
microcontroller.
 8051 Timers

Both Timer 0 and Timer 1 are 16

bits wide. Since the 8051 has an 8-bit
architecture, each 16-bit timer is accessed
as 2 separate registers of low byte and
high byte.
 8051 Timers
Timer 0 Register
The 16-bit registers of Timer 0 are
accessed as low byte and high byte. The
low byte is called TL0 (Timer 0 low byte)
and the high byte register is called TH0
(Timer 0 high byte). These registers can
be accessed like any other register, such
as A,B,R0,R1, etc.
 TH0 TL0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
Timer 1 register
Timer 1 is also 16 bit register, and
its 16-bit register is split into two bytes,
referred to as TL1(Timer 1 low byte) and
TH1 (Timer 1 high byte). These registers
are accessible in the same way as Timer
0.
 TH1 TH0
D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
TMOD (Timer mode) register
Both Timers 0 and 1 use the same
register, called TMOD, to set various timer
operation modes. TMOD is an 8-bit register in
which the lower 4 bits are set aside for Timer 0
and upper 4 bits for Timer 1.

In each case, the lower 2 bits are used

to set the timer mode and the upper 2 bits to
specify the operation.
MSB LSB
GATE C/T M1 M0 GATE C/T M1 M0
Timer 1 Timer 0
• GATE
Every timer has a means of
starting and stopping. Some do this by
software, some by hardware and some by
both.
If GATE=0, if we use software for
this purpose.
If GATE=1, if we use external
hardware for this purpose.
• C/T
Used to select Timer/Counter
operation.
Set (1) Counter.
Cleared(0) Timer.
• M1 & M2
These are modes bits used
inorder to select the different operating modes of
the timer.
M1 M0 Mode Operating Mode
0 0 0 13-bit timer mode
0 1 1 16-bit timer mode
1 0 2 8-bit auto-reload
1 1 3 Split timer mode
 TCON register
• 8-bit addressable register.
• TR0 and TR1 flags used to turn on or turn
off the timer are part of TCON (Timer
Control) register.

TF1 TR1 TF1 TR0 IE1 IT1 IE0 IT0

7 6 5 4 3 2 1 0
• Clock source for timer

The crystal frequency attached to

the 8051 is the source of the clock for the
timer. The frequency of the timer is always
1/12th the frequency of crystal attached to
8051.
 Mode 1
 It is a 16-bit timer; it allows values of 0000 to FFFFH to
be loaded into timer’s registers TL and TH.
 After TL and TH are loaded with 16-bit initial value, the
timer must be started by setting TR0 for timer 0 and TR1
for timer 1.
 After the timer is started, it starts to count up. It counts
up until it reaches its FFFFH. When it rolls over from
FFFFH to 0000, it sets high a flag bit called TF (timer
flag).
 Now stop the timer bit by clearing TR0 and TR1
respectively.
 Each timer is having its own flag TF0 for T0 and TF1 for
T1.
 After the timer reaches its limit and rolls over, in order to
repeat the process reload TH and TL with original value
and TF must be reset to 0.
Finding the values to be loaded into timer
1)Divide the desired time delay by
1.085micros.Take the result as n.
2)Subtract n from 65536 (65536-n).
3)Convert the result to hex, where yyxx is
the initial hex value to be loaded into
timer’s register.
4)Set TL=xx, TH=yy.
 Mode 0
Its exactly similar to mode1 except that it
is a 13 bit timer instead of 16bit.
Hold values between 0000-1FFFH in TH
and TL.
Therefore, when the timer reaches its
maximum of 1FFFH it rolls over to 0000
and TF is raised.
 Mode 2
 8-bit timer
 Allows values from 00-FFH to be loaded to TH.
 After TH is loaded with 8-bit value, the 8051 will give a copy of it to
TL.
 Then the timer is started.
 After timer is started, it starts count by incrementing the TL register.
 It counts up until it reaches FFH.
 When it rolls from FFH to 00H, TF is set; TF0 for timer 0 and TF1 for
Timer 1.
 TL is reloaded automatically with the original value kept by TH
register.
 To repeat the process, simply clear TF and let it go without reloading
the original value by programmer.
 Here TH is unchanged. It holds the copy of the original value.
 Mode 3
Timer mode 3 is a split-timer mode.
When Timer 0 is placed in mode 3, it
essentially becomes two separate 8-bit
timers. That is to say, Timer 0 is TL0 and
Timer 1 is TH0.
Both timers count from 0 to 255 and
overflow back to 0.
All the bits that are related to Timer 1 will
now be tied to TH0.
 Counter
If C/T of TMOD is 1, it is counter, it takes
its pulses from outside the 8051.
The counter counts up as pulses are fed
from T0 and T1.
In T0, P3.4 provides clock pulse and
counter counts up for each clock pulse
coming from that pin.
For T0, each pulse coming in P3.5 makes
the counter count up.
 Types of data transfer
• Two ways of transferring data:

Parallel
Serial
• In parallel data transfer, often 8 or more lines (wire
conductors) are used to transfer data to a that is only a
few feet away.

• Ex: printers, hard disk

Each uses cables with many wire strips.

Although in such cases a lot of data can be transferred in a

short amount of time by using many wires in parallel, the
distance cannot be great.
• To transfer to a device located many
meters away, the serial method can be
used.
• In serial communication, the data is send
one bit at a time.
 Basics of serial communication
• Serial communication is used for