Sie sind auf Seite 1von 19

CHAPTER 2

LOGIC GATES
BASIC LOGIC GATES
 Logic gates are the basic  7 types of Logic Gates:
building blocks to form  INVERTER
digital circuit.
 AND
 It has 1 o/p terminal.
 OR
 O/p either HIGH
 NAND
(logic 1) or LOW (logic
 NOR
0) depend on digital
level at i/p.  Exclusive – OR
 Exclusive - NOR

ECE351 Chapter 2: Logic Gates 2


2.1.1 NOT / INVERTER
 Used to complement a digital signal.
 It has only 1 output.

INPUT OUTPUT

A X
0 1
X  A
1 0

ECE351 Chapter 2: Logic Gates 3


2.1.2 AND GATE
 It has 2 or more input.
 2n possible input combinations, where n = no. of
bit.
 Operation for AND gates is multiplication (x ).
 O/p is HIGH when both input (A and B) are HIGH.
INPUT OUTPUT
A A B X
OUTPUT, X
B 0 0 0
0 1 0
1 0 0
X  A B
1 1 1

ECE351 Chapter 2: Logic Gates 4


TIMING DIAGRAM
Draw the waveform of X where X = A.B

ECE351 Chapter 2: Logic Gates 5


2.1.3 OR GATE
 It has 2 or more input.
 2n possible input combinations, where n is no. of
bit.
 Operation for OR gates is adding (+).
 O/p is HIGH whenever input A and B are HIGH or
both i/p are HIGH. INPUT OUTPUT
A B X
A
X 0 0 0
B
0 1 1
1 0 1
X  A B 1 1 1
ECE351 Chapter 2: Logic Gates 6
2.1.4 NAND GATE
 The operation is SAME as AND gate.
 The o/p of NAND gate is inverted from o/p of
AND gate.

INPUT Output Output


AND NAND
A B X
X  A B
0 0 0 1
Denotes inversion
0 1 0 1
1 0 0 1
1 1 1 0
ECE351 Chapter 2: Logic Gates 7
2.1.5 NOR GATE
 The operation is the SAME as OR gate.
 The o/p NOR gate is inverted from OR gate.

INPUT OUTPUT
X  A B A B X
0 0 1
0 1 0
1 0 0
X  A B  A  B 1 1 0

ECE351 Chapter 2: Logic Gates 8


2.1.6 EXCLUSIVE – OR GATE

INPUT OUTPUT
A B X
0 0 0
0 1 1
X  A B
1 0 1
X  AB  A B 1 1 0

ECE351 Chapter 2: Logic Gates 9


2.1.7 EXCLUSIVE-NOR GATE

INPUT OUTPUT
A B X
0 0 1
0 1 0
X  A B 1 0 0
X  A.B  A.B 1 1 1

ECE351 Chapter 2: Logic Gates 10


SUMMARY of LOGIC GATES

ECE351 Chapter 2: Logic Gates 11


2.2 IC GATES
 Digital logic gate circuits are manufactured as integrated circuits.
 A number of gates is enclosed in a single package called Dual Inline
Package (DIP) housing for plug in or feedthrough mounting, or Small
Outline Integrated Circuit (SOIC) for surface mounting.
 Part numbers specify what type of gates are enclosed.
 These part numbers are industry standards, meaning that a "74LS02"
manufactured by Motorola will be identical in function to a "74LS02"
manufactured by Fairchild or by any other manufacturer.
 Logic circuit part numbers beginning with "74" are commercial-grade TTL.
If the part number begins with the number "54", the chip is a military-grade
unit: having a greater operating temperature range, and typically more
robust in regard to allowable power supply and signal voltage levels.

ECE351 Chapter 2: Logic Gates 12


Packaging - DIP

Packaging -
SOIC

ECE351 Chapter 2: Logic Gates 13


Common
TTL "DIP" circuit packages

ECE351 Chapter 2: Logic Gates 14


Universality of NAND & NOR Gates

 NAND & NOR gates can be used as:


 Inverter gates
 AND gates
 OR gates

ECE351 Chapter 2: Logic Gates 15


Universality of NAND
A X

ECE351 Chapter 2: Logic Gates 16


Universality of NOR
A X

ECE351 Chapter 2: Logic Gates 17


Exercise
1.Draw the output waveform C and D, given the input waveforms A and B as shown below.

ECE351 Chapter 2: Logic Gates 18


Exercise (cont’d)
2. Refer to the circuit and complete the truth table given.
A B C Z
0 0 0
0 0 1
0 1 0
0 1 1
1 0 0
1 0 1
1 1 0
1 1 1

ECE351 Chapter 2: Logic Gates 19

Das könnte Ihnen auch gefallen