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c Parts of a Computer System:
c 1. A microprocessor
c 2. (a) Primary memory---Semiconductor memories as Random
Access Memory(RAM), Read Only Memory(ROM) and fast
accessible catches.
c (b) Secondary memory Ȃ magnetic memory located in hard
disks, diskettes and cartridge tapes, optical memory in CD-
ROMs or memory sticks (in mobile computers) . Using these
memories, user programs can be loaded into the primary
memory and run.
c 3. I/O units such as touch screen, modem, fax cum modem etc.
c 4. Input units Ȃ keyboard, scanner, mouse etc.
c 5. Output units --- LCD screen, Video monitor , printer etc
c 6. Networking units --- Ethernet card, bus drivers , front end
processor based server etc.
c 7. An operating system
c Major components of Embedded Systems:
c 1. Embedded hardware similar to a computer--- Software is
usually embedded in the ROM or flash memory.
Embedded system do not need a secondary disk and CD
memory as in computer.
c 2. Embedded main application software. Application
software concurrently perform a series of tasks or process
or threads
c 3. Embedded real time operating system (RTOS) . This
supervises the application software running on hardware
and organizes access to a resources according to the
priorities of task in the system. This sets the rules during
the execution of the application software.
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Input Devices
interfacing/Drive
r Circuits
Program
Processor memory and
Power Data Memory
Supply, System
Reset and Serial Application
oscillator Timer Communication Specific
Circuits Ports Circuits
Interrupt
Controller Parallel Ports
Outputs Interfacing/Driver
Circuits
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c 6actors to be considered in selection of Processor for
embedded system:
c 1. Instruction set: processing based on the instruction
available in a predefined general purpose instruction
set results in quick system development.
c 2.Maximum bits in an operand(8 or 16 or 32) in a single
arithmetic or logical operation. Accordingly 8 or 16 or
32 bit processor has to be selected.
c 3. Clock frequency in MHz and processing speed in
Million Instructions per Second(MIPS).
c 4. Processor ability to solve complex algorithms while
meeting deadlines for their processing.
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c 3. skills for sophisticated Embedded System designer:
c Embedded system hardware engineer should have
skills in hardware design and the knowledge of C/C++
and Java and other programming tools.
c Software engineer should have basic knowledge in
hardware and a thorough knowledge of C, RTOS and
other programming tools.
c Semaphore:
c A special variable operated by the OS functions which are used to take note of certain actions to
prevent another task or process from proceeding further.
c Cooperative schedulers:
c These are scheduled such that each ready tack waits till the running one is finished.
c Preempting scheduling: A scheduling algorithm in which a higher priority task is forced (pre-
empted) to block by the scheduler to let a higher priority task.
c ASIP(Application Specific Instruction Set): A processor with an instruction set designed for specific
applications on a VLSI chip.
c ASSP( Application Specific System Processor): A processing unit for system specific tasks (e.g.: image
processor etc)
c Cache: A fast read and write on chip memory for the processor execution unit. It stores instruction
and data fetched in advance from ROM or RAM for use in execution unit and for data write back for
RAM.
c Assembler: A program that translates assembly language software into the machine codes placed in a
file called Ǯ.exeǯ(executable )file.
c 6PGA: 6ield Programmable Gate Array. The chip has a larger number of arrays with each element
having links. each element of an array consists of several XOR, AND, OR, multiplexer, de multiplexer
and tri-state gates. Complex digital circuit functions are created by appropriate programming of links
on transferring data from memory .
c Modem: A circuit to modulate the outgoing bits to pulses usually used on the telephone lines and to
demodulate the incoming pulses into bits for incoming messages.
c UART: universal asynchronous transmitter and receiver.
c 6811 Architecture:
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c Memory map :
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0000H to o166H 512 RAM Random Variables and
Access stack
Memory
1000H to 1036 H 64 I/O Input / Output
devices
B600H to B766H 512 EEPROM Electrically Constants
erasable unique to each
system
D000H to 6666 H 12K EPROM One Time Programs and
Programmable fixed
(OTP) Constants
c Configurations of I/O pins:
Port A PA2-PA0 PA6-PA4 PA7,PA3 Timer
Port B ---- PB7-PB0 ----- High order
addres
Port C ---- ---- PC7-PC0 Low order
address and
data bus
Port D ---- ---- PD5-PD0 SCI and SPI
Port E PE7-PE0 ---- ---- Analog to
Digital
Converter
c SCI--- Serial Communication Interface
c SPI--- Serial Peripheral Interface
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c Address Map of MC68HC11D3:
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0000-0066 256 RAM Variables and stack
1000-1036 64 I/O
B600-B766 512 EEPROM Constants unique to
each system
E000-6666 8192 ROM Programs and fixed
constants
c Configurations of I/O pins:
Port A 3 4 1 Timer
Port B ---- 8 ---- High order
address
Port C ---- ---- 8 Low order
address D
Port D ---- ---- 8 SCI and SPI
Port E 8 ---- ---- ADC
c MC68HC11 in Expanded Mode:
c During the development stage, A, D or E series 6811 is used
in expanded mode because the edit/compile/down load
time is short and we can utilize a debugger.
c Ports B and C are used for address and data bus.
c External ROM and RAM are used and 6811 acts like a
microprocessor.
c Adding a debugger like Bit Users 6ast 6riendly Aid to Logic
Operation (BU66ALO) in PROM provides features like
down load, break points, single stepping, viewing memory
and I/O.
c MOTOROLA 6811 EVB board has three 8 KB PROM/RAM
sockets and a 6850 serial ports.
c 6811 EVB board has 8K of PROM, 16K of PROM/RAM and
256 bytes of RAM.
c Address Map:
[
0000H-0035H RAM Internal to 6811, can be used by programmer
0036H-0066H RAM Internal to 6811, Buffalo variables , interrupt
vectors
1000H-1036H I/O Internal I/O of 6811/6824 system
4000 Switch Output 1 to this location to use the HOST
serial port; 0 to use PD0 for other purposes.
6000H-7666H 8K RAM/PROM Designer can put software here
9000H-9801H 6850 Universal Asynchronous Receiver/Transmitter
B600H-B766 512 bytes of Internal to 6811, electrically erasable PROM
EEPROM
CoooH-D666H 8K RAM/PROM Designer can put software here
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c General features of MC68HC708XL36:
c 1. 36 kb of EPROM
c 2. 1024 bytes of R AM
c 3. 16-bit, four channel Timer interface module
c 4. Synchronous SPI module
c 5. Asynchronous SCI module
c 6. Three Ȃ channel DMA module
c 7. 54 bidirectional I/O lines
c Memory map of MC68HC708XL36:
c It has eight external I/O ports and an internal counter.
c Memory clock period is twice the crystal clock period.
c If the clock frequency is of 16-MHz, then TCNT is
incremented in every 125ns.
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H:X
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SP
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PC
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c At the high end of range, memories that can never lose its
stored data even after power is no longer supplied.
c ǮIn System programmable Memoryǯ are those in which
programs are written by using the processor that appears in
the embedded system which uses that memory only.
c A memory which is not in system programmable must be
written by some external means.
c Normally designers of a embedded system needs a memory
with the highest write ability and highest storage
permeance.
c Write ability and storage permeance are inverse to each
other.
c Highly writable memory requires more area and more
power.
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c 6lash memory is used to store a program of rarely
changed configuration data such as an IP address, date
on which the product must be next serviced etc.
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c These contains a SRAM along with EEPROM or 6lash
which is having same capacity as that of SRAM.
c SRAMs transfers all its contents to EEPROM or 6lash just
before switching off the power supply or whenever
instructed to store the data.
c When power is turned on back, data from EEPROM or
flash is reloaded to SRAM.
c Cache memory:
c These are temporary memories , faster but expensive one.
c Cache is designed by using SRAM. These are faster and
costlier than main memory.
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c The battery supplying power to microprocessor, radio
and memory must also last for about eight hour which
may not possible easily.
c Thus software must identify the hardware parts which
are not needed at any time and turn those parts off.
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c DAC and ADC are necessary because even though
embedded systems deal with digital values, an embedded
system surroundings typically involve many analog signals.
c We can compute the digital values from the analog values
and vice-versa using the following ratio
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c Where Vmax --- maximum voltage that the analog signal
can assume
c n is the number of bits available for the digital encoding
c e--- present analog voltage
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c DAC gain error is a shift in the slope of the Vout V/S
Vin static response.
c DAC offset error is a shift in the Vout V/S Vin static
response.
c DAC transient response has 3 components
c -----Delay phase
c ----- Slewing phase
c ------ Ringing phase
c If m,n be the digital inputs, f(n) be the analog output
of the DAC, ϙ be the DAC resolution ,then DAC is
linear if f(n+1)-f(n)= f(m+1)-f(m) = ϙ for all n,m
c DAC is non linear if f(n+1)-f(n) ό f(m+1)-f(m) = ϙ for
all n,m
c Sources and solutions to DAC errors:
Incorrect resistor values Precision resistors with low
tolerances
Drift in resistor values Precision resistors with good
temperature coefficients
White noise Reduce BW using a low-pass
filter , reduce temperature
Op amp errors Use more expensive devices
with low noise and low drift
Interference from external Schielding , ground planes
fields
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c Besides direct cost of the individual components in
DAC interface, other consideration that affect cost
includes ---
c (1) power supply requirements
c (2) manufacturing costs
c (3) the labor involved in individual calibration if
required
c (4) software development costs
c DAC waveform generation :
c One of the application of DAC is for waveform generation.
c Hardware/software approach is used along with output
compare interrupt for timing.
c Different approaches are made for waveform generation.
c Method 1.:
c In this approach, time-to-voltage function called wave() is
called to determine the next DAC value to output.
c Output compare interrupt is generated at a regular rate.
This periodic interrupt is used to create the analog output
waveform
c Complex waveforms can be encoded with a small amount
of data.
c Disadvantages are 1. not all the waveforms have a simple
function 2. this software run slower as compared to other
techniques
Program:
unsigned short wave(unsigned short t) {
6loat result , time;
time = 2*pi*((float)t)/1000.0;
//integer t in msec into floating point time in seconds
result= 2048.0+1000.0*cos(31.25*time)-500.0*sin(125.0*time);
return(unsigned short) result;}
//6811
#define rate 2000
#define oc5 OXO8
Unsigned short Time; // Inc every 1 ms
#pragma interrupt_handler TOC5handler()
Void TOC5handler(void){
T6LG1=OC5;//Ack interrupt
TOC5=TOC5+Rate; Executed every 1ms
Time++;
DACount (wave(Time));}
c Method2:
c In this approach, the waveform information is stored
in a large statically allocated global variable.
c During every interrupt, new value is fetched from this
data structure and sent to the DAC.
c Output compare interrupt occurs at regular rate
c 32 interrupts occur per waveform
c
c Simple data structure for the waveform:
unsigned short I;//incremented every 1ms
const unsigned short wave[32]= {
3048,2675,2472,2526,2755,2957,2931,2597,2048,1499,1165,1139,1341,1570,1
624,1421,1048,714,624,863,1341,1846,2165,2206,2048,1890,1931,2250,2755,
3233,3472,3382};
Program to generate periodic interrupt to create the analog output
waveform
//6811
#define Rate 2000
#define OC5 OxO8
#pragma interrupt_handler TOC5handler()
Void TOC5handler(void){
T6LG1=OC5; // Ack interrupt
TOC5=TOC5+Rate; //Exexuted every 1 ms
if((++I)==32) I=0;
DACount(wave[I])l}
c Method 3: Linear interpolation method
c In this method, small data structure is used instead of
a big table.
c Linear interpolation is used to recover the data points
in between the stored samples.
c In the example given below, only 9 data points are
stored in the data structure instead of 32 data points
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c Because of the large input impedance into the op amp
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