Fault Tree Analysis(FTA)

Lecture delivered by Dr. Ashish

 FTA
 Fault Tree Analysis is a common tool in business and engineering. The fault tree itself is a graphic model that
displays the various combinations of equipment faults and failures that can result in the accident event.
 Purpose: Identify combinations of equipment failures and human errors that can result in an accident event.
Most Used Gate Symbols

Or And Exclusive Primary Inhibit

Gate Gate Or Gate And Gate
Gate
Transfer Symbols
Transfer symbols are used to connect the inputs and outputs of related fault trees, such as the fault tree
of a subsystem to its system.

The gates work as follows:

OR gate - the output occurs if any input occurs.
AND gate - the output occurs only if all inputs occur (inputs are independent).
Exclusive OR gate - the output occurs if exactly one input occurs.
Priority AND gate - the output occurs if the inputs occur in a specific sequence specified by a conditioning event.
Inhibit gate - the output occurs if the input occurs under an enabling condition specified by a conditioning event.
Equipment failure REACTOR EXPLOSION
example data 3.6  10-4 F/YR

RUNAWAY BURSTING
REACTION DISC FAILS
0.02
Probability
1.8  10-2 F/YR of failure
on demand

FLOW CONTROL TEMPERATURE

LOOP FAILS INTERLOCK FAILS

0.3 F/YR 0.06

VALVE THERMO -
VALVE FAILS
STICKS COUPLE &
TO CLOSE
OPEN RELAY FAIL
0.2 F/YR 0.1 F/YR
 The following figure shows a simple fault tree diagram in which either A or B must occur in
order for the output event to occur. In this diagram, the two events are connected to an OR
gate. If the output event is system failure and the two input events are component failures,
then this fault tree indicates that the failure of A or B causes the system to fail.

The RBD equivalent for this configuration is a simple series system with two blocks, A and B, as
shown next.

Basic Gates

Gates are the logic symbols that interconnect contributory events and conditions in a fault
tree diagram. The AND and OR gates described above, as well as a Voting OR gate in which
the output event occurs if a certain number of the input events occur (i.e., k-out-of-
n redundancy), are the most basic types of gates in classical fault tree analysis.
AND Gate
In an AND gate, the output event occurs if all input events occur. In system reliability terms, this
implies that all components must fail (input) in order for the system to fail (output). When using
RBDs, the equivalent is a simple parallel configuration .

Example
Consider a system with two components, A and B. The system fails if both A and B fail. Draw the fault tree and reliability
block diagram for the system. The next two figures show both the FTD and RBD representations.

The reliability equation for either configuration is:

OR Gate
In an OR gate, the output event occurs if at least one of the input events occurs. In system reliability terms, this implies
that if any component fails (input) then the system will fail (output). When using RBDs, the equivalent is a series
configuration.
 Example
Consider a system with three components, A, B and C. The system fails if A, B or C fails. Draw the fault tree and
reliability block diagram for the system. The next two figures show both the FTD and RBD representations.

The reliability equation for either configuration is:

Voting OR Gate

In a Voting OR gate, the output event occurs if or more of the input events occur. In system reliability terms, this
implies that if any k-out-of-n components fail (input) then the system will fail (output).The equivalent RBD construct is a
node and is similar to a k-out-of-n parallel configuration with a distinct difference, as discussed next. To illustrate this
difference, consider a fault tree diagram with a 2-out-of-4 Voting OR gate, as shown in the following figure.

In this diagram, the system will fail if any two of the blocks
below fail. Equivalently, this can be represented by the RBD
shown in the next figure using a 3-out-of-4 node.
 In this configuration, the system will not fail if three
out of four components are operating, but will fail if
more than one fails. In other words, the fault tree
considers k-out-of-n failures for the system failure
while the RBD considers k-out-of-n successes for
system success.

Increasing the Flexibility

Classical Voting OR gates have no properties and cannot fail or be repaired (i.e., they cannot be an
event themselves). In BlockSim, Voting OR gates behave like nodes in an RBD; thus, they can also
fail and be repaired just like any other event. By default, when a Voting OR gate is inserted into a
fault tree diagram within BlockSim, the gate is set so that it cannot fail (classical definition).
However, this property can be modified to allow for additional flexibility.
Example
Consider a system with three components, A, B and C. The system fails if any two components fail.
Draw the fault tree and reliability block diagram for the system. The next two figures show both
the FTD and RBD representations.
 BlockSim
The reliability equation for either configuration is:

Equation above assumes a classical Voting OR gate (i.e., the voting gate itself cannot fail). If the gate
can fail then the equation is modified as follows:

Combining Basic Gates

As in reliability block diagrams where different configuration types can be combined in the same
diagram, fault tree analysis gates can also be combined to create more complex representations.
As an example, consider the fault tree diagram shown in the figures below.
Another combined representation
FTA in case of k out of n fails Simple fail representation
using FTA
Just another example
Fault Trees: Cut Set Algorithm
Fault Trees: Probabilistic Analysis
FTA of lath machine
FTA of lath machine Quantitative analysis

Qualitative analysis