Contents:

• Introduction to PDSPs
• Multiplier and MAC
• Modified Bus Structure & Memory access schemes
PDSPs
• Multiple Access Memory
• Multi-ported memory
• VLIW architecture
• Pipelining
• Special Addressing modes
• On-Chip Peripherals
• TMS320C5x Architecture
 Contents:
• Introduction to PDSPs
• Multiplier and MAC
• Modified Bus Structure & Memory access schemes
PDSPs
• Multiple Access Memory
• Multiported memory
• VLIW architecture
• Pipelining
• Special Addressing modes
• On-Chip Peripherals
• TMS320C5x Architecture
Introduction:
PDSPs: Programmable Digital Signal Processors
are general purpose processors which
are specifically designed for DSP
applications.
PDSP

General Special
Purpose DSP Purpose DSP
General Purpose DSPs
• High speed µp.
• Optimized Architecture and instruction sets
for DSP operations.
• Fixed Point DSPs & Floating Point DSPs
– TMS320C5x -- TMS320C4x
– TMS320C54x -- TMS320C67xx
Special Purpose DSPs

• H/w designed for specific DSP algorithms

– FFT
• PDSP16515A, TM-44, TM-66
• H/w designed for specific applications
– PCM, filtering etc.
• MT93001, UPDSP16256
Selecting DSPs-
• Arithmetic Features- On-chip memory, special instruction and
I/O capability.
• Execution Speed- clock, MIPS, MFLOPS
• Type of arithmetic- fixed and floating point arithmetic
• Word length- signal quality

Applications of PDSPs-
• Communication system
• Audio Signal Processing
• Control and Data acquisition
• Biometric Information Processing
• Image/ Video processing
 Architectures

Von Neumann

Harvard
•Reads relatively
instructions and
large group
execute
of
them
VLIW
simultaneously.
•Combines many simple instructions into
Architecture
a single long instruction word.
•Language compiler or pre-processor
separates program instructions into basic
operations that are performed by the
processor in parallel.
•The instruction and data caches have
a subtle difference:
•instructions are only fetched from
memory
•data can be read from or written to
memory. For the instruction cache, blocks
are copied from main memory to the
cache.
•Instruction register (IR) is the part of
a CPU's control unit that holds
the instruction currently being executed
or decoded.
• An execution unit is a part of the CPU
that performs the operations and
calculations as instructed by the
computer program.
•A register file is an array of
processor registers in CPU.
 Advantages & Disadvantages
of VLIW Architecture
Advantages:
• Increased performance
• Better compiler targets
• Potentially easier to program
• Potentially scalable
• Can add more execution units,
allow more instructions to be
packed.
Disadvantages:
• New kind of programmer/
compiler complexity
• Program must keep track of
instruction scheduling
• Increased memory use
• High power consumption
• Misleading MIPS ratings
Addressing Modes:

• Immediate Addressing
• Indirect Addressing
• Register Addressing
• Memory mapped register Addressing
• Direct Addressing
• Circular Addressing mode
Immediate Addressing:

• Handles constant data