ME 6702 – MECHATRONICS

UNIT-II
MICROPROCESSOR (8085)
&
MICROCONTROLLER (8051)
 IMPORTANT QUESTIONS
• Draw the internal block of 8085 microprocessor & explain each block.

• Explain the pin configuration of 8085 microprocessor.

• Explain addressing modes and its types.

• Explain the timing diagram of 8085 microprocessor with machine cycle

• Explain the architecture of 8051 microcontroller with block diagram.

• Explain the pin configuration of 8051 microcontroller.

Pin configuration of
8085 microprocessor
a) Power supply
b) Frequency signals
c) Data bus
d) Address bus
e) Control bus
f) Interrupt signal
g) Serial I/O signal
h) DMA signal
i) Reset Signal
 Architecture of 8085 microprocessor
Registers:
 Architecture of 8085 microprocessor
Special Purpose D7 D6 D5 D4 D3 D2 D1 D0

Registers S Z X AC X P X CY

S – Sign flag
Z – Zero flag
AC – Auxiliary flag
P – Parity flag
CY – Carry flag
 Architecture of 8085 microprocessor
Instruction Decoder
 Architecture of 8085 microprocessor
Address Buffer
Architecture of 8085 microprocessor
Interrupt control
 Architecture of 8085 microprocessor
Timing & Control
 TIMING DIAGRAM
Status Control
Machine Cycle
S.No Machine Cycle
IO/m S1 S2 RD WR INTA

11 Opcode fetch
Opcode fetch 0 1 1 0 1 1

22 Memory read
Memory read 0 1 0 0 1 1

3 Memory write 0 0 1 1 0 1

4 I/O read 1 1 0 0 1 1

5 I/O write 1 0 1 1 0 1

66 Interrupt
Interrupt ACK
ACK 1 1 1 1 1 0

77 Bus
Bus idle
idle 1 1 1 1 1 1
 TIMING DIAGRAM
Status Control
S.No Machine Cycle
IO/m S1 S2 RD WR INTA

1 Opcode fetch 0 1 1 0 1 1
 TIMING DIAGRAM
Status Control
S.No Machine Cycle
IO/m S1 S2 RD WR INTA

2 Memory read 0 1 0 0 1 1
 TIMING DIAGRAM
Status Control
S.No Machine Cycle
IO/m S1 S2 RD WR INTA

3 Memory write 0 0 1 1 0 1
 TIMING DIAGRAM
Status Control
S.No Machine Cycle
IO/m S1 S2 RD WR INTA

4 I/O read 1 1 0 0 1 1
 TIMING DIAGRAM
Status Control
S.No Machine Cycle
IO/m S1 S2 RD WR INTA

5 I/O write 1 0 1 1 0 1
Pin configuration of
8051 microcontroller
a) Power supply
b) Port 0 (P0.0 to P0.7)
c) Port 1(P1.0 to P1.7)
d) Port 2 (P2.0 to P2.7)
e) Port 3 (P3.0 to P3.7)
f) ALE/Prog
g) XTAL1 & XTAL2
h) PSEN
i) EA/VPP
j) RST
Architecture of 8051 microcontroller
 PROGRAMMABLE
UNIT-III PERIPHERAL
INTERFACE
Pin configuration of
8255 PPI
a) Power supply
b) Port A (PA0 to PA7)
c) Port B(PB0 to PB7)
d) Port C(PC0 to PC7)
e) Data bus buffer
f) Read
g) A1,A0
h) Write
i) Chip select
j) RST
Block Diagram of 8255 PPI
WORKING
WORKING
WORKING
WORKING
WORKING
WORKING
Interfacing a keyboard & a seven segment display
Truth Table of seven segment display
Interfacing a Temperature sensor with 8051
Interfacing a Stepper motor with 8051
X1

X2
Y1 Y2