Instruction Set

• The “x86” name comes from the original 16-bit

Intel processors that used the x86instruction set,
the 8086.
• All processors are based around what’s called an
“instruction set.” This is a set of rudimentary
operations that a chip can perform and
instructions for how to perform them. It tells the
chip how to do basic math and move data
around. The programming language for these
instructions is called assembly language.
General purpose registers
• AX – This is the accumulator. It is of 16 bits and is divided into two
8-bit registers AH and AL to also perform 8-bit instructions.
• It is generally used for arithmetical and logical instructions but in
8086 microprocessor it is not mandatory to have accumulator as
the destination operand.
• Example:
• ADD AX, AX (AX = AX + AX)
• BX – This is the base register. It is of 16 bits and is divided into two
8-bit registers BH and BL to also perform 8-bit instructions.
• It is used to store the value of the offset.

• Example:
• MOV BL, [500] (BL = 500H)
• CX – This is the counter register. It is of 16 bits and is divided into
two 8-bit registers CH and CL to also perform 8-bit instructions.
• It is used in looping and rotation.
• Example:
• MOV CX, 0005
• LOOP

• DX – This is the data register. It is of 16 bits and is divided into two

8-bit registers DH and DL to also perform 8-bit instructions.
• It is used in multiplication an input/output port addressing.
• Example:
• MUL BX (DX, AX = AX * BX)
• SP – This is the stack pointer. It is of 16 bits.
• It points to the topmost item of the stack. If
the stack is empty the stack pointer will be
(FFFE)H. It’s offset address relative to stack
segment.
• BP – This is the base pointer. It is of 16 bits.
• It is primary used in accessing parameters
passed by the stack. It’s offset address relative
to stack segment.
• SI – This is the source index register. It is of 16
bits.
• It is used in the pointer addressing of data and as
a source in some string related operations. It’s
offset is relative to data segment.
• DI – This is the destination index register. It is of
16 bits.
• It is used in the pointer addressing of data and as
a destination in some string related
operations.It’s offset is relative to extra segment.
 ARM
• An ARM processor is one of a family of CPUs
based on the RISC (reduced instruction set
computer) architecture developed by
Advanced RISC Machines (ARM).
 ARM
• ARM makes 32-bit and 64-bit RISC multi-core
processors. RISC processors are designed to
perform a smaller number of types of computer
instructions so that they can operate at a higher
speed, performing more millions of instructions
per second (MIPS). By stripping out unneeded
instructions and optimizing pathways, RISC
processors provide outstanding performance at a
fraction of the power demand of CISC(complex
instruction set computing) devices.
 ARM
• ARM processors are extensively used in consumer
electronic devices such as smartphones, tablets,
multimedia players and other mobile devices,
such as wearables. Because of their reduced
instruction set, they require fewer transistors,
which enables a smaller die size for the
integrated circuitry (IC). The ARM processor’s
smaller size, reduced complexity and lower
power consumption makes them suitable for
increasingly miniaturized devices.
 ARM processor features include:

• Load/store architecture.
• An orthogonal instruction set.
• Mostly single-cycle execution.
• Enhanced power-saving design.
• 64 and 32-bit execution states for scalable
high performance.
• Hardware virtualization support.
JTAG
 Features
• Parallel port JTAG dongle interface, can be
used with all ARM devices for programming
and debugging.
• Uses ARM's standard 2x10 pin JTAG connector
• No need for external power supply, all power
is taken from the target board; supports
targets working with 3.0-3.6 V
• Dimensions 50x40 mm (2x1.6") + 20 cm (8")
cable
 JTAG
• Joint Test Action Group (JTAG) is the common name
used for a debugging, programming, and testing
interface typically found on microcontrollers, ASICs,
and FPGAs. It enables all components with this
interface to be tested, programmed, and/or debugged
using a single connector on a PC board which can daisy
chain them together. (Field-programmable Gate Arrays)
• JTAG is the name of the group that defined the IEEE
1149.1 standard. This standard defines the Test Access
Port (TAP) controller logic used in processors with JTAG
interfaces.
• A full JTAG interface requires five pins. In
many systems, the optional TRST pin is not
implemented, resulting in a four wire
interface.
Pin Name JTAG Pin Description

TMS Test Mode Select

TCK Test Clock Input
TDI Test Data Input
TDO Test Data Output
TRST Test Reset (optional)
 Typical Implementation

• The figure below illustrates how a typical JTAG

system could be configured:
• TMS - selects the device under test
• TCK - clocks data into TDI
• TDI - the test or programming data input,
cascaded through all JTAG compliant devices
in the system
• TDO - the resulting output
• TAG Connector
• There is no standard JTAG connector or pinout, so
suppliers are able to define their own. Microchip
uses the pin arrangement illustrated below on
those development boards, such as the Explorer
16 Development Board, that are JTAG enabled.
Note that most PIC®32 starter kits are NOT JTAG
enabled because they contain an on-board
equivalent of the PICkit™.